* [PATCH 0/2] iommu/arm-smmu-qcom: Add SM7250 support
@ 2026-10-16 9:46 ` Ishu Brar
0 siblings, 0 replies; 7+ messages in thread
From: Ishu Brar via B4 Relay @ 2026-10-16 9:46 UTC (permalink / raw)
To: Will Deacon, Robin Murphy, Joerg Roedel (AMD), Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Rob Clark
Cc: linux-arm-kernel, iommu, devicetree, linux-kernel, linux-arm-msm,
Ishu Brar
This documents SMMUs of Qualcomm SM7250 (Snapdragon
765/765G/768G) and skips Adreno SMMU PRR setup on it.
As on SM8250, firmware resets device when PRR registers are
written, which happens as soon as GPU creates its first per-process
pagetable. Patch 1 adds the compatible to binding (apps SMMU and GPU
SMMU). Patch 2 excludes it from PRR callbacks.
Tested on OnePlus Nord (SM7250) with Vulkan on Adreno 620. The SoC
devicetree nodes are not part of this series.
Signed-off-by: Ishu Brar <patches@brar.si>
---
Ishu Brar (2):
dt-bindings: arm-smmu: Document SM7250 SMMU
iommu/arm-smmu-qcom: Skip PRR setup on SM7250 GPU SMMU
Documentation/devicetree/bindings/iommu/arm,smmu.yaml | 3 +++
drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c | 1 +
2 files changed, 4 insertions(+)
---
base-commit: 7b7429c28ac01c8a2952225a4b8a742eec7359c3
change-id: 20261016-smmu-sm7250-957df02d9283
Best regards,
--
Ishu Brar <patches@brar.si>
^ permalink raw reply [flat|nested] 7+ messages in thread
* [PATCH 0/2] iommu/arm-smmu-qcom: Add SM7250 support
@ 2026-10-16 9:46 ` Ishu Brar
0 siblings, 0 replies; 7+ messages in thread
From: Ishu Brar @ 2026-10-16 9:46 UTC (permalink / raw)
To: Will Deacon, Robin Murphy, Joerg Roedel (AMD), Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Rob Clark
Cc: linux-arm-kernel, iommu, devicetree, linux-kernel, linux-arm-msm,
Ishu Brar
This documents SMMUs of Qualcomm SM7250 (Snapdragon
765/765G/768G) and skips Adreno SMMU PRR setup on it.
As on SM8250, firmware resets device when PRR registers are
written, which happens as soon as GPU creates its first per-process
pagetable. Patch 1 adds the compatible to binding (apps SMMU and GPU
SMMU). Patch 2 excludes it from PRR callbacks.
Tested on OnePlus Nord (SM7250) with Vulkan on Adreno 620. The SoC
devicetree nodes are not part of this series.
Signed-off-by: Ishu Brar <patches@brar.si>
---
Ishu Brar (2):
dt-bindings: arm-smmu: Document SM7250 SMMU
iommu/arm-smmu-qcom: Skip PRR setup on SM7250 GPU SMMU
Documentation/devicetree/bindings/iommu/arm,smmu.yaml | 3 +++
drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c | 1 +
2 files changed, 4 insertions(+)
---
base-commit: 7b7429c28ac01c8a2952225a4b8a742eec7359c3
change-id: 20261016-smmu-sm7250-957df02d9283
Best regards,
--
Ishu Brar <patches@brar.si>
^ permalink raw reply [flat|nested] 7+ messages in thread
* [PATCH 1/2] dt-bindings: arm-smmu: Document SM7250 SMMU
2026-10-16 9:46 ` Ishu Brar
@ 2026-10-16 9:46 ` Ishu Brar
-1 siblings, 0 replies; 7+ messages in thread
From: Ishu Brar via B4 Relay @ 2026-10-16 9:46 UTC (permalink / raw)
To: Will Deacon, Robin Murphy, Joerg Roedel (AMD), Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Rob Clark
Cc: linux-arm-kernel, iommu, devicetree, linux-kernel, linux-arm-msm,
Ishu Brar
From: Ishu Brar <patches@brar.si>
Document the SMMU found on the Qualcomm SM7250 SoC: the apps SMMU, which
is an MMU-500 implementation, and the GPU SMMU, which additionally
carries qcom,adreno-smmu.
Signed-off-by: Ishu Brar <patches@brar.si>
---
Documentation/devicetree/bindings/iommu/arm,smmu.yaml | 3 +++
1 file changed, 3 insertions(+)
diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
index 6748351c7..86844cefa 100644
--- a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
+++ b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
@@ -64,6 +64,7 @@ properties:
- qcom,sm6125-smmu-500
- qcom,sm6350-smmu-500
- qcom,sm6375-smmu-500
+ - qcom,sm7250-smmu-500
- qcom,sm8150-smmu-500
- qcom,sm8250-smmu-500
- qcom,sm8350-smmu-500
@@ -116,6 +117,7 @@ properties:
- qcom,shikra-smmu-500
- qcom,sm6115-smmu-500
- qcom,sm6125-smmu-500
+ - qcom,sm7250-smmu-500
- qcom,sm8150-smmu-500
- qcom,sm8250-smmu-500
- qcom,sm8350-smmu-500
@@ -641,6 +643,7 @@ allOf:
- qcom,shikra-smmu-500
- qcom,sm6115-smmu-500
- qcom,sm6125-smmu-500
+ - qcom,sm7250-smmu-500
- qcom,sm8150-smmu-500
- qcom,sm8250-smmu-500
- qcom,sm8350-smmu-500
--
2.56.0
^ permalink raw reply related [flat|nested] 7+ messages in thread
* [PATCH 1/2] dt-bindings: arm-smmu: Document SM7250 SMMU
@ 2026-10-16 9:46 ` Ishu Brar
0 siblings, 0 replies; 7+ messages in thread
From: Ishu Brar @ 2026-10-16 9:46 UTC (permalink / raw)
To: Will Deacon, Robin Murphy, Joerg Roedel (AMD), Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Rob Clark
Cc: linux-arm-kernel, iommu, devicetree, linux-kernel, linux-arm-msm,
Ishu Brar
Document the SMMU found on the Qualcomm SM7250 SoC: the apps SMMU, which
is an MMU-500 implementation, and the GPU SMMU, which additionally
carries qcom,adreno-smmu.
Signed-off-by: Ishu Brar <patches@brar.si>
---
Documentation/devicetree/bindings/iommu/arm,smmu.yaml | 3 +++
1 file changed, 3 insertions(+)
diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
index 6748351c7..86844cefa 100644
--- a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
+++ b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
@@ -64,6 +64,7 @@ properties:
- qcom,sm6125-smmu-500
- qcom,sm6350-smmu-500
- qcom,sm6375-smmu-500
+ - qcom,sm7250-smmu-500
- qcom,sm8150-smmu-500
- qcom,sm8250-smmu-500
- qcom,sm8350-smmu-500
@@ -116,6 +117,7 @@ properties:
- qcom,shikra-smmu-500
- qcom,sm6115-smmu-500
- qcom,sm6125-smmu-500
+ - qcom,sm7250-smmu-500
- qcom,sm8150-smmu-500
- qcom,sm8250-smmu-500
- qcom,sm8350-smmu-500
@@ -641,6 +643,7 @@ allOf:
- qcom,shikra-smmu-500
- qcom,sm6115-smmu-500
- qcom,sm6125-smmu-500
+ - qcom,sm7250-smmu-500
- qcom,sm8150-smmu-500
- qcom,sm8250-smmu-500
- qcom,sm8350-smmu-500
--
2.56.0
^ permalink raw reply related [flat|nested] 7+ messages in thread
* [PATCH 2/2] iommu/arm-smmu-qcom: Skip PRR setup on SM7250 GPU SMMU
2026-10-16 9:46 ` Ishu Brar
@ 2026-10-16 9:46 ` Ishu Brar
-1 siblings, 0 replies; 7+ messages in thread
From: Ishu Brar via B4 Relay @ 2026-10-16 9:46 UTC (permalink / raw)
To: Will Deacon, Robin Murphy, Joerg Roedel (AMD), Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Rob Clark
Cc: linux-arm-kernel, iommu, devicetree, linux-kernel, linux-arm-msm,
Ishu Brar
From: Ishu Brar <patches@brar.si>
As on SM8250, the firmware on SM7250 resets the device when the Adreno
SMMU PRR registers are written. This happened as soon as the first
per-process GPU pagetable was created. Do not install the PRR
callbacks for the SM7250 GPU SMMU either.
Tested on a OnePlus Nord (SM7250) with Vulkan.
Signed-off-by: Ishu Brar <patches@brar.si>
---
drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c
index 795e8ec7e..55071eb03 100644
--- a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c
+++ b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c
@@ -394,6 +394,7 @@ static int qcom_adreno_smmu_init_context(struct arm_smmu_domain *smmu_domain,
priv->set_prr_addr = NULL;
if (of_device_is_compatible(np, "qcom,smmu-500") &&
+ !of_device_is_compatible(np, "qcom,sm7250-smmu-500") &&
!of_device_is_compatible(np, "qcom,sm8250-smmu-500") &&
of_device_is_compatible(np, "qcom,adreno-smmu")) {
priv->set_prr_bit = qcom_adreno_smmu_set_prr_bit;
--
2.56.0
^ permalink raw reply related [flat|nested] 7+ messages in thread
* [PATCH 2/2] iommu/arm-smmu-qcom: Skip PRR setup on SM7250 GPU SMMU
@ 2026-10-16 9:46 ` Ishu Brar
0 siblings, 0 replies; 7+ messages in thread
From: Ishu Brar @ 2026-10-16 9:46 UTC (permalink / raw)
To: Will Deacon, Robin Murphy, Joerg Roedel (AMD), Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Rob Clark
Cc: linux-arm-kernel, iommu, devicetree, linux-kernel, linux-arm-msm,
Ishu Brar
As on SM8250, the firmware on SM7250 resets the device when the Adreno
SMMU PRR registers are written. This happened as soon as the first
per-process GPU pagetable was created. Do not install the PRR
callbacks for the SM7250 GPU SMMU either.
Tested on a OnePlus Nord (SM7250) with Vulkan.
Signed-off-by: Ishu Brar <patches@brar.si>
---
drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c
index 795e8ec7e..55071eb03 100644
--- a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c
+++ b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c
@@ -394,6 +394,7 @@ static int qcom_adreno_smmu_init_context(struct arm_smmu_domain *smmu_domain,
priv->set_prr_addr = NULL;
if (of_device_is_compatible(np, "qcom,smmu-500") &&
+ !of_device_is_compatible(np, "qcom,sm7250-smmu-500") &&
!of_device_is_compatible(np, "qcom,sm8250-smmu-500") &&
of_device_is_compatible(np, "qcom,adreno-smmu")) {
priv->set_prr_bit = qcom_adreno_smmu_set_prr_bit;
--
2.56.0
^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: [PATCH 1/2] dt-bindings: arm-smmu: Document SM7250 SMMU
2026-10-16 9:46 ` Ishu Brar
(?)
@ 2026-10-16 9:52 ` sashiko-bot
-1 siblings, 0 replies; 7+ messages in thread
From: sashiko-bot @ 2026-10-16 9:52 UTC (permalink / raw)
To: Ishu Brar; +Cc: devicetree, robh, conor+dt
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] dt-bindings: iommu/arm,smmu: missing clock constraints for SM7250 Adreno SMMU
--
commit 858a7b55acf188b45bbadcffa3b76541e3ae0d31
Author: Ishu Brar <patches@brar.si>
dt-bindings: arm-smmu: Document SM7250 SMMU
This commit documents the apps SMMU and GPU SMMU implementations found on
the Qualcomm SM7250 SoC. The GPU SMMU variant additionally carries the
qcom,adreno-smmu compatible string.
> diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
> index 6748351c78122..86844cefa76a3 100644
> --- a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
> +++ b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
[ ... ]
> @@ -116,6 +117,7 @@ properties:
> - qcom,shikra-smmu-500
> - qcom,sm6115-smmu-500
> - qcom,sm6125-smmu-500
> + - qcom,sm7250-smmu-500
> - qcom,sm8150-smmu-500
> - qcom,sm8250-smmu-500
> - qcom,sm8350-smmu-500
[Severity: Medium]
By adding the SM7250 compatible string to the Adreno GPU SMMU definition
here, should it also be added to the subsequent allOf conditional blocks
that enforce clock-names constraints?
Currently, the SM7250 Adreno GPU SMMU appears to be omitted from the
allOf block that requires specific clocks (such as ahb, bus, and iface).
This causes the device to fall through to the unconstrained base schema
for clocks, which could silently permit device trees with invalid, missing,
or wrongly ordered clocks to pass schema validation during a
dt_binding_check run.
--
Sashiko AI review · https://sashiko.dev/#/patchset/20261016-smmu-sm7250-v1-0-e11fc0384cfa@brar.si?part=1
^ permalink raw reply [flat|nested] 7+ messages in thread
end of thread, other threads:[~2026-10-16 9:52 UTC | newest]
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2026-10-16 9:46 [PATCH 0/2] iommu/arm-smmu-qcom: Add SM7250 support Ishu Brar via B4 Relay
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