Re: [PATCH 05/12] pinctrl: airoha: an7581: select force GPIO mode on GPIO requests

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 1 potential
issue to consider:
- [Medium] pinctrl: airoha: an7581: mux conflict between hsuart and
  hsuart_cts_rts
--

commit b98ded648dd882fe63d659f1c2bdcde0ac118345
Author: Zhengping Zhang <zhengping.zhang@airoha.com>

pinctrl: airoha: an7581: select force GPIO mode on GPIO requests

This commit extends the AN7581 pinctrl driver to support GPIO mux groups for
GPIO0-49 using per-pad force GPIO overrides, clears force GPIO bits when
selecting peripheral functions, and enables shared mux conflict checks.

> diff --git a/drivers/pinctrl/airoha/pinctrl-an7581.c b/drivers/pinctrl/airoha/pinctrl-an7581.c
> index 3cbdfc31e97e5..b266cc8bc65f4 100644
> --- a/drivers/pinctrl/airoha/pinctrl-an7581.c
> +++ b/drivers/pinctrl/airoha/pinctrl-an7581.c

[ ... ]

> @@ -721,7 +792,14 @@ static const struct airoha_pinctrl_func_group uart_func_group[] = {
>  			GPIO_HSUART_MODE_MASK | GPIO_HSUART_CTS_RTS_MODE_MASK,
>  			GPIO_HSUART_MODE_MASK
>  		},
> -		.regmap_size = 1,
> +		.regmap[1] = {
> +			AIROHA_FUNC_MUX,
> +			REG_FORCE_GPIO_EN,
> +			BIT(15) |
> +			BIT(16),
> +			0
> +		},
> +		.regmap_size = 2,
>  	},
>  	{
>  		.name = "hsuart_cts_rts",
> @@ -731,7 +809,14 @@ static const struct airoha_pinctrl_func_group uart_func_group[] = {
>  			GPIO_HSUART_MODE_MASK | GPIO_HSUART_CTS_RTS_MODE_MASK,
>  			GPIO_HSUART_MODE_MASK | GPIO_HSUART_CTS_RTS_MODE_MASK
>  		},
> -		.regmap_size = 1,
> +		.regmap[1] = {
> +			AIROHA_FUNC_MUX,
> +			REG_FORCE_GPIO_EN,
> +			BIT(13) |
> +			BIT(14),
> +			0
> +		},
> +		.regmap_size = 2,
>  	}, {

[ ... ]

> @@ -1432,6 +1834,7 @@ static const struct airoha_pinctrl_conf pinctrl_pcie_rst_od_conf[] = {
>  };
>  
>  static const struct airoha_pinctrl_match_data pinctrl_match_data = {
> +	.check_mux_conflicts = true,
>  	.chip_scu_compatible = "airoha,en7581-chip-scu",
>  	.pinctrl_name = KBUILD_MODNAME,
>  	.pinctrl_owner = THIS_MODULE,

[Severity: Medium]
Does enabling check_mux_conflicts prevent hsuart and hsuart_cts_rts from
being selected together?

hsuart_pins covers only the TX/RX pins (gpio15, gpio16) and clears
BIT(15) | BIT(16) in REG_FORCE_GPIO_EN, while hsuart_cts_rts_pins covers
only the CTS/RTS pins (gpio13, gpio14) and clears BIT(13) | BIT(14).
Configuring 4-wire HSUART with flow control therefore requires selecting
both groups, just like uart2 and uart2_cts_rts.

However, unlike uart2 (whose mask in REG_GPIO_PON_MODE is only
GPIO_UART2_MODE_MASK), hsuart includes GPIO_HSUART_CTS_RTS_MODE_MASK in
its mask with val = GPIO_HSUART_MODE_MASK, requiring the CTS/RTS bit to be
0, while hsuart_cts_rts requires that bit to be 1.  With
check_mux_conflicts enabled, airoha_pinmux_set_mux() ->
airoha_pinmux_check_conflicts() rejects selecting both groups with -EBUSY,
and selecting hsuart_cts_rts alone leaves the TX/RX pins unclaimed and
their force-GPIO bits uncleared.

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20261110094339.749110-1-zhengping.zhang@airoha.com?part=5