Re: [PATCH 2/3] drm/msm/mdss: reset all block resets described in DT

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 1 potential
issue to consider:
- [Low] drm/msm/mdss: inaccurate INT2 reset description in
  msm_mdss_reset() commit
--

commit 8dd3e2454eeeb0b73b84226f92cb892017ce9f66
Author: Qianhui Xu <xiaqinghuan@mail.ustc.edu.cn>

drm/msm/mdss: reset all block resets described in DT

This commit switches msm_mdss_reset() to devm_reset_control_array_get() so
that all resets listed in the MDSS device node are asserted and deasserted
together.

> msm_mdss_reset() acquires only the first reset listed in the MDSS
> device node.  Platforms can describe more than one MDSS block reset: the
> SM8750 display clock controller also provides a reset for the MDSS core
> INT2 interrupt controller, which is left out of reset when the
> bootloader hands over with the display block still running.

[ ... ]

> diff --git a/drivers/gpu/drm/msm/msm_mdss.c b/drivers/gpu/drm/msm/msm_mdss.c
> index 259d362475c81..e10185ef21677 100644
> --- a/drivers/gpu/drm/msm/msm_mdss.c
> +++ b/drivers/gpu/drm/msm/msm_mdss.c
> @@ -325,7 +325,8 @@ static int msm_mdss_reset(struct device *dev)
>  {
>  	struct reset_control *reset;
>  
> -	reset = reset_control_get_optional_exclusive(dev, NULL);
> +	reset = devm_reset_control_array_get(dev,
> +					     RESET_CONTROL_OPTIONAL_EXCLUSIVE);
>  	if (!reset) {
>  		/* Optional reset not specified */
>  		return 0;
> @@ -342,8 +343,6 @@ static int msm_mdss_reset(struct device *dev)
>  	msleep(20);
>  	reset_control_deassert(reset);
>  
> -	reset_control_put(reset);
> -
>  	return 0;
>  }

[Severity: Low]
As reported by Dmitry Baryshkov on v3 [1], is the commit message accurate in
describing DISP_CC_MDSS_CORE_INT2_BCR on SM8750 as a reset for an INT2
interrupt controller?

In drivers/clk/qcom/dispcc-sm8750.c, DISP_CC_MDSS_CORE_INT2_BCR (0xa000) is
the block reset for the second internal MDSS core domain paired with
mdss_int2_gdsc (0xb000) and the disp_cc_mdss_mdp1_clk,
disp_cc_mdss_mdp_lut1_clk, disp_cc_mdss_vsync1_clk, and
disp_cc_mdss_ahb1_clk branch clocks, as updated in commit "arm64: dts: qcom:
sm8750: describe the second MDSS block reset".

In addition, switching from reset_control_get_optional_exclusive() and
reset_control_put() to devm_reset_control_array_get() keeps the exclusive
reset controls acquired for the lifetime of the msm_mdss device rather than
releasing them after the boot reset pulse.

[1] https://lore.kernel.org/r/awb7bslhrhemsgvu7ubaejvurk6fecotgvqlwtvsoe2benqdgq@tvh2sfjbuzyu

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20261113155606.1677313-1-xiaqinghuan@mail.ustc.edu.cn?part=2