[PATCH v1 00/10] Tegra Video Input updates

[PATCH v1 00/10] Tegra Video Input updates

[Svyatoslav Ryhel]

This patchset contains various updates for Tegra Video Input driver:

1. Tegra Video Input driver is moved from staging to media since
   the driver is quite developed by now.
2. Fixes for Tegra20 and Tegra30 VI configuration (clock adjustments)
3. Updates and optimizations of VI implementation itself for complex
   media devices attached
4. Addition of Tegra114 CSI support

All changes were tested on:

LG Optimus Vu (P895) Tegra30 device:
 - MT9M114 front sensor with complex topology and irregular pad mapping
 - IMX111 rear sensor which has simple pixel array and a single pad

ASUS Transformer TF701T Tegra114 device:
 - same MT9M114 front sensor
 - OV5693 rear sensor which has simple pixel array and a single pad

Nvidia Tegra Note 7 (P1988) Tegra114 device:
 - OV5693 rear sensor

They all work and produce images.

Requires this patchset: https://lore.kernel.org/lkml/20261113145708.261530-1-clamor95@gmail.com/
("clk: tegra114: Add CSI pad clock gates")

Svyatoslav Ryhel (10):
  staging: media: tegra-video: Move driver to media/platform/nvidia
  dt-bindings: display: tegra: Remove Tegra30 fallback
  media: tegra-video: vi: Diverge Tegra20 and Tegra30 VI SoC
    descriptions
  media: tegra-video: vi: Switch to
    media_entity_remote_source_pad_unique() helper
  media: tegra-video: vi: Use entity function to check subdev type
  media: tegra-video: vi: Adjust pad assignment logic
  dt-bindings: display: tegra: Document Tegra114 CSI
  media: tegra-video: Add CSI support for Tegra114
  ARM: tegra: Remove fallback compatible from Tegra30 VI node
  ARM: tegra: Add CSI node for Tegra114

 .../display/tegra/nvidia,tegra20-csi.yaml     |  23 +++
 .../display/tegra/nvidia,tegra20-vi.yaml      |   5 +-
 arch/arm/boot/dts/nvidia/tegra114.dtsi        |  34 +++-
 arch/arm/boot/dts/nvidia/tegra30.dtsi         |   2 +-
 drivers/media/platform/nvidia/Kconfig         |   2 +
 drivers/media/platform/nvidia/Makefile        |   1 +
 .../platform/nvidia}/tegra-video/Kconfig      |   0
 .../platform/nvidia}/tegra-video/Makefile     |   1 +
 .../platform/nvidia}/tegra-video/TODO         |   0
 .../platform/nvidia}/tegra-video/csi.c        |   3 +
 .../platform/nvidia}/tegra-video/csi.h        |   6 +
 .../platform/nvidia}/tegra-video/tegra20.c    | 171 ++++++++++++++++--
 .../platform/nvidia}/tegra-video/tegra210.c   |   1 +
 .../platform/nvidia}/tegra-video/vi.c         |  47 ++++-
 .../platform/nvidia}/tegra-video/vi.h         |   8 +-
 .../platform/nvidia}/tegra-video/video.c      |   7 +-
 .../platform/nvidia}/tegra-video/video.h      |   0
 .../platform/nvidia}/tegra-video/vip.c        |   0
 .../platform/nvidia}/tegra-video/vip.h        |   0
 drivers/staging/media/Kconfig                 |   2 -
 drivers/staging/media/Makefile                |   1 -
 21 files changed, 281 insertions(+), 33 deletions(-)
 rename drivers/{staging/media => media/platform/nvidia}/tegra-video/Kconfig (100%)
 rename drivers/{staging/media => media/platform/nvidia}/tegra-video/Makefile (84%)
 rename drivers/{staging/media => media/platform/nvidia}/tegra-video/TODO (100%)
 rename drivers/{staging/media => media/platform/nvidia}/tegra-video/csi.c (99%)
 rename drivers/{staging/media => media/platform/nvidia}/tegra-video/csi.h (95%)
 rename drivers/{staging/media => media/platform/nvidia}/tegra-video/tegra20.c (88%)
 rename drivers/{staging/media => media/platform/nvidia}/tegra-video/tegra210.c (99%)
 rename drivers/{staging/media => media/platform/nvidia}/tegra-video/vi.c (97%)
 rename drivers/{staging/media => media/platform/nvidia}/tegra-video/vi.h (97%)
 rename drivers/{staging/media => media/platform/nvidia}/tegra-video/video.c (96%)
 rename drivers/{staging/media => media/platform/nvidia}/tegra-video/video.h (100%)
 rename drivers/{staging/media => media/platform/nvidia}/tegra-video/vip.c (100%)
 rename drivers/{staging/media => media/platform/nvidia}/tegra-video/vip.h (100%)

-- 
2.53.0

[PATCH v1 01/10] staging: media: tegra-video: Move driver to media/platform/nvidia

[Svyatoslav Ryhel]

The Tegra Video Input drivers are mature and developed enough to be moved
from staging into the media subsystem. No other changes are introduced.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
---
 drivers/media/platform/nvidia/Kconfig                           | 2 ++
 drivers/media/platform/nvidia/Makefile                          | 1 +
 .../media => media/platform/nvidia}/tegra-video/Kconfig         | 0
 .../media => media/platform/nvidia}/tegra-video/Makefile        | 0
 .../{staging/media => media/platform/nvidia}/tegra-video/TODO   | 0
 .../{staging/media => media/platform/nvidia}/tegra-video/csi.c  | 0
 .../{staging/media => media/platform/nvidia}/tegra-video/csi.h  | 0
 .../media => media/platform/nvidia}/tegra-video/tegra20.c       | 0
 .../media => media/platform/nvidia}/tegra-video/tegra210.c      | 0
 .../{staging/media => media/platform/nvidia}/tegra-video/vi.c   | 0
 .../{staging/media => media/platform/nvidia}/tegra-video/vi.h   | 0
 .../media => media/platform/nvidia}/tegra-video/video.c         | 0
 .../media => media/platform/nvidia}/tegra-video/video.h         | 0
 .../{staging/media => media/platform/nvidia}/tegra-video/vip.c  | 0
 .../{staging/media => media/platform/nvidia}/tegra-video/vip.h  | 0
 drivers/staging/media/Kconfig                                   | 2 --
 drivers/staging/media/Makefile                                  | 1 -
 17 files changed, 3 insertions(+), 3 deletions(-)
 rename drivers/{staging/media => media/platform/nvidia}/tegra-video/Kconfig (100%)
 rename drivers/{staging/media => media/platform/nvidia}/tegra-video/Makefile (100%)
 rename drivers/{staging/media => media/platform/nvidia}/tegra-video/TODO (100%)
 rename drivers/{staging/media => media/platform/nvidia}/tegra-video/csi.c (100%)
 rename drivers/{staging/media => media/platform/nvidia}/tegra-video/csi.h (100%)
 rename drivers/{staging/media => media/platform/nvidia}/tegra-video/tegra20.c (100%)
 rename drivers/{staging/media => media/platform/nvidia}/tegra-video/tegra210.c (100%)
 rename drivers/{staging/media => media/platform/nvidia}/tegra-video/vi.c (100%)
 rename drivers/{staging/media => media/platform/nvidia}/tegra-video/vi.h (100%)
 rename drivers/{staging/media => media/platform/nvidia}/tegra-video/video.c (100%)
 rename drivers/{staging/media => media/platform/nvidia}/tegra-video/video.h (100%)
 rename drivers/{staging/media => media/platform/nvidia}/tegra-video/vip.c (100%)
 rename drivers/{staging/media => media/platform/nvidia}/tegra-video/vip.h (100%)

diff --git a/drivers/media/platform/nvidia/Kconfig b/drivers/media/platform/nvidia/Kconfig
index b211b46877f63..53f34308f5aff 100644
--- a/drivers/media/platform/nvidia/Kconfig
+++ b/drivers/media/platform/nvidia/Kconfig
@@ -3,3 +3,5 @@
 comment "NVidia media platform drivers"
 
 source "drivers/media/platform/nvidia/tegra-vde/Kconfig"
+
+source "drivers/media/platform/nvidia/tegra-video/Kconfig"
diff --git a/drivers/media/platform/nvidia/Makefile b/drivers/media/platform/nvidia/Makefile
index 428415ff83de1..97a94b60fee93 100644
--- a/drivers/media/platform/nvidia/Makefile
+++ b/drivers/media/platform/nvidia/Makefile
@@ -1,3 +1,4 @@
 # SPDX-License-Identifier: GPL-2.0
 
 obj-y += tegra-vde/
+obj-y += tegra-video/
diff --git a/drivers/staging/media/tegra-video/Kconfig b/drivers/media/platform/nvidia/tegra-video/Kconfig
similarity index 100%
rename from drivers/staging/media/tegra-video/Kconfig
rename to drivers/media/platform/nvidia/tegra-video/Kconfig
diff --git a/drivers/staging/media/tegra-video/Makefile b/drivers/media/platform/nvidia/tegra-video/Makefile
similarity index 100%
rename from drivers/staging/media/tegra-video/Makefile
rename to drivers/media/platform/nvidia/tegra-video/Makefile
diff --git a/drivers/staging/media/tegra-video/TODO b/drivers/media/platform/nvidia/tegra-video/TODO
similarity index 100%
rename from drivers/staging/media/tegra-video/TODO
rename to drivers/media/platform/nvidia/tegra-video/TODO
diff --git a/drivers/staging/media/tegra-video/csi.c b/drivers/media/platform/nvidia/tegra-video/csi.c
similarity index 100%
rename from drivers/staging/media/tegra-video/csi.c
rename to drivers/media/platform/nvidia/tegra-video/csi.c
diff --git a/drivers/staging/media/tegra-video/csi.h b/drivers/media/platform/nvidia/tegra-video/csi.h
similarity index 100%
rename from drivers/staging/media/tegra-video/csi.h
rename to drivers/media/platform/nvidia/tegra-video/csi.h
diff --git a/drivers/staging/media/tegra-video/tegra20.c b/drivers/media/platform/nvidia/tegra-video/tegra20.c
similarity index 100%
rename from drivers/staging/media/tegra-video/tegra20.c
rename to drivers/media/platform/nvidia/tegra-video/tegra20.c
diff --git a/drivers/staging/media/tegra-video/tegra210.c b/drivers/media/platform/nvidia/tegra-video/tegra210.c
similarity index 100%
rename from drivers/staging/media/tegra-video/tegra210.c
rename to drivers/media/platform/nvidia/tegra-video/tegra210.c
diff --git a/drivers/staging/media/tegra-video/vi.c b/drivers/media/platform/nvidia/tegra-video/vi.c
similarity index 100%
rename from drivers/staging/media/tegra-video/vi.c
rename to drivers/media/platform/nvidia/tegra-video/vi.c
diff --git a/drivers/staging/media/tegra-video/vi.h b/drivers/media/platform/nvidia/tegra-video/vi.h
similarity index 100%
rename from drivers/staging/media/tegra-video/vi.h
rename to drivers/media/platform/nvidia/tegra-video/vi.h
diff --git a/drivers/staging/media/tegra-video/video.c b/drivers/media/platform/nvidia/tegra-video/video.c
similarity index 100%
rename from drivers/staging/media/tegra-video/video.c
rename to drivers/media/platform/nvidia/tegra-video/video.c
diff --git a/drivers/staging/media/tegra-video/video.h b/drivers/media/platform/nvidia/tegra-video/video.h
similarity index 100%
rename from drivers/staging/media/tegra-video/video.h
rename to drivers/media/platform/nvidia/tegra-video/video.h
diff --git a/drivers/staging/media/tegra-video/vip.c b/drivers/media/platform/nvidia/tegra-video/vip.c
similarity index 100%
rename from drivers/staging/media/tegra-video/vip.c
rename to drivers/media/platform/nvidia/tegra-video/vip.c
diff --git a/drivers/staging/media/tegra-video/vip.h b/drivers/media/platform/nvidia/tegra-video/vip.h
similarity index 100%
rename from drivers/staging/media/tegra-video/vip.h
rename to drivers/media/platform/nvidia/tegra-video/vip.h
diff --git a/drivers/staging/media/Kconfig b/drivers/staging/media/Kconfig
index 644aefdb9d41e..8a5f6dcc49adf 100644
--- a/drivers/staging/media/Kconfig
+++ b/drivers/staging/media/Kconfig
@@ -34,8 +34,6 @@ source "drivers/staging/media/meson/vdec/Kconfig"
 
 source "drivers/staging/media/sunxi/Kconfig"
 
-source "drivers/staging/media/tegra-video/Kconfig"
-
 menuconfig STAGING_MEDIA_DEPRECATED
 	bool "Media staging drivers (DEPRECATED)"
 	default n
diff --git a/drivers/staging/media/Makefile b/drivers/staging/media/Makefile
index 584720e91327c..b8d874766371e 100644
--- a/drivers/staging/media/Makefile
+++ b/drivers/staging/media/Makefile
@@ -3,7 +3,6 @@ obj-$(CONFIG_INTEL_ATOMISP)     += atomisp/
 obj-$(CONFIG_VIDEO_IMX_MEDIA)	+= imx/
 obj-$(CONFIG_VIDEO_MESON_VDEC)	+= meson/vdec/
 obj-$(CONFIG_VIDEO_SUNXI)	+= sunxi/
-obj-$(CONFIG_VIDEO_TEGRA)	+= tegra-video/
 obj-$(CONFIG_VIDEO_IPU3_IMGU)	+= ipu3/
 obj-$(CONFIG_VIDEO_INTEL_IPU7)	+= ipu7/
 obj-$(CONFIG_DVB_AV7110)	+= av7110/
-- 
2.53.0

[PATCH v1 02/10] dt-bindings: display: tegra: Remove Tegra30 fallback

[Svyatoslav Ryhel]

After further investigation, I have found that Tegra30 requires a slightly
different programming model than Tegra20, the maximum VI clock differs by
nearly a factor of two. Additionally, Tegra30 does not require the
APB_MISC workaround.

Therefore, remove the fallback compatible and add a dedicated compatible
for Tegra30 VI.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
---
 .../devicetree/bindings/display/tegra/nvidia,tegra20-vi.yaml | 5 +----
 1 file changed, 1 insertion(+), 4 deletions(-)

diff --git a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-vi.yaml b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-vi.yaml
index bb138277d5e8c..2d5538a1804f9 100644
--- a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-vi.yaml
+++ b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-vi.yaml
@@ -18,16 +18,13 @@ properties:
     oneOf:
       - enum:
           - nvidia,tegra20-vi
+          - nvidia,tegra30-vi
           - nvidia,tegra114-vi
           - nvidia,tegra124-vi
           - nvidia,tegra210-vi
           - nvidia,tegra186-vi
           - nvidia,tegra194-vi
 
-      - items:
-          - const: nvidia,tegra30-vi
-          - const: nvidia,tegra20-vi
-
       - items:
           - const: nvidia,tegra132-vi
           - const: nvidia,tegra124-vi
-- 
2.53.0

[PATCH v1 03/10] media: tegra-video: vi: Diverge Tegra20 and Tegra30 VI SoC descriptions

[Svyatoslav Ryhel]

Further investigation shows that the current maximum VI clock rate is too
high for Tegra20 and is better suited for Tegra30. The correct clock
frequency for Tegra20 should be 150 MHz, as it was set prior to the
addition of Tegra30 VI support — a value backed up by the current Tegra20
peripheral OPP table. Tegra30 supports up to 470 MHz for the VI clock,
but this rate is available only on higher-end Tegra30 SoC variants. The
highest clock rate supported across all SoC variants is 300 MHz.

Diverge the Tegra20 and Tegra30 VI SoC descriptions to account for maximum VI
clock limits, setting 150 MHz for Tegra20 and 300 MHz for Tegra30.
Additionally, remove the APB_MISC workaround for Tegra30, as it is Tegra20
specific.

Fixes: 071fa83ded5e ("staging: media: tegra-video: tegra20: increase maximum VI clock frequency")
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
---
 .../platform/nvidia/tegra-video/tegra20.c     | 22 ++++++++++++++++++-
 .../media/platform/nvidia/tegra-video/vi.c    |  5 ++++-
 .../media/platform/nvidia/tegra-video/vi.h    |  5 ++++-
 .../media/platform/nvidia/tegra-video/video.c |  3 ++-
 4 files changed, 31 insertions(+), 4 deletions(-)

diff --git a/drivers/media/platform/nvidia/tegra-video/tegra20.c b/drivers/media/platform/nvidia/tegra-video/tegra20.c
index cdadff98eae75..f27ecb1ba29a7 100644
--- a/drivers/media/platform/nvidia/tegra-video/tegra20.c
+++ b/drivers/media/platform/nvidia/tegra-video/tegra20.c
@@ -809,6 +809,15 @@ static const struct tegra_vi_ops tegra20_vi_ops = {
 	.vi_stop_streaming = tegra20_vi_stop_streaming,
 };
 
+static const struct tegra_vi_ops tegra30_vi_ops = {
+	.channel_host1x_syncpt_init = tegra20_channel_host1x_syncpt_init,
+	.channel_host1x_syncpt_free = tegra20_channel_host1x_syncpt_free,
+	.vi_fmt_align = tegra20_fmt_align,
+	.channel_queue_setup = tegra20_channel_queue_setup,
+	.vi_start_streaming = tegra20_vi_start_streaming,
+	.vi_stop_streaming = tegra20_vi_stop_streaming,
+};
+
 #define TEGRA20_VIDEO_FMT(DATA_TYPE, BIT_WIDTH, MBUS_CODE, BPP, FOURCC)	\
 {									\
 	.img_dt		= TEGRA_IMAGE_DT_##DATA_TYPE,			\
@@ -852,7 +861,18 @@ const struct tegra_vi_soc tegra20_vi_soc = {
 	.ops = &tegra20_vi_ops,
 	.hw_revision = 1,
 	.vi_max_channels = 2, /* TEGRA_VI_OUT_1 and TEGRA_VI_OUT_2 */
-	.vi_max_clk_hz = 450000000,
+	.vi_max_clk_hz = 150000000,
+	.has_h_v_flip = true,
+};
+
+const struct tegra_vi_soc tegra30_vi_soc = {
+	.video_formats = tegra20_video_formats,
+	.nformats = ARRAY_SIZE(tegra20_video_formats),
+	.default_video_format = &tegra20_video_formats[0],
+	.ops = &tegra30_vi_ops,
+	.hw_revision = 1,
+	.vi_max_channels = 2,
+	.vi_max_clk_hz = 300000000,
 	.has_h_v_flip = true,
 };
 
diff --git a/drivers/media/platform/nvidia/tegra-video/vi.c b/drivers/media/platform/nvidia/tegra-video/vi.c
index d8c77d1290efd..12eaa89304e84 100644
--- a/drivers/media/platform/nvidia/tegra-video/vi.c
+++ b/drivers/media/platform/nvidia/tegra-video/vi.c
@@ -1935,9 +1935,12 @@ static void tegra_vi_remove(struct platform_device *pdev)
 }
 
 static const struct of_device_id tegra_vi_of_id_table[] = {
-#if defined(CONFIG_ARCH_TEGRA_2x_SOC) || defined(CONFIG_ARCH_TEGRA_3x_SOC)
+#if defined(CONFIG_ARCH_TEGRA_2x_SOC)
 	{ .compatible = "nvidia,tegra20-vi",  .data = &tegra20_vi_soc },
 #endif
+#if defined(CONFIG_ARCH_TEGRA_3x_SOC)
+	{ .compatible = "nvidia,tegra30-vi",  .data = &tegra30_vi_soc },
+#endif
 #if defined(CONFIG_ARCH_TEGRA_210_SOC)
 	{ .compatible = "nvidia,tegra210-vi", .data = &tegra210_vi_soc },
 #endif
diff --git a/drivers/media/platform/nvidia/tegra-video/vi.h b/drivers/media/platform/nvidia/tegra-video/vi.h
index 46328e488aa38..ff5c9deed4c88 100644
--- a/drivers/media/platform/nvidia/tegra-video/vi.h
+++ b/drivers/media/platform/nvidia/tegra-video/vi.h
@@ -292,9 +292,12 @@ struct tegra_video_format {
 	u32 fourcc;
 };
 
-#if defined(CONFIG_ARCH_TEGRA_2x_SOC) || defined(CONFIG_ARCH_TEGRA_3x_SOC)
+#if defined(CONFIG_ARCH_TEGRA_2x_SOC)
 extern const struct tegra_vi_soc tegra20_vi_soc;
 #endif
+#if defined(CONFIG_ARCH_TEGRA_3x_SOC)
+extern const struct tegra_vi_soc tegra30_vi_soc;
+#endif
 #if defined(CONFIG_ARCH_TEGRA_210_SOC)
 extern const struct tegra_vi_soc tegra210_vi_soc;
 #endif
diff --git a/drivers/media/platform/nvidia/tegra-video/video.c b/drivers/media/platform/nvidia/tegra-video/video.c
index 2e84385708bac..d483fb709d127 100644
--- a/drivers/media/platform/nvidia/tegra-video/video.c
+++ b/drivers/media/platform/nvidia/tegra-video/video.c
@@ -123,13 +123,14 @@ static void host1x_video_remove(struct host1x_device *dev)
 static const struct of_device_id host1x_video_subdevs[] = {
 #if defined(CONFIG_ARCH_TEGRA_2x_SOC) || defined(CONFIG_ARCH_TEGRA_3x_SOC)
 	{ .compatible = "nvidia,tegra20-vip", },
-	{ .compatible = "nvidia,tegra20-vi", },
 #endif
 #if defined(CONFIG_ARCH_TEGRA_2x_SOC)
 	{ .compatible = "nvidia,tegra20-csi", },
+	{ .compatible = "nvidia,tegra20-vi", },
 #endif
 #if defined(CONFIG_ARCH_TEGRA_3x_SOC)
 	{ .compatible = "nvidia,tegra30-csi", },
+	{ .compatible = "nvidia,tegra30-vi", },
 #endif
 #if defined(CONFIG_ARCH_TEGRA_210_SOC)
 	{ .compatible = "nvidia,tegra210-csi", },
-- 
2.53.0

[PATCH v1 04/10] media: tegra-video: vi: Switch to media_entity_remote_source_pad_unique() helper

[Svyatoslav Ryhel]

The tegra_channel_get_remote_source_subdev() helper walks up the chain
to the initial source. It blindly uses pad 0, assuming it will always be
the remote source pad. This may not be the case for more complex multipad
devices — for example, the mt9m114 camera sensor with a built-in IFP,
where the source pad is 1. Switch to
media_entity_remote_source_pad_unique() to specifically retrieve the
remote source pad.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
---
 drivers/media/platform/nvidia/tegra-video/vi.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/media/platform/nvidia/tegra-video/vi.c b/drivers/media/platform/nvidia/tegra-video/vi.c
index 12eaa89304e84..a96ef26af89eb 100644
--- a/drivers/media/platform/nvidia/tegra-video/vi.c
+++ b/drivers/media/platform/nvidia/tegra-video/vi.c
@@ -187,9 +187,11 @@ tegra_channel_get_remote_source_subdev(struct tegra_vi_channel *chan)
 	if (!subdev)
 		return NULL;
 
+	entity = &subdev->entity;
+
 	pad = &subdev->entity.pads[0];
 	while (!(pad->flags & MEDIA_PAD_FL_SOURCE)) {
-		pad = media_pad_remote_pad_first(pad);
+		pad = media_entity_remote_source_pad_unique(entity);
 		if (!pad || !is_media_entity_v4l2_subdev(pad->entity))
 			break;
 		entity = pad->entity;
-- 
2.53.0

[PATCH v1 05/10] media: tegra-video: vi: Use entity function to check subdev type

[Svyatoslav Ryhel]

The tegra_channel_get_remote_source_subdev() function relies on pad flags
to terminate the search for the initial sensor. This causes it to iterate
through devices that should be bypassed—for example, the pixel array (PA)
of the mt9m114, where the internal image signal processor (IFP) should be
the initial source instead. Switch to checking entity->function for a
sensor or ISP to terminate the search.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
---
 drivers/media/platform/nvidia/tegra-video/vi.c | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/drivers/media/platform/nvidia/tegra-video/vi.c b/drivers/media/platform/nvidia/tegra-video/vi.c
index a96ef26af89eb..5c649e3162fe3 100644
--- a/drivers/media/platform/nvidia/tegra-video/vi.c
+++ b/drivers/media/platform/nvidia/tegra-video/vi.c
@@ -189,13 +189,12 @@ tegra_channel_get_remote_source_subdev(struct tegra_vi_channel *chan)
 
 	entity = &subdev->entity;
 
-	pad = &subdev->entity.pads[0];
-	while (!(pad->flags & MEDIA_PAD_FL_SOURCE)) {
+	while (entity->function != MEDIA_ENT_F_PROC_VIDEO_ISP &&
+	       entity->function != MEDIA_ENT_F_CAM_SENSOR) {
 		pad = media_entity_remote_source_pad_unique(entity);
 		if (!pad || !is_media_entity_v4l2_subdev(pad->entity))
 			break;
 		entity = pad->entity;
-		pad = &entity->pads[0];
 		subdev = media_entity_to_v4l2_subdev(entity);
 	}
 
-- 
2.53.0

[PATCH v1 06/10] media: tegra-video: vi: Adjust pad assignment logic

[Svyatoslav Ryhel]

The VI driver does not populate the pad entry in v4l2_subdev_*_enum
structures that contain it. Leaving it unpopulated assumes that the source
pad will always have index 0, which may not be true for more complex
sensor drivers.

To resolve this, assign the pad value in v4l2_subdev_*_enum using the
source pad index obtained via media_get_pad_index() from the source
subdev.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
---
 .../media/platform/nvidia/tegra-video/vi.c    | 30 +++++++++++++++++--
 1 file changed, 28 insertions(+), 2 deletions(-)

diff --git a/drivers/media/platform/nvidia/tegra-video/vi.c b/drivers/media/platform/nvidia/tegra-video/vi.c
index 5c649e3162fe3..0228a11013b05 100644
--- a/drivers/media/platform/nvidia/tegra-video/vi.c
+++ b/drivers/media/platform/nvidia/tegra-video/vi.c
@@ -348,6 +348,9 @@ static int tegra_channel_enum_framesizes(struct file *file, void *fh,
 	fse.code = fmtinfo->code;
 
 	subdev = tegra_channel_get_remote_source_subdev(chan);
+	fse.pad = media_get_pad_index(&subdev->entity, MEDIA_PAD_FL_SOURCE,
+				      PAD_SIGNAL_DEFAULT);
+
 	ret = v4l2_subdev_call(subdev, pad, enum_frame_size, NULL, &fse);
 	if (ret)
 		return ret;
@@ -380,6 +383,9 @@ static int tegra_channel_enum_frameintervals(struct file *file, void *fh,
 	fie.code = fmtinfo->code;
 
 	subdev = tegra_channel_get_remote_source_subdev(chan);
+	fie.pad = media_get_pad_index(&subdev->entity, MEDIA_PAD_FL_SOURCE,
+				      PAD_SIGNAL_DEFAULT);
+
 	ret = v4l2_subdev_call(subdev, pad, enum_frame_interval, NULL, &fie);
 	if (ret)
 		return ret;
@@ -465,7 +471,9 @@ static int __tegra_channel_try_format(struct tegra_vi_channel *chan,
 	}
 
 	pix->field = V4L2_FIELD_NONE;
-	fmt.pad = 0;
+	fmt.pad = media_get_pad_index(&subdev->entity, MEDIA_PAD_FL_SOURCE,
+				      PAD_SIGNAL_DEFAULT);
+
 	v4l2_fill_mbus_format(&fmt.format, pix, fmtinfo->code);
 
 	/*
@@ -540,9 +548,11 @@ static int tegra_channel_set_format(struct file *file, void *fh,
 
 	fmtinfo = tegra_get_format_by_fourcc(chan->vi, pix->pixelformat);
 
-	fmt.pad = 0;
 	v4l2_fill_mbus_format(&fmt.format, pix, fmtinfo->code);
 	subdev = tegra_channel_get_remote_source_subdev(chan);
+	fmt.pad = media_get_pad_index(&subdev->entity, MEDIA_PAD_FL_SOURCE,
+				      PAD_SIGNAL_DEFAULT);
+
 	ret = v4l2_subdev_call(subdev, pad, set_fmt, NULL, NULL, &fmt);
 	if (ret < 0)
 		return ret;
@@ -570,6 +580,9 @@ static int tegra_channel_set_subdev_active_fmt(struct tegra_vi_channel *chan)
 	 * is corresponding match in the Tegra supported video formats.
 	 */
 	subdev = tegra_channel_get_remote_source_subdev(chan);
+	fmt.pad = media_get_pad_index(&subdev->entity, MEDIA_PAD_FL_SOURCE,
+				      PAD_SIGNAL_DEFAULT);
+
 	ret = v4l2_subdev_call(subdev, pad, get_fmt, NULL, &fmt);
 	if (ret)
 		return ret;
@@ -614,6 +627,7 @@ static int tegra_channel_g_selection(struct file *file, void *priv,
 		.which = V4L2_SUBDEV_FORMAT_ACTIVE,
 		.target = sel->target,
 	};
+	u32 pad;
 	int ret;
 
 	subdev = tegra_channel_get_remote_source_subdev(chan);
@@ -622,6 +636,12 @@ static int tegra_channel_g_selection(struct file *file, void *priv,
 
 	if (sel->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
 		return -EINVAL;
+
+	pad = media_get_pad_index(&subdev->entity, MEDIA_PAD_FL_SOURCE,
+				  PAD_SIGNAL_DEFAULT);
+	fmt.pad = pad;
+	sdsel.pad = pad;
+
 	/*
 	 * Try the get selection operation and fallback to get format if not
 	 * implemented.
@@ -667,6 +687,9 @@ static int tegra_channel_s_selection(struct file *file, void *fh,
 	if (vb2_is_busy(&chan->queue))
 		return -EBUSY;
 
+	sdsel.pad = media_get_pad_index(&subdev->entity, MEDIA_PAD_FL_SOURCE,
+					PAD_SIGNAL_DEFAULT);
+
 	ret = v4l2_subdev_call(subdev, pad, set_selection, NULL, NULL, &sdsel);
 	if (!ret) {
 		sel->r = sdsel.r;
@@ -1041,6 +1064,9 @@ static int vi_fmts_bitmap_init(struct tegra_vi_channel *chan)
 	 * supported video formats.
 	 */
 	subdev = tegra_channel_get_remote_source_subdev(chan);
+	code.pad = media_get_pad_index(&subdev->entity, MEDIA_PAD_FL_SOURCE,
+				       PAD_SIGNAL_DEFAULT);
+
 	while (1) {
 		ret = v4l2_subdev_call(subdev, pad, enum_mbus_code,
 				       NULL, &code);
-- 
2.53.0

[PATCH v1 07/10] dt-bindings: display: tegra: Document Tegra114 CSI

[Svyatoslav Ryhel]

Add a separate compatible string for the Tegra114 CSI, as it has a
different programming model, uses three additional clocks, and does not
contain MIPI calibration logic.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
---
 .../display/tegra/nvidia,tegra20-csi.yaml     | 23 +++++++++++++++++++
 1 file changed, 23 insertions(+)

diff --git a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-csi.yaml b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-csi.yaml
index a1aea9590769f..0c18ac81c6d6f 100644
--- a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-csi.yaml
+++ b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-csi.yaml
@@ -14,6 +14,7 @@ properties:
     enum:
       - nvidia,tegra20-csi
       - nvidia,tegra30-csi
+      - nvidia,tegra114-csi
 
   reg:
     maxItems: 1
@@ -24,12 +25,18 @@ properties:
       - description: module clock
       - description: PAD A clock
       - description: PAD B clock
+      - description: A/B lanes clock
+      - description: C/D lanes clock
+      - description: E lane clock
 
   clock-names:
     items:
       - const: csi
       - const: csia-pad
       - const: csib-pad
+      - const: cilab
+      - const: cilcd
+      - const: cile
 
   avdd-dsi-csi-supply:
     description: DSI/CSI power supply. Must supply 1.2 V.
@@ -125,6 +132,22 @@ allOf:
         clock-names:
           minItems: 3
 
+  - if:
+      properties:
+        compatible:
+          contains:
+            enum:
+              - nvidia,tegra114-csi
+    then:
+      properties:
+        "#nvidia,mipi-calibrate-cells": false
+
+        clocks:
+          minItems: 6
+
+        clock-names:
+          minItems: 6
+
 additionalProperties: false
 
 required:
-- 
2.53.0

[PATCH v1 08/10] media: tegra-video: Add CSI support for Tegra114

[Svyatoslav Ryhel]

The VI implementation used in previous generations is fully compatible
with Tegra114 and remains hardware revision 1, making this a relatively
small patch. Tegra114 supports a higher maximum VI clock frequency of
408 MHz, meaning the Tegra30 compatible cannot be used as a fallback.

The CSI block in Tegra114 is more advanced than the one in Tegra30. It
has three additional lane clocks, both CSI A and B ports have two CIL
pads per port, and the MIPI calibration logic has been moved into a
dedicated block. The Tegra114 CSI also supports an additional CSI-C
output, but since there are no known hardware configurations using it,
it is omitted due to a lack of test hardware.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
---
 .../platform/nvidia/tegra-video/Makefile      |   1 +
 .../media/platform/nvidia/tegra-video/csi.c   |   3 +
 .../media/platform/nvidia/tegra-video/csi.h   |   6 +
 .../platform/nvidia/tegra-video/tegra20.c     | 149 ++++++++++++++++--
 .../platform/nvidia/tegra-video/tegra210.c    |   1 +
 .../media/platform/nvidia/tegra-video/vi.c    |   3 +
 .../media/platform/nvidia/tegra-video/vi.h    |   3 +
 .../media/platform/nvidia/tegra-video/video.c |   4 +
 8 files changed, 156 insertions(+), 14 deletions(-)

diff --git a/drivers/media/platform/nvidia/tegra-video/Makefile b/drivers/media/platform/nvidia/tegra-video/Makefile
index 96380b5dbd8bb..787496ad2f442 100644
--- a/drivers/media/platform/nvidia/tegra-video/Makefile
+++ b/drivers/media/platform/nvidia/tegra-video/Makefile
@@ -7,5 +7,6 @@ tegra-video-objs := \
 
 tegra-video-$(CONFIG_ARCH_TEGRA_2x_SOC)  += tegra20.o
 tegra-video-$(CONFIG_ARCH_TEGRA_3x_SOC)  += tegra20.o
+tegra-video-$(CONFIG_ARCH_TEGRA_114_SOC) += tegra20.o
 tegra-video-$(CONFIG_ARCH_TEGRA_210_SOC) += tegra210.o
 obj-$(CONFIG_VIDEO_TEGRA) += tegra-video.o
diff --git a/drivers/media/platform/nvidia/tegra-video/csi.c b/drivers/media/platform/nvidia/tegra-video/csi.c
index 5a5fca378ae64..126dc65731aad 100644
--- a/drivers/media/platform/nvidia/tegra-video/csi.c
+++ b/drivers/media/platform/nvidia/tegra-video/csi.c
@@ -877,6 +877,9 @@ static const struct of_device_id tegra_csi_of_id_table[] = {
 #if defined(CONFIG_ARCH_TEGRA_3x_SOC)
 	{ .compatible = "nvidia,tegra30-csi", .data = &tegra30_csi_soc },
 #endif
+#if defined(CONFIG_ARCH_TEGRA_114_SOC)
+	{ .compatible = "nvidia,tegra114-csi", .data = &tegra114_csi_soc },
+#endif
 #if defined(CONFIG_ARCH_TEGRA_210_SOC)
 	{ .compatible = "nvidia,tegra210-csi", .data = &tegra210_csi_soc },
 #endif
diff --git a/drivers/media/platform/nvidia/tegra-video/csi.h b/drivers/media/platform/nvidia/tegra-video/csi.h
index f0277cb424469..ec669f4a9997e 100644
--- a/drivers/media/platform/nvidia/tegra-video/csi.h
+++ b/drivers/media/platform/nvidia/tegra-video/csi.h
@@ -121,6 +121,8 @@ struct tegra_csi_ops {
  * @num_clks: total clocks count
  * @tpg_frmrate_table: csi tpg frame rate table with blanking intervals
  * @tpg_frmrate_table_size: size of frame rate table
+ * @has_paired_cil: indicates that cil pads are paired per port, this is
+ *		    specific for Tegra114 where each port has 2 cil pads
  */
 struct tegra_csi_soc {
 	const struct tegra_csi_ops *ops;
@@ -130,6 +132,7 @@ struct tegra_csi_soc {
 	unsigned int num_clks;
 	const struct tpg_framerate *tpg_frmrate_table;
 	unsigned int tpg_frmrate_table_size;
+	bool has_paired_cil;
 };
 
 #if defined(CONFIG_ARCH_TEGRA_2x_SOC)
@@ -138,6 +141,9 @@ extern const struct tegra_csi_soc tegra20_csi_soc;
 #if defined(CONFIG_ARCH_TEGRA_3x_SOC)
 extern const struct tegra_csi_soc tegra30_csi_soc;
 #endif
+#if defined(CONFIG_ARCH_TEGRA_114_SOC)
+extern const struct tegra_csi_soc tegra114_csi_soc;
+#endif
 #if defined(CONFIG_ARCH_TEGRA_210_SOC)
 extern const struct tegra_csi_soc tegra210_csi_soc;
 #endif
diff --git a/drivers/media/platform/nvidia/tegra-video/tegra20.c b/drivers/media/platform/nvidia/tegra-video/tegra20.c
index f27ecb1ba29a7..41dd5c2d098ce 100644
--- a/drivers/media/platform/nvidia/tegra-video/tegra20.c
+++ b/drivers/media/platform/nvidia/tegra-video/tegra20.c
@@ -217,8 +217,21 @@ enum tegra_vi_out {
 #define       CSI_B_PHY_CIL_ENABLE			(0x1 << 16)
 #define       CSI_B_PHY_CIL_DISABLE			(0x2 << 16)
 #define       CSI_B_PHY_CIL_ENABLE_MASK			(0x3 << 16)
+#define       CSI_C_PHY_CIL_NOP				(0x0 << 20)
+#define       CSI_C_PHY_CIL_ENABLE			(0x1 << 20)
+#define       CSI_C_PHY_CIL_DISABLE			(0x2 << 20)
+#define       CSI_C_PHY_CIL_ENABLE_MASK			(0x3 << 20)
+#define       CSI_D_PHY_CIL_NOP				(0x0 << 24)
+#define       CSI_D_PHY_CIL_ENABLE			(0x1 << 24)
+#define       CSI_D_PHY_CIL_DISABLE			(0x2 << 24)
+#define       CSI_D_PHY_CIL_ENABLE_MASK			(0x3 << 24)
+#define       CSI_E_PHY_CIL_NOP				(0x0 << 28)
+#define       CSI_E_PHY_CIL_ENABLE			(0x1 << 28)
+#define       CSI_E_PHY_CIL_DISABLE			(0x2 << 28)
+#define       CSI_E_PHY_CIL_ENABLE_MASK			(0x3 << 28)
 #define TEGRA_CSI_PHY_CIL_CONTROL0(n)			(0x006c + (n) * 4)
 #define       CSI_CONTINUOUS_CLOCK_MODE_ENABLE		BIT(5)
+#define       CSI_DEFAULT_CLOCK_SETTLE_TIME		0x5
 #define TEGRA_CSI_CSI_PIXEL_PARSER_STATUS		0x0078
 #define TEGRA_CSI_CSI_CIL_STATUS			0x007c
 #define       CSI_MIPI_AUTO_CAL_DONE			BIT(15)
@@ -262,6 +275,19 @@ enum tegra_vi_out {
 #define       CSI_PAD_TERM_REF(n)			(((n) & 0x7) << 0)
 #define TEGRA_CSI_CSI_CILA_STATUS			0x00d8
 #define TEGRA_CSI_CSI_CILB_STATUS			0x00dc
+#define TEGRA_CSI_CSI_CILC_STATUS			0x00e4
+#define TEGRA_CSI_CSI_CILD_STATUS			0x00e8
+#define TEGRA_CSI_PHY_CILC_CONTROL0			0x00f8
+#define TEGRA_CSI_PHY_CILD_CONTROL0			0x00fc
+#define TEGRA_CSI_PHY_CILE_CONTROL0			0x010c
+#define TEGRA_CSI_CSI_CIL_STATUS_2			0x0110
+#define TEGRA_CSI_CSI_CIL_INTERRUPT_MASK_2		0x0114
+#define TEGRA_CSI_CILC_PAD_CONFIG0			0x0128
+#define TEGRA_CSI_CILC_PAD_CONFIG1			0x012c
+#define TEGRA_CSI_CILD_PAD_CONFIG0			0x0130
+#define TEGRA_CSI_CILD_PAD_CONFIG1			0x0134
+#define TEGRA_CSI_CILE_PAD_CONFIG0			0x0138
+#define TEGRA_CSI_CILE_PAD_CONFIG1			0x013c
 
 /* --------------------------------------------------------------------------
  * Read and Write helpers
@@ -876,6 +902,17 @@ const struct tegra_vi_soc tegra30_vi_soc = {
 	.has_h_v_flip = true,
 };
 
+const struct tegra_vi_soc tegra114_vi_soc = {
+	.video_formats = tegra20_video_formats,
+	.nformats = ARRAY_SIZE(tegra20_video_formats),
+	.default_video_format = &tegra20_video_formats[0],
+	.ops = &tegra30_vi_ops,
+	.hw_revision = 1,
+	.vi_max_channels = 2,
+	.vi_max_clk_hz = 408000000,
+	.has_h_v_flip = true,
+};
+
 /* --------------------------------------------------------------------------
  * MIPI Calibration
  */
@@ -1003,6 +1040,8 @@ static const struct tegra_mipi_ops tegra20_mipi_ops = {
  */
 static void tegra20_csi_capture_clean(struct tegra_csi_channel *csi_chan)
 {
+	struct tegra_csi *csi = csi_chan->csi;
+
 	tegra20_csi_write(csi_chan, TEGRA_CSI_VI_INPUT_STREAM_CONTROL, 0);
 	tegra20_csi_write(csi_chan, TEGRA_CSI_HOST_INPUT_STREAM_CONTROL, 0);
 
@@ -1018,6 +1057,11 @@ static void tegra20_csi_capture_clean(struct tegra_csi_channel *csi_chan)
 	tegra20_csi_write(csi_chan, TEGRA_CSI_CIL_MIPI_CAL_STATUS, 0);
 	tegra20_csi_write(csi_chan, TEGRA_CSI_CLKEN_OVERRIDE, 0);
 
+	if (csi->soc->has_paired_cil) {
+		tegra20_csi_write(csi_chan, TEGRA_CSI_CSI_CIL_STATUS_2, 0);
+		tegra20_csi_write(csi_chan, TEGRA_CSI_CSI_CIL_INTERRUPT_MASK_2, 0);
+	}
+
 	tegra20_csi_write(csi_chan, TEGRA_CSI_DEBUG_CONTROL,
 			  CSI_DEBUG_CONTROL_CLR_DBG_CNT_0 |
 			  CSI_DEBUG_CONTROL_CLR_DBG_CNT_1 |
@@ -1028,6 +1072,7 @@ static int tegra20_csi_port_start_streaming(struct tegra_csi_channel *csi_chan,
 					    u8 portno)
 {
 	struct tegra_vi_channel *vi_chan = v4l2_get_subdev_hostdata(&csi_chan->subdev);
+	struct tegra_csi *csi = csi_chan->csi;
 	int width  = vi_chan->format.width;
 	int height = vi_chan->format.height;
 	u32 data_type = vi_chan->fmtinfo->img_dt;
@@ -1061,9 +1106,30 @@ static int tegra20_csi_port_start_streaming(struct tegra_csi_channel *csi_chan,
 	tegra20_csi_write(csi_chan, TEGRA_CSI_PIXEL_STREAM_GAP(port), 0);
 	tegra20_csi_write(csi_chan, TEGRA_CSI_PIXEL_STREAM_PP_COMMAND(port), 0);
 	tegra20_csi_write(csi_chan, TEGRA_CSI_PIXEL_STREAM_EXPECTED_FRAME(port), 0);
-	tegra20_csi_write(csi_chan, TEGRA_CSI_PHY_CIL_CONTROL0(port), 0);
-	tegra20_csi_write(csi_chan, TEGRA_CSI_CIL_PAD_CONFIG0(port), 0);
-	tegra20_csi_write(csi_chan, TEGRA_CSI_CIL_PAD_CONFIG1(port), 0);
+
+	if (csi->soc->has_paired_cil) {
+		if (port == PORT_A) {
+			tegra20_csi_write(csi_chan, TEGRA_CSI_PHY_CIL_CONTROL0(port), 0);
+			tegra20_csi_write(csi_chan, TEGRA_CSI_CIL_PAD_CONFIG0(port), 0);
+			tegra20_csi_write(csi_chan, TEGRA_CSI_CIL_PAD_CONFIG1(port), 0);
+
+			tegra20_csi_write(csi_chan, TEGRA_CSI_PHY_CIL_CONTROL0(port + 1), 0);
+			tegra20_csi_write(csi_chan, TEGRA_CSI_CIL_PAD_CONFIG0(port + 1), 0);
+			tegra20_csi_write(csi_chan, TEGRA_CSI_CIL_PAD_CONFIG1(port + 1), 0);
+		} else {
+			tegra20_csi_write(csi_chan, TEGRA_CSI_PHY_CILC_CONTROL0, 0);
+			tegra20_csi_write(csi_chan, TEGRA_CSI_CILC_PAD_CONFIG0, 0);
+			tegra20_csi_write(csi_chan, TEGRA_CSI_CILC_PAD_CONFIG1, 0);
+
+			tegra20_csi_write(csi_chan, TEGRA_CSI_PHY_CILD_CONTROL0, 0);
+			tegra20_csi_write(csi_chan, TEGRA_CSI_CILD_PAD_CONFIG0, 0);
+			tegra20_csi_write(csi_chan, TEGRA_CSI_CILD_PAD_CONFIG1, 0);
+		}
+	} else {
+		tegra20_csi_write(csi_chan, TEGRA_CSI_PHY_CIL_CONTROL0(port), 0);
+		tegra20_csi_write(csi_chan, TEGRA_CSI_CIL_PAD_CONFIG0(port), 0);
+		tegra20_csi_write(csi_chan, TEGRA_CSI_CIL_PAD_CONFIG1(port), 0);
+	}
 
 	tegra20_vi_write(vi_chan, TEGRA_VI_VI_CORE_CONTROL, BIT(25 + port)); /* CSI_PP_YUV422 */
 
@@ -1097,9 +1163,18 @@ static int tegra20_csi_port_start_streaming(struct tegra_csi_channel *csi_chan,
 			  CSI_SKIP_PACKET_THRESHOLD(0x3f) |
 			  (csi_chan->numlanes - 1));
 
-	tegra20_csi_write(csi_chan, TEGRA_CSI_PHY_CIL_CONTROL0(port),
-			  CSI_CONTINUOUS_CLOCK_MODE_ENABLE |
-			  0x5); /* Clock settle time */
+	value = CSI_CONTINUOUS_CLOCK_MODE_ENABLE | CSI_DEFAULT_CLOCK_SETTLE_TIME;
+	if (csi->soc->has_paired_cil) {
+		if (port == PORT_A) {
+			tegra20_csi_write(csi_chan, TEGRA_CSI_PHY_CIL_CONTROL0(port), value);
+			tegra20_csi_write(csi_chan, TEGRA_CSI_PHY_CIL_CONTROL0(port + 1), value);
+		} else {
+			tegra20_csi_write(csi_chan, TEGRA_CSI_PHY_CILC_CONTROL0, value);
+			tegra20_csi_write(csi_chan, TEGRA_CSI_PHY_CILD_CONTROL0, value);
+		}
+	} else {
+		tegra20_csi_write(csi_chan, TEGRA_CSI_PHY_CIL_CONTROL0(port), value);
+	}
 
 	tegra20_vi_write(vi_chan, TEGRA_VI_CONT_SYNCPT_CSI_PP_FRAME_START(port),
 			 VI_CONT_SYNCPT_OUT_CONTINUOUS_SYNCPT |
@@ -1111,8 +1186,18 @@ static int tegra20_csi_port_start_streaming(struct tegra_csi_channel *csi_chan,
 			 host1x_syncpt_id(vi_chan->mw_ack_sp[0])
 			 << VI_CONT_SYNCPT_OUT_SYNCPT_IDX_SFT);
 
-	value = (port == PORT_A) ? CSI_A_PHY_CIL_ENABLE | CSI_B_PHY_CIL_DISABLE :
-		CSI_B_PHY_CIL_ENABLE | CSI_A_PHY_CIL_DISABLE;
+	if (csi->soc->has_paired_cil) {
+		if (port == PORT_A)
+			value = CSI_A_PHY_CIL_ENABLE | CSI_B_PHY_CIL_ENABLE |
+				CSI_C_PHY_CIL_DISABLE | CSI_D_PHY_CIL_DISABLE;
+		else
+			value = CSI_A_PHY_CIL_DISABLE | CSI_B_PHY_CIL_DISABLE |
+				CSI_C_PHY_CIL_ENABLE | CSI_D_PHY_CIL_ENABLE;
+	} else {
+		value = (port == PORT_A) ? CSI_A_PHY_CIL_ENABLE | CSI_B_PHY_CIL_DISABLE :
+			CSI_B_PHY_CIL_ENABLE | CSI_A_PHY_CIL_DISABLE;
+	}
+
 	tegra20_csi_write(csi_chan, TEGRA_CSI_PHY_CIL_COMMAND, value);
 
 	tegra20_csi_write(csi_chan, TEGRA_CSI_PIXEL_STREAM_PP_COMMAND(port),
@@ -1141,17 +1226,34 @@ static void tegra20_csi_port_stop_streaming(struct tegra_csi_channel *csi_chan,
 	dev_dbg(csi->dev, "TEGRA_CSI_CSI_CIL_STATUS 0x%08x\n", value);
 	tegra20_csi_write(csi_chan, TEGRA_CSI_CSI_CIL_STATUS, value);
 
+	if (csi->soc->has_paired_cil) {
+		value = tegra20_csi_read(csi_chan, TEGRA_CSI_CSI_CIL_STATUS_2);
+		dev_dbg(csi->dev, "TEGRA_CSI_CSI_CIL_STATUS_2 0x%08x\n", value);
+		tegra20_csi_write(csi_chan, TEGRA_CSI_CSI_CIL_STATUS_2, value);
+	}
+
 	tegra20_csi_write(csi_chan, TEGRA_CSI_PIXEL_STREAM_PP_COMMAND(port),
 			  CSI_PP_START_MARKER_FRAME_MAX(0xf) |
 			  CSI_PP_DISABLE);
 
-	if (csi_chan->numlanes == 4) {
-		tegra20_csi_write(csi_chan, TEGRA_CSI_PHY_CIL_COMMAND,
-				  CSI_A_PHY_CIL_DISABLE | CSI_B_PHY_CIL_DISABLE);
-	} else {
-		value = (port == PORT_A) ? CSI_A_PHY_CIL_DISABLE | CSI_B_PHY_CIL_NOP :
-			CSI_B_PHY_CIL_DISABLE | CSI_A_PHY_CIL_NOP;
+	if (csi->soc->has_paired_cil) {
+		if (port == PORT_A)
+			value = CSI_A_PHY_CIL_DISABLE | CSI_B_PHY_CIL_DISABLE |
+				CSI_C_PHY_CIL_NOP | CSI_D_PHY_CIL_NOP;
+		else
+			value = CSI_A_PHY_CIL_NOP | CSI_B_PHY_CIL_NOP |
+				CSI_C_PHY_CIL_DISABLE | CSI_D_PHY_CIL_DISABLE;
+
 		tegra20_csi_write(csi_chan, TEGRA_CSI_PHY_CIL_COMMAND, value);
+	} else {
+		if (csi_chan->numlanes == 4) {
+			tegra20_csi_write(csi_chan, TEGRA_CSI_PHY_CIL_COMMAND,
+					  CSI_A_PHY_CIL_DISABLE | CSI_B_PHY_CIL_DISABLE);
+		} else {
+			value = (port == PORT_A) ? CSI_A_PHY_CIL_DISABLE | CSI_B_PHY_CIL_NOP :
+				CSI_B_PHY_CIL_DISABLE | CSI_A_PHY_CIL_NOP;
+			tegra20_csi_write(csi_chan, TEGRA_CSI_PHY_CIL_COMMAND, value);
+		}
 	}
 }
 
@@ -1199,6 +1301,7 @@ const struct tegra_csi_soc tegra20_csi_soc = {
 	.csi_max_channels = 2, /* CSI-A and CSI-B */
 	.clk_names = tegra20_csi_clks,
 	.num_clks = ARRAY_SIZE(tegra20_csi_clks),
+	.has_paired_cil = false,
 };
 
 static const char * const tegra30_csi_clks[] = {
@@ -1213,6 +1316,24 @@ const struct tegra_csi_soc tegra30_csi_soc = {
 	.csi_max_channels = 2, /* CSI-A and CSI-B */
 	.clk_names = tegra30_csi_clks,
 	.num_clks = ARRAY_SIZE(tegra30_csi_clks),
+	.has_paired_cil = false,
+};
+
+static const char * const tegra114_csi_clks[] = {
+	"csi",
+	"csia-pad",
+	"csib-pad",
+	"cilab",
+	"cilcd",
+	"cile",
+};
+
+const struct tegra_csi_soc tegra114_csi_soc = {
+	.ops = &tegra20_csi_ops,
+	.csi_max_channels = 2, /* CSI-A and CSI-B */
+	.clk_names = tegra114_csi_clks,
+	.num_clks = ARRAY_SIZE(tegra114_csi_clks),
+	.has_paired_cil = true,
 };
 
 /* --------------------------------------------------------------------------
diff --git a/drivers/media/platform/nvidia/tegra-video/tegra210.c b/drivers/media/platform/nvidia/tegra-video/tegra210.c
index a6606768fa036..bedba5cafc897 100644
--- a/drivers/media/platform/nvidia/tegra-video/tegra210.c
+++ b/drivers/media/platform/nvidia/tegra-video/tegra210.c
@@ -1217,4 +1217,5 @@ const struct tegra_csi_soc tegra210_csi_soc = {
 	.num_clks = ARRAY_SIZE(tegra210_csi_cil_clks),
 	.tpg_frmrate_table = tegra210_tpg_frmrate_table,
 	.tpg_frmrate_table_size = ARRAY_SIZE(tegra210_tpg_frmrate_table),
+	.has_paired_cil = false,
 };
diff --git a/drivers/media/platform/nvidia/tegra-video/vi.c b/drivers/media/platform/nvidia/tegra-video/vi.c
index 0228a11013b05..3f02405da7386 100644
--- a/drivers/media/platform/nvidia/tegra-video/vi.c
+++ b/drivers/media/platform/nvidia/tegra-video/vi.c
@@ -1968,6 +1968,9 @@ static const struct of_device_id tegra_vi_of_id_table[] = {
 #if defined(CONFIG_ARCH_TEGRA_3x_SOC)
 	{ .compatible = "nvidia,tegra30-vi",  .data = &tegra30_vi_soc },
 #endif
+#if defined(CONFIG_ARCH_TEGRA_114_SOC)
+	{ .compatible = "nvidia,tegra114-vi", .data = &tegra114_vi_soc },
+#endif
 #if defined(CONFIG_ARCH_TEGRA_210_SOC)
 	{ .compatible = "nvidia,tegra210-vi", .data = &tegra210_vi_soc },
 #endif
diff --git a/drivers/media/platform/nvidia/tegra-video/vi.h b/drivers/media/platform/nvidia/tegra-video/vi.h
index ff5c9deed4c88..71b21434cf1ff 100644
--- a/drivers/media/platform/nvidia/tegra-video/vi.h
+++ b/drivers/media/platform/nvidia/tegra-video/vi.h
@@ -298,6 +298,9 @@ extern const struct tegra_vi_soc tegra20_vi_soc;
 #if defined(CONFIG_ARCH_TEGRA_3x_SOC)
 extern const struct tegra_vi_soc tegra30_vi_soc;
 #endif
+#if defined(CONFIG_ARCH_TEGRA_114_SOC)
+extern const struct tegra_vi_soc tegra114_vi_soc;
+#endif
 #if defined(CONFIG_ARCH_TEGRA_210_SOC)
 extern const struct tegra_vi_soc tegra210_vi_soc;
 #endif
diff --git a/drivers/media/platform/nvidia/tegra-video/video.c b/drivers/media/platform/nvidia/tegra-video/video.c
index d483fb709d127..55c17e7c930a2 100644
--- a/drivers/media/platform/nvidia/tegra-video/video.c
+++ b/drivers/media/platform/nvidia/tegra-video/video.c
@@ -132,6 +132,10 @@ static const struct of_device_id host1x_video_subdevs[] = {
 	{ .compatible = "nvidia,tegra30-csi", },
 	{ .compatible = "nvidia,tegra30-vi", },
 #endif
+#if defined(CONFIG_ARCH_TEGRA_114_SOC)
+	{ .compatible = "nvidia,tegra114-csi", },
+	{ .compatible = "nvidia,tegra114-vi", },
+#endif
 #if defined(CONFIG_ARCH_TEGRA_210_SOC)
 	{ .compatible = "nvidia,tegra210-csi", },
 	{ .compatible = "nvidia,tegra210-vi", },
-- 
2.53.0

[PATCH v1 09/10] ARM: tegra: Remove fallback compatible from Tegra30 VI node

[Svyatoslav Ryhel]

Tegra30 now has its own specific compatible string for the VI. Remove the
Tegra20 fallback, as it may interfere with the correct configuration of
the device.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
---
 arch/arm/boot/dts/nvidia/tegra30.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/nvidia/tegra30.dtsi b/arch/arm/boot/dts/nvidia/tegra30.dtsi
index 1e51da329f310..e1f66240ae552 100644
--- a/arch/arm/boot/dts/nvidia/tegra30.dtsi
+++ b/arch/arm/boot/dts/nvidia/tegra30.dtsi
@@ -150,7 +150,7 @@ mpe@54040000 {
 		};
 
 		vi@54080000 {
-			compatible = "nvidia,tegra30-vi", "nvidia,tegra20-vi";
+			compatible = "nvidia,tegra30-vi";
 			reg = <0x54080000 0x00000800>;
 			interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&tegra_car TEGRA30_CLK_VI>;
-- 
2.53.0

[PATCH v1 10/10] ARM: tegra: Add CSI node for Tegra114

[Svyatoslav Ryhel]

Add CSI node to Tegra114 device tree.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
---
 arch/arm/boot/dts/nvidia/tegra114.dtsi | 34 +++++++++++++++++++++++++-
 1 file changed, 33 insertions(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/nvidia/tegra114.dtsi b/arch/arm/boot/dts/nvidia/tegra114.dtsi
index f2766c11ee6c3..61120658f0687 100644
--- a/arch/arm/boot/dts/nvidia/tegra114.dtsi
+++ b/arch/arm/boot/dts/nvidia/tegra114.dtsi
@@ -53,7 +53,7 @@ host1x@50000000 {
 
 		vi@54080000 {
 			compatible = "nvidia,tegra114-vi";
-			reg = <0x54080000 0x00040000>;
+			reg = <0x54080000 0x00000800>;
 			interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&tegra_car TEGRA114_CLK_VI>;
 			resets = <&tegra_car 20>;
@@ -64,6 +64,38 @@ vi@54080000 {
 			iommus = <&mc TEGRA_SWGROUP_VI>;
 
 			status = "disabled";
+
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			ranges = <0x0 0x54080000 0x4000>;
+
+			csi@800 {
+				compatible = "nvidia,tegra114-csi";
+				reg = <0x800 0x200>;
+				clocks = <&tegra_car TEGRA114_CLK_CSI>,
+					 <&tegra_car TEGRA114_CLK_CSIA_PAD>,
+					 <&tegra_car TEGRA114_CLK_CSIB_PAD>,
+					 <&tegra_car TEGRA114_CLK_CILAB>,
+					 <&tegra_car TEGRA114_CLK_CILCD>,
+					 <&tegra_car TEGRA114_CLK_CILE>;
+				clock-names = "csi", "csia-pad", "csib-pad",
+					      "cilab", "cilcd", "cile";
+				power-domains = <&pd_venc>;
+
+				assigned-clocks = <&tegra_car TEGRA114_CLK_CILAB>,
+						  <&tegra_car TEGRA114_CLK_CILCD>,
+						  <&tegra_car TEGRA114_CLK_CILE>;
+				assigned-clock-parents = <&tegra_car TEGRA114_CLK_PLL_P>,
+							 <&tegra_car TEGRA114_CLK_PLL_P>,
+							 <&tegra_car TEGRA114_CLK_PLL_P>;
+				assigned-clock-rates = <102000000>, <102000000>, <102000000>;
+
+				status = "disabled";
+
+				#address-cells = <1>;
+				#size-cells = <0>;
+			};
 		};
 
 		epp@540c0000 {
-- 
2.53.0

Re: [PATCH v1 07/10] dt-bindings: display: tegra: Document Tegra114 CSI

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 2 potential
issues to consider:
- [Medium] dt-bindings: display: tegra: broken clock-names and clocks
  bounds for Tegra30
- [Low] dt-bindings: display: tegra: unwieldy conditionals for Tegra114
  CSI variant
--

commit bc3414960c2f3dc8bae0883c0237f89de055bb7d
Author: Svyatoslav Ryhel <clamor95@gmail.com>

dt-bindings: display: tegra: Document Tegra114 CSI

This commit adds the nvidia,tegra114-csi compatible string and its clock and
calibration constraints to the Tegra20 CSI binding schema.

> diff --git a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-csi.yaml b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-csi.yaml
> index a1aea9590769f..0c18ac81c6d6f 100644
> --- a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-csi.yaml
> +++ b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-csi.yaml
> @@ -14,6 +14,7 @@ properties:
>      enum:
>        - nvidia,tegra20-csi
>        - nvidia,tegra30-csi
> +      - nvidia,tegra114-csi
>  
>    reg:
>      maxItems: 1
> @@ -24,12 +25,18 @@ properties:
>        - description: module clock
>        - description: PAD A clock
>        - description: PAD B clock
> +      - description: A/B lanes clock
> +      - description: C/D lanes clock
> +      - description: E lane clock
>  
>    clock-names:
>      items:
>        - const: csi
>        - const: csia-pad
>        - const: csib-pad
> +      - const: cilab
> +      - const: cilcd
> +      - const: cile

[Severity: Medium]
Does extending the top-level clock-names items list to 6 entries without
setting minItems: 3 cause dtbs_check to fail on Tegra30 device trees?

Without an explicit minItems at the top level, dtschema defaults clock-names
to minItems: 6, which cannot be relaxed by the minItems: 3 rule in the
nvidia,tegra30-csi allOf branch and causes csi@800 in
arch/arm/boot/dts/nvidia/tegra30.dtsi to fail validation.  In addition,
expanding the top-level clocks and clock-names lists to 6 items leaves
nvidia,tegra30-csi without an upper bound unless maxItems: 3 is added to its
conditional block.

> @@ -125,6 +132,22 @@ allOf:
>          clock-names:
>            minItems: 3
>  
> +  - if:
> +      properties:
> +        compatible:
> +          contains:
> +            enum:
> +              - nvidia,tegra114-csi
> +    then:
> +      properties:
> +        "#nvidia,mipi-calibrate-cells": false
> +
> +        clocks:
> +          minItems: 6
> +
> +        clock-names:
> +          minItems: 6
> +
>  additionalProperties: false
>  
>  required:

[Severity: Low]
Would nvidia,tegra114-csi fit better in a separate binding schema document?

With this addition, every compatible string in nvidia,tegra20-csi.yaml needs
its own if/then block to override clocks, clock-names, and
#nvidia,mipi-calibrate-cells.  Tegra114 CSI also differs in its hardware
layout: it adds CIL C/D and E lane clocks for a third port while the shared
schema restricts patternProperties to ^channel@[0-1]$, and
include/dt-bindings/clock/tegra114-car.h does not define the csia-pad or
csib-pad clocks required here.

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20261113161819.36847-1-clamor95@gmail.com?part=7

Re: [PATCH v1 05/10] media: tegra-video: vi: Use entity function to check subdev type

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 1 potential
issue to consider:
- [High] media: tegra-video: ERR_PTR deref in
  tegra_channel_get_remote_source_subdev()
--

commit a0a0dd1c4d66f50cccd70079714c29c0b22431b6
Author: Svyatoslav Ryhel <clamor95@gmail.com>

media: tegra-video: vi: Use entity function to check subdev type

This commit updates tegra_channel_get_remote_source_subdev() to stop
walking upstream subdevices when it reaches an entity with function
MEDIA_ENT_F_PROC_VIDEO_ISP or MEDIA_ENT_F_CAM_SENSOR instead of checking
pad flags.

> diff --git a/drivers/media/platform/nvidia/tegra-video/vi.c b/drivers/media/platform/nvidia/tegra-video/vi.c
> index a96ef26af89eb..139e3ff0faaed 100644
> --- a/drivers/media/platform/nvidia/tegra-video/vi.c
> +++ b/drivers/media/platform/nvidia/tegra-video/vi.c
> @@ -189,13 +189,12 @@ tegra_channel_get_remote_source_subdev(struct tegra_vi_channel *chan)
>  
>  	entity = &subdev->entity;
>  
> -	pad = &subdev->entity.pads[0];
> -	while (!(pad->flags & MEDIA_PAD_FL_SOURCE)) {
> +	while (entity->function != MEDIA_ENT_F_PROC_VIDEO_ISP &&
> +	       entity->function != MEDIA_ENT_F_CAM_SENSOR) {
>  		pad = media_entity_remote_source_pad_unique(entity);
>  		if (!pad || !is_media_entity_v4l2_subdev(pad->entity))
>  			break;

[Severity: High]
Can this dereference an error pointer at pad->entity when a pipeline
ends at a non-sensor, non-ISP source?

media_entity_remote_source_pad_unique() calls
media_entity_remote_pad_unique(), which returns ERR_PTR(-ENOLINK) rather
than NULL when an entity has no enabled upstream source link.  Previously,
the loop condition !(pad->flags & MEDIA_PAD_FL_SOURCE) exited before
calling media_entity_remote_source_pad_unique() on a single-pad source
subdev.  With the new condition, a terminal source whose function is
neither MEDIA_ENT_F_PROC_VIDEO_ISP nor MEDIA_ENT_F_CAM_SENSOR (such as the
CSI subdev in TPG mode or an HDMI/TV decoder with
MEDIA_ENT_F_VID_IF_BRIDGE, MEDIA_ENT_F_DV_DECODER, or
MEDIA_ENT_F_ATV_DECODER) enters the loop, receives ERR_PTR(-ENOLINK) in
pad, passes !pad, and crashes when is_media_entity_v4l2_subdev(pad->entity)
dereferences pad.

Checking IS_ERR(pad) instead of !pad would avoid the bad dereference.

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20261113161819.36847-1-clamor95@gmail.com?part=5

Re: [PATCH v1 04/10] media: tegra-video: vi: Switch to media_entity_remote_source_pad_unique() helper

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 1 potential
issue to consider:
- [High] media: tegra-video: ERR_PTR deref in
  tegra_channel_get_remote_source_subdev()
--

commit e0cde12330277b56d30a1de11e5da15a2551007a
Author: Svyatoslav Ryhel <clamor95@gmail.com>

media: tegra-video: vi: Switch to media_entity_remote_source_pad_unique() helper

This commit replaces media_pad_remote_pad_first() with
media_entity_remote_source_pad_unique() in
tegra_channel_get_remote_source_subdev() so multi-pad entities do not assume
pad 0 is the remote source pad.

> diff --git a/drivers/media/platform/nvidia/tegra-video/vi.c b/drivers/media/platform/nvidia/tegra-video/vi.c
> index 12eaa89304e84..a96ef26af89eb 100644
> --- a/drivers/media/platform/nvidia/tegra-video/vi.c
> +++ b/drivers/media/platform/nvidia/tegra-video/vi.c
> @@ -187,9 +187,11 @@ tegra_channel_get_remote_source_subdev(struct tegra_vi_channel *chan)
>  	if (!subdev)
>  		return NULL;
>  
> +	entity = &subdev->entity;
> +
>  	pad = &subdev->entity.pads[0];
>  	while (!(pad->flags & MEDIA_PAD_FL_SOURCE)) {
> -		pad = media_pad_remote_pad_first(pad);
> +		pad = media_entity_remote_source_pad_unique(entity);
>  		if (!pad || !is_media_entity_v4l2_subdev(pad->entity))
>  			break;
>  		entity = pad->entity;

[Severity: High]
Can this dereference an error pointer at pad->entity?

Unlike media_pad_remote_pad_first(), which returns NULL when no enabled
link is found, media_entity_remote_source_pad_unique() wraps
media_entity_remote_pad_unique() and returns ERR_PTR(-ENOLINK) or
ERR_PTR(-ENOTUNIQ) on failure.  If the upstream link is disabled or
missing, !pad is false and pad->entity faults.  Should the check use
IS_ERR(pad) instead of !pad?

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20261113161819.36847-1-clamor95@gmail.com?part=4

Re: [PATCH v1 06/10] media: tegra-video: vi: Adjust pad assignment logic

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 1 potential
issue to consider:
- [Medium] media: tegra-video: unpopulated pad index in
  __tegra_channel_try_format()
--

commit afb13afd32b21ef80b48671edacb48e14ada5d73
Author: Svyatoslav Ryhel <clamor95@gmail.com>

media: tegra-video: vi: Adjust pad assignment logic

This commit populates the pad field in V4L2 subdevice format, selection, and
enumeration structures using media_get_pad_index() instead of assuming the
source pad is at index 0.

> diff --git a/drivers/media/platform/nvidia/tegra-video/vi.c b/drivers/media/platform/nvidia/tegra-video/vi.c
> index 139e3ff0faaed..f028780f07bde 100644
> --- a/drivers/media/platform/nvidia/tegra-video/vi.c
> +++ b/drivers/media/platform/nvidia/tegra-video/vi.c

[ ... ]

> @@ -465,7 +471,9 @@ static int __tegra_channel_try_format(struct tegra_vi_channel *chan,
>  	}
>  
>  	pix->field = V4L2_FIELD_NONE;
> -	fmt.pad = 0;
> +	fmt.pad = media_get_pad_index(&subdev->entity, MEDIA_PAD_FL_SOURCE,
> +				      PAD_SIGNAL_DEFAULT);
> +
>  	v4l2_fill_mbus_format(&fmt.format, pix, fmtinfo->code);
>  
>  	/*

[Severity: Medium]
Should fse.pad, sdsel.pad, and the pad argument to
v4l2_subdev_state_get_crop() also be set to the source pad index in
__tegra_channel_try_format()?

Right after this hunk, __tegra_channel_try_format() still targets pad 0 for
those operations:

drivers/media/platform/nvidia/tegra-video/vi.c:__tegra_channel_try_format() {
    ...
	try_crop = v4l2_subdev_state_get_crop(sd_state, 0);
	fse.code = fmtinfo->code;
	ret = v4l2_subdev_call(subdev, pad, enum_frame_size, sd_state, &fse);
	if (ret) {
		if (!v4l2_subdev_has_op(subdev, pad, get_selection) ||
		    v4l2_subdev_call(subdev, pad, get_selection, NULL, NULL, &sdsel)) {
    ...
}

When the remote subdevice's source pad is not at index 0, enum_frame_size
and get_selection query pad 0 with a source-pad media bus code, and try_crop
updates pad 0's crop rectangle in sd_state instead of fmt.pad's before
set_fmt runs on fmt.pad.

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20261113161819.36847-1-clamor95@gmail.com?part=6

Re: [PATCH v1 10/10] ARM: tegra: Add CSI node for Tegra114

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 1 potential
issue to consider:
- [High] ARM: dts: tegra114: undefined TEGRA114_CLK_CSIA_PAD and
  TEGRA114_CLK_CSIB_PAD in csi@800
--

commit f51e7b055195911c3530d9e3bca74397442d3256
Author: Svyatoslav Ryhel <clamor95@gmail.com>

ARM: tegra: Add CSI node for Tegra114

This commit adds the CSI child node under the VI node in the Tegra114
device tree and shrinks the VI node's reg range to accommodate it.

> diff --git a/arch/arm/boot/dts/nvidia/tegra114.dtsi b/arch/arm/boot/dts/nvidia/tegra114.dtsi
> index a5958f3a965b2..0d1328c4d3c8e 100644
> --- a/arch/arm/boot/dts/nvidia/tegra114.dtsi
> +++ b/arch/arm/boot/dts/nvidia/tegra114.dtsi
> @@ -53,7 +53,7 @@ host1x@50000000 {
>  
>  		vi@54080000 {
>  			compatible = "nvidia,tegra114-vi";
> -			reg = <0x54080000 0x00040000>;
> +			reg = <0x54080000 0x00000800>;
>  			interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
>  			clocks = <&tegra_car TEGRA114_CLK_VI>;
>  			resets = <&tegra_car 20>;
> @@ -64,6 +64,38 @@ vi@54080000 {
>  			iommus = <&mc TEGRA_SWGROUP_VI>;
>  
>  			status = "disabled";
> +
> +			#address-cells = <1>;
> +			#size-cells = <1>;
> +
> +			ranges = <0x0 0x54080000 0x4000>;
> +
> +			csi@800 {
> +				compatible = "nvidia,tegra114-csi";
> +				reg = <0x800 0x200>;
> +				clocks = <&tegra_car TEGRA114_CLK_CSI>,
> +					 <&tegra_car TEGRA114_CLK_CSIA_PAD>,
> +					 <&tegra_car TEGRA114_CLK_CSIB_PAD>,
> +					 <&tegra_car TEGRA114_CLK_CILAB>,
> +					 <&tegra_car TEGRA114_CLK_CILCD>,
> +					 <&tegra_car TEGRA114_CLK_CILE>;
> +				clock-names = "csi", "csia-pad", "csib-pad",
> +					      "cilab", "cilcd", "cile";

[Severity: High]
Are TEGRA114_CLK_CSIA_PAD and TEGRA114_CLK_CSIB_PAD defined?

include/dt-bindings/clock/tegra114-car.h does not define either macro, and
tegra114_periph_clk_init() in drivers/clk/tegra/clk-tegra114.c does not
register the csia_pad or csib_pad clock gates.  Leaving these macros
undefined causes dtc to fail with a syntax error when building any
Tegra114 device tree.

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20261113161819.36847-1-clamor95@gmail.com?part=10

Re: [PATCH v1 01/10] staging: media: tegra-video: Move driver to media/platform/nvidia

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 2 potential
issues to consider:
- [Low] media: tegra-video: dangling staging path in MAINTAINERS after
  directory move
- [Low] media: tegra-video: incomplete destaging leaves TODO file and
  staging hacks
--

commit a8916ec654eff39d7e3b979839383852a183e987
Author: Svyatoslav Ryhel <clamor95@gmail.com>

staging: media: tegra-video: Move driver to media/platform/nvidia

This commit moves the Tegra Video Input driver from
drivers/staging/media/tegra-video/ to
drivers/media/platform/nvidia/tegra-video/.

> diff --git a/drivers/media/platform/nvidia/Kconfig b/drivers/media/platform/nvidia/Kconfig
> index b211b46877f63..53f34308f5aff 100644
> --- a/drivers/media/platform/nvidia/Kconfig
> +++ b/drivers/media/platform/nvidia/Kconfig
> @@ -3,3 +3,5 @@
>  comment "NVidia media platform drivers"
>  
>  source "drivers/media/platform/nvidia/tegra-vde/Kconfig"
> +
> +source "drivers/media/platform/nvidia/tegra-video/Kconfig"

[Severity: Low]
Should MAINTAINERS also be updated to point to
drivers/media/platform/nvidia/tegra-video/?

The TEGRA VIDEO DRIVER entry in MAINTAINERS still lists
drivers/staging/media/tegra-video/, which causes
scripts/get_maintainer.pl --self-test=patterns to report a broken file
pattern and prevents get_maintainer.pl from matching the moved files.

[ ... ]

> diff --git a/drivers/staging/media/tegra-video/TODO b/drivers/media/platform/nvidia/tegra-video/TODO
> similarity index 100%
> rename from drivers/staging/media/tegra-video/TODO
> rename to drivers/media/platform/nvidia/tegra-video/TODO

[Severity: Low]
Should the staging TODO file and remaining staging workarounds be resolved
or removed before moving this driver out of staging?

Renaming drivers/staging/media/tegra-video/TODO leaves an open staging
TODO list (ganged mode, Tegra210 RAW10 packed format support,
suspend/resume, and v4l2-compliance verification) in
drivers/media/platform/nvidia/tegra-video/TODO.  In addition,
tegra20_vi_enable() in tegra20.c still calls ioremap(TEGRA_APB_MISC_BASE,
PAGE_SIZE) on a hardcoded physical address for an unsynchronized
read-modify-write on a shared APB_MISC register, and
__tegra_channel_try_format() in vi.c still calls the internal
__v4l2_subdev_state_alloc() helper with a FIXME noting that drivers must
not use it.

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20261113161819.36847-1-clamor95@gmail.com?part=1