* [PATCH] i915: fix ironlake edp panel setup. @ 2010-06-25 6:21 Dave Airlie 2010-06-25 6:59 ` Keith Packard 2010-06-26 9:56 ` Zhenyu Wang 0 siblings, 2 replies; 5+ messages in thread From: Dave Airlie @ 2010-06-25 6:21 UTC (permalink / raw) To: intel-gfx From: Dave Airlie <airlied@redhat.com> We've just gotten an eDP laptop, and kms was booting to a black screen. as much as I hate Keith's magic * 3, it seems to work a lot better than the non-magic. aligning the non-magic seems to make things a lot happier, and aligns better with what the bios appears to do, since the bios ends up using thehigher clock in VGA mode. Signed-off-by: Dave Airlie <airlied@redhat.com> --- drivers/gpu/drm/i915/intel_dp.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index 6094e42..80e122d 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c @@ -133,7 +133,7 @@ intel_dp_link_required(struct drm_device *dev, struct intel_dp_priv *dp_priv = intel_encoder->dev_priv; if (IS_eDP(intel_encoder) || IS_PCH_eDP(dp_priv)) - return (pixel_clock * dev_priv->edp_bpp) / 8; + return (pixel_clock * ALIGN(dev_priv->edp_bpp, 8)) / 8; else return pixel_clock * 3; } -- 1.7.1 ^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [PATCH] i915: fix ironlake edp panel setup. 2010-06-25 6:21 [PATCH] i915: fix ironlake edp panel setup Dave Airlie @ 2010-06-25 6:59 ` Keith Packard 2010-06-25 11:16 ` Ben Guthro 2010-06-26 9:56 ` Zhenyu Wang 1 sibling, 1 reply; 5+ messages in thread From: Keith Packard @ 2010-06-25 6:59 UTC (permalink / raw) To: Dave Airlie, intel-gfx [-- Attachment #1.1: Type: text/plain, Size: 490 bytes --] On Fri, 25 Jun 2010 16:21:40 +1000, Dave Airlie <airlied@gmail.com> wrote: > From: Dave Airlie <airlied@redhat.com> > > We've just gotten an eDP laptop, and kms was booting to a black screen. > > as much as I hate Keith's magic * 3, it seems to work a lot better > than the non-magic. My *3 was based on the belief that we transmit 3 bytes for each pixel, independent of the pixel format. It worked pretty well for most of the sizes I tried... -- keith.packard@intel.com [-- Attachment #1.2: Type: application/pgp-signature, Size: 189 bytes --] [-- Attachment #2: Type: text/plain, Size: 159 bytes --] _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH] i915: fix ironlake edp panel setup. 2010-06-25 6:59 ` Keith Packard @ 2010-06-25 11:16 ` Ben Guthro 0 siblings, 0 replies; 5+ messages in thread From: Ben Guthro @ 2010-06-25 11:16 UTC (permalink / raw) To: Keith Packard; +Cc: intel-gfx FWIW, this didn't seem solve the boot issue I'm seeing with the Dell E6410... On Fri, Jun 25, 2010 at 2:59 AM, Keith Packard <keithp@keithp.com> wrote: > On Fri, 25 Jun 2010 16:21:40 +1000, Dave Airlie <airlied@gmail.com> wrote: >> From: Dave Airlie <airlied@redhat.com> >> >> We've just gotten an eDP laptop, and kms was booting to a black screen. >> >> as much as I hate Keith's magic * 3, it seems to work a lot better >> than the non-magic. > > My *3 was based on the belief that we transmit 3 bytes for each pixel, > independent of the pixel format. It worked pretty well for most of the > sizes I tried... > > -- > keith.packard@intel.com > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx > > ^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH] i915: fix ironlake edp panel setup. 2010-06-25 6:21 [PATCH] i915: fix ironlake edp panel setup Dave Airlie 2010-06-25 6:59 ` Keith Packard @ 2010-06-26 9:56 ` Zhenyu Wang 2010-06-27 23:46 ` Dave Airlie 1 sibling, 1 reply; 5+ messages in thread From: Zhenyu Wang @ 2010-06-26 9:56 UTC (permalink / raw) To: Dave Airlie; +Cc: intel-gfx [-- Attachment #1.1: Type: text/plain, Size: 1788 bytes --] On 2010.06.25 16:21:40 +1000, Dave Airlie wrote: > From: Dave Airlie <airlied@redhat.com> > > We've just gotten an eDP laptop, and kms was booting to a black screen. > > as much as I hate Keith's magic * 3, it seems to work a lot better than the non-magic. > > aligning the non-magic seems to make things a lot happier, and aligns better with what the bios appears to do, since the bios ends up using thehigher clock in VGA mode. > > Signed-off-by: Dave Airlie <airlied@redhat.com> > --- > drivers/gpu/drm/i915/intel_dp.c | 2 +- > 1 files changed, 1 insertions(+), 1 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c > index 6094e42..80e122d 100644 > --- a/drivers/gpu/drm/i915/intel_dp.c > +++ b/drivers/gpu/drm/i915/intel_dp.c > @@ -133,7 +133,7 @@ intel_dp_link_required(struct drm_device *dev, > struct intel_dp_priv *dp_priv = intel_encoder->dev_priv; > > if (IS_eDP(intel_encoder) || IS_PCH_eDP(dp_priv)) > - return (pixel_clock * dev_priv->edp_bpp) / 8; > + return (pixel_clock * ALIGN(dev_priv->edp_bpp, 8)) / 8; > else > return pixel_clock * 3; > } > -- Dave, we've found this breaks one 1600x900 eDP panel on our side, although it might fix other panels requiring high rate even low rate can fit. Modeline 0:"1600x900" 0 107840 1600 1691 1752 1904 900 906 917 944 0x8 0x0 Clock is 107840khz, and the color depth is 18. Max number of lane from DPCD is 1. So with your change, it will exceed 2.7Ghz. We've been told that we should try from highest config to lower ones until training can succeed, that seems the only stable way to get correct clock for eDP. -- Open Source Technology Center, Intel ltd. $gpg --keyserver wwwkeys.pgp.net --recv-keys 4D781827 [-- Attachment #1.2: Digital signature --] [-- Type: application/pgp-signature, Size: 198 bytes --] [-- Attachment #2: Type: text/plain, Size: 159 bytes --] _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH] i915: fix ironlake edp panel setup. 2010-06-26 9:56 ` Zhenyu Wang @ 2010-06-27 23:46 ` Dave Airlie 0 siblings, 0 replies; 5+ messages in thread From: Dave Airlie @ 2010-06-27 23:46 UTC (permalink / raw) To: Zhenyu Wang, Dave Airlie, intel-gfx On Sat, Jun 26, 2010 at 7:56 PM, Zhenyu Wang <zhenyuw@linux.intel.com> wrote: > On 2010.06.25 16:21:40 +1000, Dave Airlie wrote: >> From: Dave Airlie <airlied@redhat.com> >> >> We've just gotten an eDP laptop, and kms was booting to a black screen. >> >> as much as I hate Keith's magic * 3, it seems to work a lot better than the non-magic. >> >> aligning the non-magic seems to make things a lot happier, and aligns better with what the bios appears to do, since the bios ends up using thehigher clock in VGA mode. >> >> Signed-off-by: Dave Airlie <airlied@redhat.com> >> --- >> drivers/gpu/drm/i915/intel_dp.c | 2 +- >> 1 files changed, 1 insertions(+), 1 deletions(-) >> >> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c >> index 6094e42..80e122d 100644 >> --- a/drivers/gpu/drm/i915/intel_dp.c >> +++ b/drivers/gpu/drm/i915/intel_dp.c >> @@ -133,7 +133,7 @@ intel_dp_link_required(struct drm_device *dev, >> struct intel_dp_priv *dp_priv = intel_encoder->dev_priv; >> >> if (IS_eDP(intel_encoder) || IS_PCH_eDP(dp_priv)) >> - return (pixel_clock * dev_priv->edp_bpp) / 8; >> + return (pixel_clock * ALIGN(dev_priv->edp_bpp, 8)) / 8; >> else >> return pixel_clock * 3; >> } >> -- > > Dave, we've found this breaks one 1600x900 eDP panel on our side, although > it might fix other panels requiring high rate even low rate can fit. > > Modeline 0:"1600x900" 0 107840 1600 1691 1752 1904 900 906 917 944 0x8 0x0 > > Clock is 107840khz, and the color depth is 18. Max number of lane from DPCD > is 1. So with your change, it will exceed 2.7Ghz. > > We've been told that we should try from highest config to lower ones until > training can succeed, that seems the only stable way to get correct clock > for eDP. > Can you try the latest patch I send to the list? it uses the overheads given in the eDP spec, but they should apply to normal DP as well. Dave. ^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2010-06-27 23:46 UTC | newest] Thread overview: 5+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2010-06-25 6:21 [PATCH] i915: fix ironlake edp panel setup Dave Airlie 2010-06-25 6:59 ` Keith Packard 2010-06-25 11:16 ` Ben Guthro 2010-06-26 9:56 ` Zhenyu Wang 2010-06-27 23:46 ` Dave Airlie
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