From: Peter Ujfalusi <peter.ujfalusi@ti.com>
To: Mark Brown <broonie@kernel.org>, Liam Girdwood <lgirdwood@gmail.com>
Cc: alsa-devel@alsa-project.org, jsarha@ti.com, zonque@gmail.com
Subject: [PATCH 1/7] ASoC: davinci-mcasp: Fix bit clock polarity settings
Date: Fri, 4 Apr 2014 14:31:41 +0300 [thread overview]
Message-ID: <1396611107-30765-2-git-send-email-peter.ujfalusi@ti.com> (raw)
In-Reply-To: <1396611107-30765-1-git-send-email-peter.ujfalusi@ti.com>
IB_NF, NB_IF and IB_IF configured the bc polarity incorrectly. The receive
polarity was set to the same edge as the TX in these cases.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
---
sound/soc/davinci/davinci-mcasp.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/sound/soc/davinci/davinci-mcasp.c b/sound/soc/davinci/davinci-mcasp.c
index aae7d69af699..95b38f74e2af 100644
--- a/sound/soc/davinci/davinci-mcasp.c
+++ b/sound/soc/davinci/davinci-mcasp.c
@@ -331,7 +331,7 @@ static int davinci_mcasp_set_dai_fmt(struct snd_soc_dai *cpu_dai,
mcasp_clr_bits(mcasp, DAVINCI_MCASP_ACLKXCTL_REG, ACLKXPOL);
mcasp_clr_bits(mcasp, DAVINCI_MCASP_TXFMCTL_REG, FSXPOL);
- mcasp_set_bits(mcasp, DAVINCI_MCASP_ACLKRCTL_REG, ACLKRPOL);
+ mcasp_clr_bits(mcasp, DAVINCI_MCASP_ACLKRCTL_REG, ACLKRPOL);
mcasp_clr_bits(mcasp, DAVINCI_MCASP_RXFMCTL_REG, FSRPOL);
break;
@@ -339,7 +339,7 @@ static int davinci_mcasp_set_dai_fmt(struct snd_soc_dai *cpu_dai,
mcasp_set_bits(mcasp, DAVINCI_MCASP_ACLKXCTL_REG, ACLKXPOL);
mcasp_set_bits(mcasp, DAVINCI_MCASP_TXFMCTL_REG, FSXPOL);
- mcasp_clr_bits(mcasp, DAVINCI_MCASP_ACLKRCTL_REG, ACLKRPOL);
+ mcasp_set_bits(mcasp, DAVINCI_MCASP_ACLKRCTL_REG, ACLKRPOL);
mcasp_set_bits(mcasp, DAVINCI_MCASP_RXFMCTL_REG, FSRPOL);
break;
@@ -347,7 +347,7 @@ static int davinci_mcasp_set_dai_fmt(struct snd_soc_dai *cpu_dai,
mcasp_clr_bits(mcasp, DAVINCI_MCASP_ACLKXCTL_REG, ACLKXPOL);
mcasp_set_bits(mcasp, DAVINCI_MCASP_TXFMCTL_REG, FSXPOL);
- mcasp_set_bits(mcasp, DAVINCI_MCASP_ACLKRCTL_REG, ACLKRPOL);
+ mcasp_clr_bits(mcasp, DAVINCI_MCASP_ACLKRCTL_REG, ACLKRPOL);
mcasp_set_bits(mcasp, DAVINCI_MCASP_RXFMCTL_REG, FSRPOL);
break;
--
1.9.1
next prev parent reply other threads:[~2014-04-04 11:31 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-04-04 11:31 [PATCH 0/7] ASoC:davinci-mcasp: bc polarity fix and proper format support Peter Ujfalusi
2014-04-04 11:31 ` Peter Ujfalusi [this message]
2014-04-08 18:04 ` [PATCH 1/7] ASoC: davinci-mcasp: Fix bit clock polarity settings Mark Brown
2014-04-04 11:31 ` [PATCH 2/7] ASoC: davinci-mcasp: Format data delay configuration enhancement Peter Ujfalusi
2014-04-04 11:31 ` [PATCH 3/7] ASoC: davinci-mcasp: Support for DSP_A format Peter Ujfalusi
2014-04-04 11:31 ` [PATCH 4/7] ASoC: davinci-mcasp: Move the FS polarity change out from the switch case Peter Ujfalusi
2014-04-04 11:31 ` [PATCH 5/7] ASoC: davinci-mcasp: Add support for I2S format Peter Ujfalusi
2014-04-04 11:31 ` [PATCH 6/7] ASoC: davinci-mcasp: Support for LEFT_J format Peter Ujfalusi
2014-04-04 11:31 ` [PATCH 7/7] ASoC: davinci-mcasp: Remove excess empty lines from davinci_mcasp_set_dai_fmt() Peter Ujfalusi
2014-04-04 13:24 ` [PATCH 0/7] ASoC:davinci-mcasp: bc polarity fix and proper format support Daniel Mack
2014-04-04 16:38 ` Peter Ujfalusi
2014-04-09 12:12 ` Daniel Mack
2014-04-09 12:51 ` Peter Ujfalusi
2014-04-14 16:24 ` Mark Brown
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