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From: Peter Ujfalusi <peter.ujfalusi@ti.com>
To: Mark Brown <broonie@kernel.org>, Liam Girdwood <lgirdwood@gmail.com>
Cc: alsa-devel@alsa-project.org, jsarha@ti.com, zonque@gmail.com
Subject: [PATCH 2/7] ASoC: davinci-mcasp: Format data delay configuration enhancement
Date: Fri, 4 Apr 2014 14:31:42 +0300	[thread overview]
Message-ID: <1396611107-30765-3-git-send-email-peter.ujfalusi@ti.com> (raw)
In-Reply-To: <1396611107-30765-1-git-send-email-peter.ujfalusi@ti.com>

Use intermediate variable for the data delay needed for the specific format
and write the register after the format configuration at once.
This will help to control the number of lines as support for more formats
going to be added.
Also fixes a case when we switch between two formats with different delay
requirements.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
---
 sound/soc/davinci/davinci-mcasp.c | 14 +++++++++++---
 1 file changed, 11 insertions(+), 3 deletions(-)

diff --git a/sound/soc/davinci/davinci-mcasp.c b/sound/soc/davinci/davinci-mcasp.c
index 95b38f74e2af..d9ea709cb6d0 100644
--- a/sound/soc/davinci/davinci-mcasp.c
+++ b/sound/soc/davinci/davinci-mcasp.c
@@ -264,6 +264,7 @@ static int davinci_mcasp_set_dai_fmt(struct snd_soc_dai *cpu_dai,
 {
 	struct davinci_mcasp *mcasp = snd_soc_dai_get_drvdata(cpu_dai);
 	int ret = 0;
+	u32 data_delay;
 
 	pm_runtime_get_sync(mcasp->dev);
 	switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
@@ -271,18 +272,25 @@ static int davinci_mcasp_set_dai_fmt(struct snd_soc_dai *cpu_dai,
 	case SND_SOC_DAIFMT_AC97:
 		mcasp_clr_bits(mcasp, DAVINCI_MCASP_TXFMCTL_REG, FSXDUR);
 		mcasp_clr_bits(mcasp, DAVINCI_MCASP_RXFMCTL_REG, FSRDUR);
+
+		/* No delay after FS */
+		data_delay = 0;
 		break;
 	default:
 		/* configure a full-word SYNC pulse (LRCLK) */
 		mcasp_set_bits(mcasp, DAVINCI_MCASP_TXFMCTL_REG, FSXDUR);
 		mcasp_set_bits(mcasp, DAVINCI_MCASP_RXFMCTL_REG, FSRDUR);
 
-		/* make 1st data bit occur one ACLK cycle after the frame sync */
-		mcasp_set_bits(mcasp, DAVINCI_MCASP_TXFMT_REG, FSXDLY(1));
-		mcasp_set_bits(mcasp, DAVINCI_MCASP_RXFMT_REG, FSRDLY(1));
+		/* 1st data bit occur one ACLK cycle after the frame sync */
+		data_delay = 1;
 		break;
 	}
 
+	mcasp_mod_bits(mcasp, DAVINCI_MCASP_TXFMT_REG, FSXDLY(data_delay),
+		       FSXDLY(3));
+	mcasp_mod_bits(mcasp, DAVINCI_MCASP_RXFMT_REG, FSRDLY(data_delay),
+		       FSRDLY(3));
+
 	switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
 	case SND_SOC_DAIFMT_CBS_CFS:
 		/* codec is clock and frame slave */
-- 
1.9.1

  parent reply	other threads:[~2014-04-04 11:31 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-04-04 11:31 [PATCH 0/7] ASoC:davinci-mcasp: bc polarity fix and proper format support Peter Ujfalusi
2014-04-04 11:31 ` [PATCH 1/7] ASoC: davinci-mcasp: Fix bit clock polarity settings Peter Ujfalusi
2014-04-08 18:04   ` Mark Brown
2014-04-04 11:31 ` Peter Ujfalusi [this message]
2014-04-04 11:31 ` [PATCH 3/7] ASoC: davinci-mcasp: Support for DSP_A format Peter Ujfalusi
2014-04-04 11:31 ` [PATCH 4/7] ASoC: davinci-mcasp: Move the FS polarity change out from the switch case Peter Ujfalusi
2014-04-04 11:31 ` [PATCH 5/7] ASoC: davinci-mcasp: Add support for I2S format Peter Ujfalusi
2014-04-04 11:31 ` [PATCH 6/7] ASoC: davinci-mcasp: Support for LEFT_J format Peter Ujfalusi
2014-04-04 11:31 ` [PATCH 7/7] ASoC: davinci-mcasp: Remove excess empty lines from davinci_mcasp_set_dai_fmt() Peter Ujfalusi
2014-04-04 13:24 ` [PATCH 0/7] ASoC:davinci-mcasp: bc polarity fix and proper format support Daniel Mack
2014-04-04 16:38   ` Peter Ujfalusi
2014-04-09 12:12     ` Daniel Mack
2014-04-09 12:51       ` Peter Ujfalusi
2014-04-14 16:24 ` Mark Brown

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