From: Leo Liu <leo.liu@amd.com>
To: Alex Deucher <alexdeucher@gmail.com>, Nirmoy <nirmodas@amd.com>
Cc: "Deucher, Alexander" <alexander.deucher@amd.com>,
Nirmoy Das <nirmoy.das@amd.com>, tiancyin <Tianci.Yin@amd.com>,
Christian Koenig <christian.koenig@amd.com>,
amd-gfx list <amd-gfx@lists.freedesktop.org>
Subject: Re: [PATCH 1/1] drm/amdgpu: disable gpu-sched load balance for uvd
Date: Mon, 31 Aug 2020 17:50:37 -0400 [thread overview]
Message-ID: <00075962-70ba-a7b6-82d4-448b97ae5c99@amd.com> (raw)
In-Reply-To: <CADnq5_MMKrR=TMF=-YcUM60eJO=osVB9N=H+hM93Pak=VXLBvA@mail.gmail.com>
On 2020-08-31 1:39 p.m., Alex Deucher wrote:
> On Mon, Aug 31, 2020 at 10:55 AM Nirmoy <nirmodas@amd.com> wrote:
>> Hi Alex,
>>
>> On 8/31/20 4:17 PM, Alex Deucher wrote:
>>> On Mon, Aug 31, 2020 at 6:41 AM Nirmoy Das <nirmoy.das@amd.com> wrote:
>>>> UVD dependent jobs should run on the same udv instance.
>>>> This patch disables gpu scheduler's load balancer for
>>>> a context which binds jobs from same the context to a udv
>>>> instance.
>>> typos: udv -> uvd
>>> With that fixed:
>>> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
>>>
>>> Does VCE need a similar fix? What about UVD_ENC?
>>
>> I am not sure, can you please confirm this.
> @Leo Liu can you confirm?
Vega20 have 2 UVDs and 1 VCE, so UVD_ENC(AMDGPU_HW_IP_UVD_ENC) should
need the same fix.
Regards,
Leo
>
> Alex
>
>>
>> Nirmoy
>>
>>
>>
>>> Alex
>>>
>>>
>>>> Signed-off-by: Nirmoy Das <nirmoy.das@amd.com>
>>>> ---
>>>> drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c | 4 +++-
>>>> 1 file changed, 3 insertions(+), 1 deletion(-)
>>>>
>>>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
>>>> index 59032c26fc82..7cd398d25498 100644
>>>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
>>>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
>>>> @@ -114,7 +114,9 @@ static int amdgpu_ctx_init_entity(struct amdgpu_ctx *ctx, u32 hw_ip,
>>>> scheds = adev->gpu_sched[hw_ip][hw_prio].sched;
>>>> num_scheds = adev->gpu_sched[hw_ip][hw_prio].num_scheds;
>>>>
>>>> - if (hw_ip == AMDGPU_HW_IP_VCN_ENC || hw_ip == AMDGPU_HW_IP_VCN_DEC) {
>>>> + if (hw_ip == AMDGPU_HW_IP_VCN_ENC ||
>>>> + hw_ip == AMDGPU_HW_IP_VCN_DEC ||
>>>> + hw_ip == AMDGPU_HW_IP_UVD) {
>>>> sched = drm_sched_pick_best(scheds, num_scheds);
>>>> scheds = &sched;
>>>> num_scheds = 1;
>>>> --
>>>> 2.28.0
>>>>
>>>> _______________________________________________
>>>> amd-gfx mailing list
>>>> amd-gfx@lists.freedesktop.org
>>>> https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Flists.freedesktop.org%2Fmailman%2Flistinfo%2Famd-gfx&data=02%7C01%7Cleo.liu%40amd.com%7Caaf07c8faa4d46f0b35f08d84dd4e875%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637344924116323889&sdata=kvny71irAythb60XTzLHokUD7ZifHAKkTND8zSNs3T0%3D&reserved=0
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next prev parent reply other threads:[~2020-08-31 21:51 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-08-31 10:45 [PATCH 1/1] drm/amdgpu: disable gpu-sched load balance for uvd Nirmoy Das
2020-08-31 11:39 ` Christian König
2020-08-31 14:17 ` Alex Deucher
2020-08-31 14:59 ` Nirmoy
2020-08-31 17:39 ` Alex Deucher
2020-08-31 21:50 ` Leo Liu [this message]
2020-08-31 21:53 ` Alex Deucher
2020-08-31 22:17 ` Leo Liu
2020-09-01 7:07 ` Paul Menzel
2020-09-01 7:50 ` Nirmoy
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