AMD-GFX Archive on lore.kernel.org
 help / color / mirror / Atom feed
From: Huang Rui <ray.huang-5C7GfCeVMHo@public.gmane.org>
To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org,
	"Alex Deucher" <alexander.deucher-5C7GfCeVMHo@public.gmane.org>,
	"Christian König" <christian.koenig-5C7GfCeVMHo@public.gmane.org>
Cc: Ken Wang <Qingqing.Wang-5C7GfCeVMHo@public.gmane.org>,
	Hui Yu <Hui.Yu-5C7GfCeVMHo@public.gmane.org>,
	Huang Rui <ray.huang-5C7GfCeVMHo@public.gmane.org>,
	Alvin Huan <Alvin.Huan-5C7GfCeVMHo@public.gmane.org>
Subject: [PATCH v2 11/15] drm/amdgpu: use vram_type instead of checking mem_gddr5 flag
Date: Wed, 31 Aug 2016 13:23:23 +0800	[thread overview]
Message-ID: <1472621007-17578-12-git-send-email-ray.huang@amd.com> (raw)
In-Reply-To: <1472621007-17578-1-git-send-email-ray.huang-5C7GfCeVMHo@public.gmane.org>

For current design, it would better use vram_type member to check if
current vram is GDDR5. So remove the old mem_gddr5 flag.

Signed-off-by: Huang Rui <ray.huang@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/si_dpm.c | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/si_dpm.c b/drivers/gpu/drm/amd/amdgpu/si_dpm.c
index ece2527..e1b2ab5 100644
--- a/drivers/gpu/drm/amd/amdgpu/si_dpm.c
+++ b/drivers/gpu/drm/amd/amdgpu/si_dpm.c
@@ -4375,7 +4375,7 @@ static u8 si_get_strobe_mode_settings(struct amdgpu_device *adev, u32 mclk)
 	if (mclk <= pi->mclk_strobe_mode_threshold)
 		strobe_mode = true;
 
-	if (pi->mem_gddr5)
+	if (adev->mc.vram_type == AMDGPU_VRAM_TYPE_GDDR5)
 		result = si_get_mclk_frequency_ratio(mclk, strobe_mode);
 	else
 		result = si_get_ddr3_mclk_frequency_ratio(mclk);
@@ -4965,7 +4965,7 @@ static int si_populate_smc_initial_state(struct amdgpu_device *adev,
 
 	table->initialState.levels[0].gen2PCIE = (u8)si_pi->boot_pcie_gen;
 
-	if (pi->mem_gddr5) {
+	if (adev->mc.vram_type == AMDGPU_VRAM_TYPE_GDDR5) {
 		table->initialState.levels[0].strobeMode =
 			si_get_strobe_mode_settings(adev,
 						    initial_state->performance_levels[0].mclk);
@@ -5237,7 +5237,7 @@ static int si_init_smc_table(struct amdgpu_device *adev)
 	if (adev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_STEPVDDC)
 		table->systemFlags |= PPSMC_SYSTEMFLAG_STEPVDDC;
 
-	if (pi->mem_gddr5)
+	if (adev->mc.vram_type == AMDGPU_VRAM_TYPE_GDDR5)
 		table->systemFlags |= PPSMC_SYSTEMFLAG_GDDR5;
 
 	if (adev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_REVERT_GPIO5_POLARITY)
@@ -5414,7 +5414,7 @@ static int si_populate_mclk_value(struct amdgpu_device *adev,
 	mpll_ad_func_cntl &= ~YCLK_POST_DIV_MASK;
 	mpll_ad_func_cntl |= YCLK_POST_DIV(mpll_param.post_div);
 
-	if (pi->mem_gddr5) {
+	if (adev->mc.vram_type == AMDGPU_VRAM_TYPE_GDDR5) {
 		mpll_dq_func_cntl &= ~(YCLK_SEL_MASK | YCLK_POST_DIV_MASK);
 		mpll_dq_func_cntl |= YCLK_SEL(mpll_param.yclk_sel) |
 			YCLK_POST_DIV(mpll_param.post_div);
@@ -5426,7 +5426,7 @@ static int si_populate_mclk_value(struct amdgpu_device *adev,
 		u32 tmp;
 		u32 reference_clock = adev->clock.mpll.reference_freq;
 
-		if (pi->mem_gddr5)
+		if (adev->mc.vram_type == AMDGPU_VRAM_TYPE_GDDR5)
 			freq_nom = memory_clock * 4;
 		else
 			freq_nom = memory_clock * 2;
@@ -5518,7 +5518,7 @@ static int si_convert_power_level_to_smc(struct amdgpu_device *adev,
 			level->mcFlags |= SISLANDS_SMC_MC_PG_EN;
 	}
 
-	if (pi->mem_gddr5) {
+	if (adev->mc.vram_type == AMDGPU_VRAM_TYPE_GDDR5) {
 		if (pl->mclk > pi->mclk_edc_enable_threshold)
 			level->mcFlags |= SISLANDS_SMC_MC_EDC_RD_FLAG;
 
-- 
2.7.4

_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

  parent reply	other threads:[~2016-08-31  5:23 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-08-31  5:23 [PATCH v2 00/15] drm/amdgpu/si: Make SI DPM workable Huang Rui
     [not found] ` <1472621007-17578-1-git-send-email-ray.huang-5C7GfCeVMHo@public.gmane.org>
2016-08-31  5:23   ` [PATCH v2 01/15] drm/amdgpu/si: update si firmware path Huang Rui
2016-08-31  5:23   ` [PATCH v2 02/15] drm/amdgpu: add gfx v6 firmware versions for sysfs dump Huang Rui
2016-08-31  5:23   ` [PATCH v2 03/15] drm/amdgpu: add gmc " Huang Rui
2016-08-31  5:23   ` [PATCH v2 04/15] drm/amdgpu/si: add SI smc " Huang Rui
2016-08-31  5:23   ` [PATCH v2 05/15] drm/amdgpu: remove unused function forward define Huang Rui
2016-08-31  5:23   ` [PATCH v2 06/15] drm/amdgpu: use DRM print instead of printk Huang Rui
2016-08-31  5:23   ` [PATCH v2 07/15] drm/amdgpu: fix oland and hainan asic specific handle at si_program_aspm Huang Rui
2016-08-31  5:23   ` [PATCH v2 08/15] drm/amdgpu/si: drop ASIC_IS_DCE6 macro on SI Huang Rui
2016-08-31  5:23   ` [PATCH v2 09/15] drm/amdgpu: fix the tahiti specific value of DEEP_SLEEP_CLK_SEL field Huang Rui
2016-08-31  5:23   ` [PATCH v2 10/15] drm/amdgpu: fix to miss adding thermal controller Huang Rui
2016-08-31  5:23   ` Huang Rui [this message]
2016-08-31  5:23   ` [PATCH v2 12/15] drm/amdgpu: fix incorrect index of CG_FFCT_0 register Huang Rui
2016-08-31  5:23   ` [PATCH v2 13/15] drm/amdgpu: introduce pcie port read/write entry Huang Rui
2016-08-31  5:23   ` [PATCH v2 14/15] drm/amdgpu: fix incorrect reading method at si_get_current_pcie_speed Huang Rui
2016-08-31  5:23   ` [PATCH v2 15/15] drm/amdgpu/si: enable SI DPM by default Huang Rui
2016-08-31 19:18   ` [PATCH v2 00/15] drm/amdgpu/si: Make SI DPM workable Alex Deucher
2016-09-05 19:31   ` Marek Olšák
     [not found]     ` <CAAxE2A6D3hAP1D3i0py3G4erMGNq8-5LjypVA_PnEQQSUjEshQ-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2016-09-06  2:35       ` Huang Rui
2016-09-06  8:04         ` Marek Olšák
     [not found]           ` <CAAxE2A46-75NBq1Bn0o6-EsmsRS6yYOqacfL973SSSVexgwPpA-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2016-09-06  8:16             ` Huang Rui
2016-09-06  8:33               ` Michel Dänzer

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=1472621007-17578-12-git-send-email-ray.huang@amd.com \
    --to=ray.huang-5c7gfcevmho@public.gmane.org \
    --cc=Alvin.Huan-5C7GfCeVMHo@public.gmane.org \
    --cc=Hui.Yu-5C7GfCeVMHo@public.gmane.org \
    --cc=Qingqing.Wang-5C7GfCeVMHo@public.gmane.org \
    --cc=alexander.deucher-5C7GfCeVMHo@public.gmane.org \
    --cc=amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org \
    --cc=christian.koenig-5C7GfCeVMHo@public.gmane.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body. 
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox