From: Huang Rui <ray.huang-5C7GfCeVMHo@public.gmane.org>
To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org,
"Alex Deucher" <alexander.deucher-5C7GfCeVMHo@public.gmane.org>,
"Christian König" <christian.koenig-5C7GfCeVMHo@public.gmane.org>
Cc: Ken Wang <Qingqing.Wang-5C7GfCeVMHo@public.gmane.org>,
Hui Yu <Hui.Yu-5C7GfCeVMHo@public.gmane.org>,
Huang Rui <ray.huang-5C7GfCeVMHo@public.gmane.org>,
Alvin Huan <Alvin.Huan-5C7GfCeVMHo@public.gmane.org>
Subject: [PATCH v2 15/15] drm/amdgpu/si: enable SI DPM by default
Date: Wed, 31 Aug 2016 13:23:27 +0800 [thread overview]
Message-ID: <1472621007-17578-16-git-send-email-ray.huang@amd.com> (raw)
In-Reply-To: <1472621007-17578-1-git-send-email-ray.huang-5C7GfCeVMHo@public.gmane.org>
SI DPM issue is fixed, so enable it by default.
Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Huang Rui <ray.huang@amd.com>
---
drivers/gpu/drm/amd/amdgpu/si_dpm.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/si_dpm.c b/drivers/gpu/drm/amd/amdgpu/si_dpm.c
index b63dd39..0c3bc22 100644
--- a/drivers/gpu/drm/amd/amdgpu/si_dpm.c
+++ b/drivers/gpu/drm/amd/amdgpu/si_dpm.c
@@ -7633,7 +7633,7 @@ static int si_dpm_late_init(void *handle)
int ret;
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
- if (amdgpu_dpm <= 0)
+ if (!amdgpu_dpm)
return 0;
/* init the sysfs and debugfs files late */
@@ -7760,7 +7760,7 @@ static int si_dpm_sw_init(void *handle)
adev->pm.current_mclk = adev->clock.default_mclk;
adev->pm.int_thermal_type = THERMAL_TYPE_NONE;
- if (amdgpu_dpm <= 0)
+ if (!amdgpu_dpm)
return 0;
ret = si_dpm_init_microcode(adev);
@@ -7805,7 +7805,7 @@ static int si_dpm_hw_init(void *handle)
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
- if (amdgpu_dpm <= 0)
+ if (!amdgpu_dpm)
return 0;
mutex_lock(&adev->pm.mutex);
--
2.7.4
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next prev parent reply other threads:[~2016-08-31 5:23 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-08-31 5:23 [PATCH v2 00/15] drm/amdgpu/si: Make SI DPM workable Huang Rui
[not found] ` <1472621007-17578-1-git-send-email-ray.huang-5C7GfCeVMHo@public.gmane.org>
2016-08-31 5:23 ` [PATCH v2 01/15] drm/amdgpu/si: update si firmware path Huang Rui
2016-08-31 5:23 ` [PATCH v2 02/15] drm/amdgpu: add gfx v6 firmware versions for sysfs dump Huang Rui
2016-08-31 5:23 ` [PATCH v2 03/15] drm/amdgpu: add gmc " Huang Rui
2016-08-31 5:23 ` [PATCH v2 04/15] drm/amdgpu/si: add SI smc " Huang Rui
2016-08-31 5:23 ` [PATCH v2 05/15] drm/amdgpu: remove unused function forward define Huang Rui
2016-08-31 5:23 ` [PATCH v2 06/15] drm/amdgpu: use DRM print instead of printk Huang Rui
2016-08-31 5:23 ` [PATCH v2 07/15] drm/amdgpu: fix oland and hainan asic specific handle at si_program_aspm Huang Rui
2016-08-31 5:23 ` [PATCH v2 08/15] drm/amdgpu/si: drop ASIC_IS_DCE6 macro on SI Huang Rui
2016-08-31 5:23 ` [PATCH v2 09/15] drm/amdgpu: fix the tahiti specific value of DEEP_SLEEP_CLK_SEL field Huang Rui
2016-08-31 5:23 ` [PATCH v2 10/15] drm/amdgpu: fix to miss adding thermal controller Huang Rui
2016-08-31 5:23 ` [PATCH v2 11/15] drm/amdgpu: use vram_type instead of checking mem_gddr5 flag Huang Rui
2016-08-31 5:23 ` [PATCH v2 12/15] drm/amdgpu: fix incorrect index of CG_FFCT_0 register Huang Rui
2016-08-31 5:23 ` [PATCH v2 13/15] drm/amdgpu: introduce pcie port read/write entry Huang Rui
2016-08-31 5:23 ` [PATCH v2 14/15] drm/amdgpu: fix incorrect reading method at si_get_current_pcie_speed Huang Rui
2016-08-31 5:23 ` Huang Rui [this message]
2016-08-31 19:18 ` [PATCH v2 00/15] drm/amdgpu/si: Make SI DPM workable Alex Deucher
2016-09-05 19:31 ` Marek Olšák
[not found] ` <CAAxE2A6D3hAP1D3i0py3G4erMGNq8-5LjypVA_PnEQQSUjEshQ-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2016-09-06 2:35 ` Huang Rui
2016-09-06 8:04 ` Marek Olšák
[not found] ` <CAAxE2A46-75NBq1Bn0o6-EsmsRS6yYOqacfL973SSSVexgwPpA-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2016-09-06 8:16 ` Huang Rui
2016-09-06 8:33 ` Michel Dänzer
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