* Re: [PATCH] drm/amdgpu: use queue 0 for kiq ring
[not found] ` <1516628738-16083-1-git-send-email-ray.huang-5C7GfCeVMHo@public.gmane.org>
@ 2018-01-22 15:19 ` Alex Deucher
2018-01-22 17:53 ` Andres Rodriguez
2018-01-22 22:28 ` Felix Kuehling
2 siblings, 0 replies; 6+ messages in thread
From: Alex Deucher @ 2018-01-22 15:19 UTC (permalink / raw)
To: Huang Rui; +Cc: Alex Deucher, amd-gfx list
On Mon, Jan 22, 2018 at 8:45 AM, Huang Rui <ray.huang@amd.com> wrote:
> It must use queue id 0, because CGPG_IDLE/SAVE/LOAD/RUN only can be issued on
> queue 0.
>
> Signed-off-by: Huang Rui <ray.huang@amd.com>
> Acked-by: Hawking Zhang <Hawking.Zhang@amd.com>
> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c | 8 ++++++--
> 1 file changed, 6 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
> index ef04336..0cfb939 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
> @@ -179,8 +179,12 @@ static int amdgpu_gfx_kiq_acquire(struct amdgpu_device *adev,
>
> amdgpu_gfx_bit_to_queue(adev, queue_bit, &mec, &pipe, &queue);
>
> - /* Using pipes 2/3 from MEC 2 seems cause problems */
> - if (mec == 1 && pipe > 1)
> + /*
> + * 1. Using pipes 2/3 from MEC 2 seems cause problems.
> + * 2. It must use queue id 0, because CGPG_IDLE/SAVE/LOAD/RUN
> + * only can be issued on queue 0.
> + */
> + if ((mec == 1 && pipe > 1) || queue != 0)
> continue;
>
> ring->me = mec + 1;
> --
> 2.7.4
>
> _______________________________________________
> amd-gfx mailing list
> amd-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
_______________________________________________
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https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 6+ messages in thread* Re: [PATCH] drm/amdgpu: use queue 0 for kiq ring
[not found] ` <1516628738-16083-1-git-send-email-ray.huang-5C7GfCeVMHo@public.gmane.org>
2018-01-22 15:19 ` Alex Deucher
@ 2018-01-22 17:53 ` Andres Rodriguez
[not found] ` <aaf8651b-6165-19b5-5508-4f3cba3f1e85-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2018-01-22 22:28 ` Felix Kuehling
2 siblings, 1 reply; 6+ messages in thread
From: Andres Rodriguez @ 2018-01-22 17:53 UTC (permalink / raw)
To: Huang Rui, Alex Deucher, amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW
Cc: andresx7-Re5JQEeQqe8AvxtiuMwx3w
On 2018-01-22 08:45 AM, Huang Rui wrote:
> It must use queue id 0, because CGPG_IDLE/SAVE/LOAD/RUN only can be issued on
> queue 0.
>
> Signed-off-by: Huang Rui <ray.huang@amd.com>
> Acked-by: Hawking Zhang <Hawking.Zhang@amd.com>
> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c | 8 ++++++--
> 1 file changed, 6 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
> index ef04336..0cfb939 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
> @@ -179,8 +179,12 @@ static int amdgpu_gfx_kiq_acquire(struct amdgpu_device *adev,
>
> amdgpu_gfx_bit_to_queue(adev, queue_bit, &mec, &pipe, &queue);
>
> - /* Using pipes 2/3 from MEC 2 seems cause problems */
> - if (mec == 1 && pipe > 1)
> + /*
> + * 1. Using pipes 2/3 from MEC 2 seems cause problems.'
Could this have been related to #2? Should we just simplify this by
guaranteeing KIQ MEC[0] PIPE[0] QUEUE[0]?
Regards,
Andres
> + * 2. It must use queue id 0, because CGPG_IDLE/SAVE/LOAD/RUN
> + * only can be issued on queue 0.
> + */
> + if ((mec == 1 && pipe > 1) || queue != 0)
> continue;
>
> ring->me = mec + 1;
>
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 6+ messages in thread* Re: [PATCH] drm/amdgpu: use queue 0 for kiq ring
[not found] ` <1516628738-16083-1-git-send-email-ray.huang-5C7GfCeVMHo@public.gmane.org>
2018-01-22 15:19 ` Alex Deucher
2018-01-22 17:53 ` Andres Rodriguez
@ 2018-01-22 22:28 ` Felix Kuehling
[not found] ` <ef29adff-9d94-9381-71ea-fcbda0ec48b5-5C7GfCeVMHo@public.gmane.org>
2 siblings, 1 reply; 6+ messages in thread
From: Felix Kuehling @ 2018-01-22 22:28 UTC (permalink / raw)
To: Huang Rui, Alex Deucher, amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW
KFD currently hard-codes MEC2, Pipe0, Queue0 for the HIQ. (For some
reason KFD numbers MECs starting from 1, not 0.)
So that narrows your choice for KIQ on MEC2 down to pipe == 1, queue == 0.
Regards,
Felix
On 2018-01-22 08:45 AM, Huang Rui wrote:
> It must use queue id 0, because CGPG_IDLE/SAVE/LOAD/RUN only can be issued on
> queue 0.
>
> Signed-off-by: Huang Rui <ray.huang@amd.com>
> Acked-by: Hawking Zhang <Hawking.Zhang@amd.com>
> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c | 8 ++++++--
> 1 file changed, 6 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
> index ef04336..0cfb939 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
> @@ -179,8 +179,12 @@ static int amdgpu_gfx_kiq_acquire(struct amdgpu_device *adev,
>
> amdgpu_gfx_bit_to_queue(adev, queue_bit, &mec, &pipe, &queue);
>
> - /* Using pipes 2/3 from MEC 2 seems cause problems */
> - if (mec == 1 && pipe > 1)
> + /*
> + * 1. Using pipes 2/3 from MEC 2 seems cause problems.
> + * 2. It must use queue id 0, because CGPG_IDLE/SAVE/LOAD/RUN
> + * only can be issued on queue 0.
> + */
> + if ((mec == 1 && pipe > 1) || queue != 0)
> continue;
>
> ring->me = mec + 1;
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 6+ messages in thread