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* [PATCH] drm/amdgpu: refactor smu8_send_msg_to_smc and WARN_ON time out
@ 2018-11-12  9:43 S, Shirish
  0 siblings, 0 replies; 3+ messages in thread
From: S, Shirish @ 2018-11-12  9:43 UTC (permalink / raw)
  To: Zhu, Rex, Deucher, Alexander
  Cc: Daniel Kurtz,
	amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org,
	S, Shirish

From: Daniel Kurtz <djkurtz@chromium.org>

This patch refactors smu8_send_msg_to_smc_with_parameter() to include
smu8_send_msg_to_smc_async() so that all the messages sent to SMU can be
profiled and appropriately reported if they fail.

Signed-off-by: Daniel Kurtz <djkurtz@chromium.org>
Signed-off-by: Shirish S <shirish.s@amd.com>
---
 drivers/gpu/drm/amd/powerplay/smumgr/smu8_smumgr.c | 45 ++++++++++------------
 1 file changed, 21 insertions(+), 24 deletions(-)

diff --git a/drivers/gpu/drm/amd/powerplay/smumgr/smu8_smumgr.c b/drivers/gpu/drm/amd/powerplay/smumgr/smu8_smumgr.c
index 09b844e..bf97abc 100644
--- a/drivers/gpu/drm/amd/powerplay/smumgr/smu8_smumgr.c
+++ b/drivers/gpu/drm/amd/powerplay/smumgr/smu8_smumgr.c
@@ -24,6 +24,7 @@
 #include <linux/delay.h>
 #include <linux/gfp.h>
 #include <linux/kernel.h>
+#include <linux/ktime.h>
 #include <linux/slab.h>
 #include <linux/types.h>
 
@@ -61,9 +62,13 @@ static uint32_t smu8_get_argument(struct pp_hwmgr *hwmgr)
 					mmSMU_MP1_SRBM2P_ARG_0);
 }
 
-static int smu8_send_msg_to_smc_async(struct pp_hwmgr *hwmgr, uint16_t msg)
+/* Send a message to the SMC, and wait for its response.*/
+static int smu8_send_msg_to_smc_with_parameter(struct pp_hwmgr *hwmgr,
+					    uint16_t msg, uint32_t parameter)
 {
 	int result = 0;
+	ktime_t t_start;
+	s64 elapsed_us;
 
 	if (hwmgr == NULL || hwmgr->device == NULL)
 		return -EINVAL;
@@ -74,28 +79,31 @@ static int smu8_send_msg_to_smc_async(struct pp_hwmgr *hwmgr, uint16_t msg)
 		/* Read the last message to SMU, to report actual cause */
 		uint32_t val = cgs_read_register(hwmgr->device,
 						 mmSMU_MP1_SRBM2P_MSG_0);
-		pr_err("smu8_send_msg_to_smc_async (0x%04x) failed\n", msg);
-		pr_err("SMU still servicing msg (0x%04x)\n", val);
+		pr_err("%s(0x%04x) aborted; SMU still servicing msg (0x%04x)\n",
+			msg, val);
 		return result;
 	}
+	t_start = ktime_get();
+
+	cgs_write_register(hwmgr->device, mmSMU_MP1_SRBM2P_ARG_0, parameter);
 
 	cgs_write_register(hwmgr->device, mmSMU_MP1_SRBM2P_RESP_0, 0);
 	cgs_write_register(hwmgr->device, mmSMU_MP1_SRBM2P_MSG_0, msg);
 
-	return 0;
+	result = PHM_WAIT_FIELD_UNEQUAL(hwmgr,
+					SMU_MP1_SRBM2P_RESP_0, CONTENT, 0);
+
+	elapsed_us = ktime_us_delta(ktime_get(), t_start);
+
+	WARN(result, "%s(0x%04x, %#x) timed out after %lld us\n",
+			__func__, msg, parameter, elapsed_us);
+
+	return result;
 }
 
-/* Send a message to the SMC, and wait for its response.*/
 static int smu8_send_msg_to_smc(struct pp_hwmgr *hwmgr, uint16_t msg)
 {
-	int result = 0;
-
-	result = smu8_send_msg_to_smc_async(hwmgr, msg);
-	if (result != 0)
-		return result;
-
-	return PHM_WAIT_FIELD_UNEQUAL(hwmgr,
-					SMU_MP1_SRBM2P_RESP_0, CONTENT, 0);
+	return smu8_send_msg_to_smc_with_parameter(hwmgr, msg, 0);
 }
 
 static int smu8_set_smc_sram_address(struct pp_hwmgr *hwmgr,
@@ -135,17 +143,6 @@ static int smu8_write_smc_sram_dword(struct pp_hwmgr *hwmgr,
 	return result;
 }
 
-static int smu8_send_msg_to_smc_with_parameter(struct pp_hwmgr *hwmgr,
-					  uint16_t msg, uint32_t parameter)
-{
-	if (hwmgr == NULL || hwmgr->device == NULL)
-		return -EINVAL;
-
-	cgs_write_register(hwmgr->device, mmSMU_MP1_SRBM2P_ARG_0, parameter);
-
-	return smu8_send_msg_to_smc(hwmgr, msg);
-}
-
 static int smu8_check_fw_load_finish(struct pp_hwmgr *hwmgr,
 				   uint32_t firmware)
 {
-- 
2.7.4

_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

^ permalink raw reply related	[flat|nested] 3+ messages in thread
* [PATCH] drm/amdgpu: refactor smu8_send_msg_to_smc and WARN_ON time out
@ 2018-11-12 14:47 S, Shirish
       [not found] ` <1542034031-25202-1-git-send-email-shirish.s-5C7GfCeVMHo@public.gmane.org>
  0 siblings, 1 reply; 3+ messages in thread
From: S, Shirish @ 2018-11-12 14:47 UTC (permalink / raw)
  To: Zhu, Rex, Deucher, Alexander
  Cc: Daniel Kurtz,
	amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org,
	S, Shirish

From: Daniel Kurtz <djkurtz@chromium.org>

This patch refactors smu8_send_msg_to_smc_with_parameter() to include
smu8_send_msg_to_smc_async() so that all the messages sent to SMU can be
profiled and appropriately reported if they fail.

Signed-off-by: Daniel Kurtz <djkurtz@chromium.org>
Signed-off-by: Shirish S <shirish.s@amd.com>
---
 drivers/gpu/drm/amd/powerplay/smumgr/smu8_smumgr.c | 45 ++++++++++------------
 1 file changed, 21 insertions(+), 24 deletions(-)

diff --git a/drivers/gpu/drm/amd/powerplay/smumgr/smu8_smumgr.c b/drivers/gpu/drm/amd/powerplay/smumgr/smu8_smumgr.c
index 09b844e..b6e8c89 100644
--- a/drivers/gpu/drm/amd/powerplay/smumgr/smu8_smumgr.c
+++ b/drivers/gpu/drm/amd/powerplay/smumgr/smu8_smumgr.c
@@ -24,6 +24,7 @@
 #include <linux/delay.h>
 #include <linux/gfp.h>
 #include <linux/kernel.h>
+#include <linux/ktime.h>
 #include <linux/slab.h>
 #include <linux/types.h>
 
@@ -61,9 +62,13 @@ static uint32_t smu8_get_argument(struct pp_hwmgr *hwmgr)
 					mmSMU_MP1_SRBM2P_ARG_0);
 }
 
-static int smu8_send_msg_to_smc_async(struct pp_hwmgr *hwmgr, uint16_t msg)
+/* Send a message to the SMC, and wait for its response.*/
+static int smu8_send_msg_to_smc_with_parameter(struct pp_hwmgr *hwmgr,
+					    uint16_t msg, uint32_t parameter)
 {
 	int result = 0;
+	ktime_t t_start;
+	s64 elapsed_us;
 
 	if (hwmgr == NULL || hwmgr->device == NULL)
 		return -EINVAL;
@@ -74,28 +79,31 @@ static int smu8_send_msg_to_smc_async(struct pp_hwmgr *hwmgr, uint16_t msg)
 		/* Read the last message to SMU, to report actual cause */
 		uint32_t val = cgs_read_register(hwmgr->device,
 						 mmSMU_MP1_SRBM2P_MSG_0);
-		pr_err("smu8_send_msg_to_smc_async (0x%04x) failed\n", msg);
-		pr_err("SMU still servicing msg (0x%04x)\n", val);
+		pr_err("%s(0x%04x) aborted; SMU still servicing msg (0x%04x)\n",
+			__func__, msg, val);
 		return result;
 	}
+	t_start = ktime_get();
+
+	cgs_write_register(hwmgr->device, mmSMU_MP1_SRBM2P_ARG_0, parameter);
 
 	cgs_write_register(hwmgr->device, mmSMU_MP1_SRBM2P_RESP_0, 0);
 	cgs_write_register(hwmgr->device, mmSMU_MP1_SRBM2P_MSG_0, msg);
 
-	return 0;
+	result = PHM_WAIT_FIELD_UNEQUAL(hwmgr,
+					SMU_MP1_SRBM2P_RESP_0, CONTENT, 0);
+
+	elapsed_us = ktime_us_delta(ktime_get(), t_start);
+
+	WARN(result, "%s(0x%04x, %#x) timed out after %lld us\n",
+			__func__, msg, parameter, elapsed_us);
+
+	return result;
 }
 
-/* Send a message to the SMC, and wait for its response.*/
 static int smu8_send_msg_to_smc(struct pp_hwmgr *hwmgr, uint16_t msg)
 {
-	int result = 0;
-
-	result = smu8_send_msg_to_smc_async(hwmgr, msg);
-	if (result != 0)
-		return result;
-
-	return PHM_WAIT_FIELD_UNEQUAL(hwmgr,
-					SMU_MP1_SRBM2P_RESP_0, CONTENT, 0);
+	return smu8_send_msg_to_smc_with_parameter(hwmgr, msg, 0);
 }
 
 static int smu8_set_smc_sram_address(struct pp_hwmgr *hwmgr,
@@ -135,17 +143,6 @@ static int smu8_write_smc_sram_dword(struct pp_hwmgr *hwmgr,
 	return result;
 }
 
-static int smu8_send_msg_to_smc_with_parameter(struct pp_hwmgr *hwmgr,
-					  uint16_t msg, uint32_t parameter)
-{
-	if (hwmgr == NULL || hwmgr->device == NULL)
-		return -EINVAL;
-
-	cgs_write_register(hwmgr->device, mmSMU_MP1_SRBM2P_ARG_0, parameter);
-
-	return smu8_send_msg_to_smc(hwmgr, msg);
-}
-
 static int smu8_check_fw_load_finish(struct pp_hwmgr *hwmgr,
 				   uint32_t firmware)
 {
-- 
2.7.4

_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

^ permalink raw reply related	[flat|nested] 3+ messages in thread
* RE: [PATCH] drm/amdgpu: refactor smu8_send_msg_to_smc and WARN_ON time out
       [not found] ` <1542034031-25202-1-git-send-email-shirish.s-5C7GfCeVMHo@public.gmane.org>
@ 2018-11-12 14:54   ` Zhu, Rex
  0 siblings, 0 replies; 3+ messages in thread
From: Zhu, Rex @ 2018-11-12 14:54 UTC (permalink / raw)
  To: Deucher, Alexander
  Cc: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org,
	Daniel Kurtz, S, Shirish

Patch is
Reviewed-by:  Rex Zhu <Rex.Zhu@amd.com>

Best Regards
Rex

> -----Original Message-----
> From: amd-gfx <amd-gfx-bounces@lists.freedesktop.org> On Behalf Of S,
> Shirish
> Sent: Monday, November 12, 2018 10:48 PM
> To: Zhu, Rex <Rex.Zhu@amd.com>; Deucher, Alexander
> <Alexander.Deucher@amd.com>
> Cc: Daniel Kurtz <djkurtz@chromium.org>; amd-gfx@lists.freedesktop.org; S,
> Shirish <Shirish.S@amd.com>
> Subject: [PATCH] drm/amdgpu: refactor smu8_send_msg_to_smc and
> WARN_ON time out
> 
> From: Daniel Kurtz <djkurtz@chromium.org>
> 
> This patch refactors smu8_send_msg_to_smc_with_parameter() to include
> smu8_send_msg_to_smc_async() so that all the messages sent to SMU can
> be profiled and appropriately reported if they fail.
> 
> Signed-off-by: Daniel Kurtz <djkurtz@chromium.org>
> Signed-off-by: Shirish S <shirish.s@amd.com>
> ---
>  drivers/gpu/drm/amd/powerplay/smumgr/smu8_smumgr.c | 45
> ++++++++++------------
>  1 file changed, 21 insertions(+), 24 deletions(-)
> 
> diff --git a/drivers/gpu/drm/amd/powerplay/smumgr/smu8_smumgr.c
> b/drivers/gpu/drm/amd/powerplay/smumgr/smu8_smumgr.c
> index 09b844e..b6e8c89 100644
> --- a/drivers/gpu/drm/amd/powerplay/smumgr/smu8_smumgr.c
> +++ b/drivers/gpu/drm/amd/powerplay/smumgr/smu8_smumgr.c
> @@ -24,6 +24,7 @@
>  #include <linux/delay.h>
>  #include <linux/gfp.h>
>  #include <linux/kernel.h>
> +#include <linux/ktime.h>
>  #include <linux/slab.h>
>  #include <linux/types.h>
> 
> @@ -61,9 +62,13 @@ static uint32_t smu8_get_argument(struct pp_hwmgr
> *hwmgr)
>  					mmSMU_MP1_SRBM2P_ARG_0);
>  }
> 
> -static int smu8_send_msg_to_smc_async(struct pp_hwmgr *hwmgr,
> uint16_t msg)
> +/* Send a message to the SMC, and wait for its response.*/ static int
> +smu8_send_msg_to_smc_with_parameter(struct pp_hwmgr *hwmgr,
> +					    uint16_t msg, uint32_t parameter)
>  {
>  	int result = 0;
> +	ktime_t t_start;
> +	s64 elapsed_us;
> 
>  	if (hwmgr == NULL || hwmgr->device == NULL)
>  		return -EINVAL;
> @@ -74,28 +79,31 @@ static int smu8_send_msg_to_smc_async(struct
> pp_hwmgr *hwmgr, uint16_t msg)
>  		/* Read the last message to SMU, to report actual cause */
>  		uint32_t val = cgs_read_register(hwmgr->device,
> 
> mmSMU_MP1_SRBM2P_MSG_0);
> -		pr_err("smu8_send_msg_to_smc_async (0x%04x) failed\n",
> msg);
> -		pr_err("SMU still servicing msg (0x%04x)\n", val);
> +		pr_err("%s(0x%04x) aborted; SMU still servicing msg
> (0x%04x)\n",
> +			__func__, msg, val);
>  		return result;
>  	}
> +	t_start = ktime_get();
> +
> +	cgs_write_register(hwmgr->device, mmSMU_MP1_SRBM2P_ARG_0,
> parameter);
> 
>  	cgs_write_register(hwmgr->device, mmSMU_MP1_SRBM2P_RESP_0,
> 0);
>  	cgs_write_register(hwmgr->device, mmSMU_MP1_SRBM2P_MSG_0,
> msg);
> 
> -	return 0;
> +	result = PHM_WAIT_FIELD_UNEQUAL(hwmgr,
> +					SMU_MP1_SRBM2P_RESP_0,
> CONTENT, 0);
> +
> +	elapsed_us = ktime_us_delta(ktime_get(), t_start);
> +
> +	WARN(result, "%s(0x%04x, %#x) timed out after %lld us\n",
> +			__func__, msg, parameter, elapsed_us);
> +
> +	return result;
>  }
> 
> -/* Send a message to the SMC, and wait for its response.*/  static int
> smu8_send_msg_to_smc(struct pp_hwmgr *hwmgr, uint16_t msg)  {
> -	int result = 0;
> -
> -	result = smu8_send_msg_to_smc_async(hwmgr, msg);
> -	if (result != 0)
> -		return result;
> -
> -	return PHM_WAIT_FIELD_UNEQUAL(hwmgr,
> -					SMU_MP1_SRBM2P_RESP_0,
> CONTENT, 0);
> +	return smu8_send_msg_to_smc_with_parameter(hwmgr, msg, 0);
>  }
> 
>  static int smu8_set_smc_sram_address(struct pp_hwmgr *hwmgr, @@ -
> 135,17 +143,6 @@ static int smu8_write_smc_sram_dword(struct pp_hwmgr
> *hwmgr,
>  	return result;
>  }
> 
> -static int smu8_send_msg_to_smc_with_parameter(struct pp_hwmgr
> *hwmgr,
> -					  uint16_t msg, uint32_t parameter)
> -{
> -	if (hwmgr == NULL || hwmgr->device == NULL)
> -		return -EINVAL;
> -
> -	cgs_write_register(hwmgr->device, mmSMU_MP1_SRBM2P_ARG_0,
> parameter);
> -
> -	return smu8_send_msg_to_smc(hwmgr, msg);
> -}
> -
>  static int smu8_check_fw_load_finish(struct pp_hwmgr *hwmgr,
>  				   uint32_t firmware)
>  {
> --
> 2.7.4
> 
> _______________________________________________
> amd-gfx mailing list
> amd-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

^ permalink raw reply	[flat|nested] 3+ messages in thread
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2018-11-12  9:43 [PATCH] drm/amdgpu: refactor smu8_send_msg_to_smc and WARN_ON time out S, Shirish
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2018-11-12 14:47 S, Shirish
     [not found] ` <1542034031-25202-1-git-send-email-shirish.s-5C7GfCeVMHo@public.gmane.org>
2018-11-12 14:54   ` Zhu, Rex

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