Re: [PATCH 2/2] drm/radeon: add missing revision check for CI

["Timur Kristóf" <timur.kristof@gmail.com>]

On Monday, April 27, 2026 7:31:03 PM Central European Summer Time Alex Deucher 
wrote:
> The memory level workarounds only apply to revision 0 SKUs.
> 
> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

It is important that stable kernels (and stable distros) pick up this patch. 
Can you please add a few tags to this commit to give extra context?

Link: https://gitlab.freedesktop.org/drm/amd/-/work_items/1816
Fixes: 127e056e2a82 ("drm/radeon: fix mclk vddc configuration for cards for 
hawaii")
Fixes: 21b8a369046f ("drm/radeon: fix dram timing for certain hawaii boards")
Fixes: 90b2fee35cb9 ("drm/radeon: fix dpm mc init for certain hawaii boards")

With that, this patch is also:
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>

Thanks & best regards,
Timur

> ---
>  drivers/gpu/drm/radeon/ci_dpm.c | 9 ++++++---
>  1 file changed, 6 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/radeon/ci_dpm.c
> b/drivers/gpu/drm/radeon/ci_dpm.c index ba8db1d07c070..b47b91272b244 100644
> --- a/drivers/gpu/drm/radeon/ci_dpm.c
> +++ b/drivers/gpu/drm/radeon/ci_dpm.c
> @@ -2461,7 +2461,8 @@ static void ci_register_patching_mc_arb(struct
> radeon_device *rdev,
> 
>  	if (patch &&
>  	    ((rdev->pdev->device == 0x67B0) ||
> -	     (rdev->pdev->device == 0x67B1))) {
> +	     (rdev->pdev->device == 0x67B1)) &&
> +	    (rdev->pdev->revision == 0)) {
>  		if ((memory_clock > 100000) && (memory_clock <= 
125000)) {
>  			tmp2 = (((0x31 * engine_clock) / 125000) - 
1) & 0xff;
>  			*dram_timimg2 &= ~0x00ff0000;
> @@ -3304,7 +3305,8 @@ static int ci_populate_all_memory_levels(struct
> radeon_device *rdev) pi->smc_state_table.MemoryLevel[0].EnabledForActivity
> = 1;
> 
>  	if ((dpm_table->mclk_table.count >= 2) &&
> -	    ((rdev->pdev->device == 0x67B0) || (rdev->pdev->device == 
0x67B1))) {
> +	    ((rdev->pdev->device == 0x67B0) || (rdev->pdev->device == 
0x67B1)) &&
> +	    (rdev->pdev->revision == 0)) {
>  		pi->smc_state_table.MemoryLevel[1].MinVddc =
>  			pi->smc_state_table.MemoryLevel[0].MinVddc;
>  		pi->smc_state_table.MemoryLevel[1].MinVddcPhases =
> @@ -4493,7 +4495,8 @@ static int ci_register_patching_mc_seq(struct
> radeon_device *rdev,
> 
>  	if (patch &&
>  	    ((rdev->pdev->device == 0x67B0) ||
> -	     (rdev->pdev->device == 0x67B1))) {
> +	     (rdev->pdev->device == 0x67B1)) &&
> +	    (rdev->pdev->revision == 0)) {
>  		for (i = 0; i < table->last; i++) {
>  			if (table->last >= 
SMU7_DISCRETE_MC_REGISTER_ARRAY_SIZE)
>  				return -EINVAL;