AMD-GFX Archive on lore.kernel.org
 help / color / mirror / Atom feed
From: Alex Deucher <alexdeucher-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org
Cc: Alex Deucher <alexander.deucher-5C7GfCeVMHo@public.gmane.org>
Subject: [PATCH 2/4] drm/amdgpu: add new DF callback for ECC setup
Date: Wed, 16 May 2018 15:51:54 -0500	[thread overview]
Message-ID: <20180516205156.29064-2-alexander.deucher@amd.com> (raw)
In-Reply-To: <20180516205156.29064-1-alexander.deucher-5C7GfCeVMHo@public.gmane.org>

The ForceParWrRMW setting needs to be enabled for ECC, but disabled
when ECC is not enabled.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu.h | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index 03a2c0be0bf2..a59c07590cee 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -1401,6 +1401,8 @@ struct amdgpu_df_funcs {
 						 bool enable);
 	void (*get_clockgating_state)(struct amdgpu_device *adev,
 				      u32 *flags);
+	void (*enable_ecc_force_par_wr_rmw)(struct amdgpu_device *adev,
+					    bool enable);
 };
 /* Define the HW IP blocks will be used in driver , add more if necessary */
 enum amd_hw_ip_block_type {
-- 
2.13.6

_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

  parent reply	other threads:[~2018-05-16 20:51 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-05-16 20:51 [PATCH 1/4] drm/amdgpu: add new DF 1.7 register defs Alex Deucher
     [not found] ` <20180516205156.29064-1-alexander.deucher-5C7GfCeVMHo@public.gmane.org>
2018-05-16 20:51   ` Alex Deucher [this message]
2018-05-16 20:51   ` [PATCH 3/4] drm/amdgpu: add a df 1.7 implementation of enable_ecc_force_par_wr_rmw Alex Deucher
2018-05-16 20:51   ` [PATCH 4/4] drm/amdgpu/gmc9: disable partial wr rmw if ECC is not enabled Alex Deucher
2018-05-18 19:48   ` [PATCH 1/4] drm/amdgpu: add new DF 1.7 register defs Alex Deucher
     [not found]     ` <CADnq5_P=ZLmnesB63GQ8Fq=GWN7yva-8j5VN99hjfN=Fi=Xkdw-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2018-05-20 15:23       ` Zhang, Hawking
2018-05-21  1:16   ` Zhang, Jerry (Junwei)
2018-05-21  1:29   ` Zhang, Jerry (Junwei)

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20180516205156.29064-2-alexander.deucher@amd.com \
    --to=alexdeucher-re5jqeeqqe8avxtiumwx3w@public.gmane.org \
    --cc=alexander.deucher-5C7GfCeVMHo@public.gmane.org \
    --cc=amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox