From: Alex Deucher <alexdeucher-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org
Cc: Alex Deucher <alexander.deucher-5C7GfCeVMHo@public.gmane.org>
Subject: [PATCH 3/4] drm/amdgpu: add a df 1.7 implementation of enable_ecc_force_par_wr_rmw
Date: Wed, 16 May 2018 15:51:55 -0500 [thread overview]
Message-ID: <20180516205156.29064-3-alexander.deucher@amd.com> (raw)
In-Reply-To: <20180516205156.29064-1-alexander.deucher-5C7GfCeVMHo@public.gmane.org>
Needed for proper memory setup depending on whether ECC is
enabled on a particular board.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
drivers/gpu/drm/amd/amdgpu/df_v1_7.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/df_v1_7.c b/drivers/gpu/drm/amd/amdgpu/df_v1_7.c
index 4ffda996660f..9935371db7ce 100644
--- a/drivers/gpu/drm/amd/amdgpu/df_v1_7.c
+++ b/drivers/gpu/drm/amd/amdgpu/df_v1_7.c
@@ -102,6 +102,13 @@ static void df_v1_7_get_clockgating_state(struct amdgpu_device *adev,
*flags |= AMD_CG_SUPPORT_DF_MGCG;
}
+static void df_v1_7_enable_ecc_force_par_wr_rmw(struct amdgpu_device *adev,
+ bool enable)
+{
+ WREG32_FIELD15(DF, 0, DF_CS_AON0_CoherentSlaveModeCtrlA0,
+ ForceParWrRMW, enable);
+}
+
const struct amdgpu_df_funcs df_v1_7_funcs = {
.init = df_v1_7_init,
.enable_broadcast_mode = df_v1_7_enable_broadcast_mode,
@@ -109,4 +116,5 @@ const struct amdgpu_df_funcs df_v1_7_funcs = {
.get_hbm_channel_number = df_v1_7_get_hbm_channel_number,
.update_medium_grain_clock_gating = df_v1_7_update_medium_grain_clock_gating,
.get_clockgating_state = df_v1_7_get_clockgating_state,
+ .enable_ecc_force_par_wr_rmw = df_v1_7_enable_ecc_force_par_wr_rmw,
};
--
2.13.6
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next prev parent reply other threads:[~2018-05-16 20:51 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-05-16 20:51 [PATCH 1/4] drm/amdgpu: add new DF 1.7 register defs Alex Deucher
[not found] ` <20180516205156.29064-1-alexander.deucher-5C7GfCeVMHo@public.gmane.org>
2018-05-16 20:51 ` [PATCH 2/4] drm/amdgpu: add new DF callback for ECC setup Alex Deucher
2018-05-16 20:51 ` Alex Deucher [this message]
2018-05-16 20:51 ` [PATCH 4/4] drm/amdgpu/gmc9: disable partial wr rmw if ECC is not enabled Alex Deucher
2018-05-18 19:48 ` [PATCH 1/4] drm/amdgpu: add new DF 1.7 register defs Alex Deucher
[not found] ` <CADnq5_P=ZLmnesB63GQ8Fq=GWN7yva-8j5VN99hjfN=Fi=Xkdw-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2018-05-20 15:23 ` Zhang, Hawking
2018-05-21 1:16 ` Zhang, Jerry (Junwei)
2018-05-21 1:29 ` Zhang, Jerry (Junwei)
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