AMD-GFX Archive on lore.kernel.org
 help / color / mirror / Atom feed
From: David Francis <David.Francis@amd.com>
To: dri-devel@lists.freedesktop.org, amd-gfx@lists.freedesktop.org
Cc: David Francis <David.Francis@amd.com>
Subject: [PATCH v3 05/16] drm/amd/display: Enable SST DSC in DM
Date: Wed, 21 Aug 2019 16:01:18 -0400	[thread overview]
Message-ID: <20190821200129.11575-6-David.Francis@amd.com> (raw)
In-Reply-To: <20190821200129.11575-1-David.Francis@amd.com>

In create_stream_for_sink, check for SST DP connectors

Parse DSC caps to DC format, then, if DSC is supported,
compute the config

DSC hardware will be programmed by dc_commit_state

Tested-by: Mikita Lipski <Mikita.Lipski@amd.com>
Signed-off-by: David Francis <David.Francis@amd.com>
Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
---
 .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 32 ++++++++++++-------
 .../amd/display/amdgpu_dm/amdgpu_dm_helpers.c |  4 ++-
 2 files changed, 24 insertions(+), 12 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index 911fe78b47c1..84249057e181 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -3576,6 +3576,10 @@ create_stream_for_sink(struct amdgpu_dm_connector *aconnector,
 	bool scale = dm_state ? (dm_state->scaling != RMX_OFF) : false;
 	int mode_refresh;
 	int preferred_refresh = 0;
+#ifdef CONFIG_DRM_AMD_DC_DSC_SUPPORT
+	struct dsc_dec_dpcd_caps dsc_caps;
+	uint32_t link_bandwidth_kbps;
+#endif
 
 	struct dc_sink *sink = NULL;
 	if (aconnector == NULL) {
@@ -3648,17 +3652,23 @@ create_stream_for_sink(struct amdgpu_dm_connector *aconnector,
 			&mode, &aconnector->base, con_state, old_stream);
 
 #ifdef CONFIG_DRM_AMD_DC_DSC_SUPPORT
-	/* stream->timing.flags.DSC = 0; */
-        /*  */
-	/* if (aconnector->dc_link && */
-	/* 		aconnector->dc_link->connector_signal == SIGNAL_TYPE_DISPLAY_PORT #<{(|&& */
-	/* 		aconnector->dc_link->dpcd_caps.dsc_caps.dsc_basic_caps.is_dsc_supported|)}>#) */
-	/* 	if (dc_dsc_compute_config(aconnector->dc_link->ctx->dc, */
-	/* 			&aconnector->dc_link->dpcd_caps.dsc_caps, */
-	/* 			dc_link_bandwidth_kbps(aconnector->dc_link, dc_link_get_link_cap(aconnector->dc_link)), */
-	/* 			&stream->timing, */
-	/* 			&stream->timing.dsc_cfg)) */
-	/* 		stream->timing.flags.DSC = 1; */
+	stream->timing.flags.DSC = 0;
+
+	if (aconnector->dc_link && sink->sink_signal == SIGNAL_TYPE_DISPLAY_PORT) {
+		dc_dsc_parse_dsc_dpcd(aconnector->dc_link->dpcd_caps.dsc_caps.dsc_basic_caps.raw,
+				      aconnector->dc_link->dpcd_caps.dsc_caps.dsc_ext_caps.raw,
+				      &dsc_caps);
+		link_bandwidth_kbps = dc_link_bandwidth_kbps(aconnector->dc_link,
+							     dc_link_get_link_cap(aconnector->dc_link));
+
+		if (dsc_caps.is_dsc_supported)
+			if (dc_dsc_compute_config(aconnector->dc_link->ctx->dc,
+						  &dsc_caps,
+						  link_bandwidth_kbps,
+						  &stream->timing,
+						  &stream->timing.dsc_cfg))
+				stream->timing.flags.DSC = 1;
+	}
 #endif
 
 	update_stream_scaling_settings(&mode, dm_state, stream);
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
index 7cf0573ab25f..5f2c315b18ba 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
@@ -549,7 +549,9 @@ bool dm_helpers_dp_write_dsc_enable(
 		bool enable
 )
 {
-	return false;
+	uint8_t enable_dsc = enable ? 1 : 0;
+
+	return dm_helpers_dp_write_dpcd(ctx, stream->sink->link, DP_DSC_ENABLE, &enable_dsc, 1);
 }
 #endif
 
-- 
2.17.1

_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel

  parent reply	other threads:[~2019-08-21 20:01 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-08-21 20:01 [PATCH v3 00/16] Display Stream Compression (DSC) for AMD Navi David Francis
2019-08-21 20:01 ` [PATCH v3 01/16] Revert "drm/amd/display: skip dsc config for navi10 bring up" David Francis
2019-08-21 20:01 ` [PATCH v3 02/16] Revert "drm/amd/display: navi10 bring up skip dsc encoder config" David Francis
2019-08-21 20:01 ` [PATCH v3 03/16] Revert "drm/amd/display: add global master update lock for DCN2" David Francis
2019-08-21 20:01 ` [PATCH v3 04/16] Revert "drm/amd/display: Fix underscan not using proper scaling" David Francis
2019-08-21 20:01 ` David Francis [this message]
     [not found] ` <20190821200129.11575-1-David.Francis-5C7GfCeVMHo@public.gmane.org>
2019-08-21 20:01   ` [PATCH v3 06/16] drm/dp-mst: Add PBN calculation for DSC modes David Francis
     [not found]     ` <20190821200129.11575-7-David.Francis-5C7GfCeVMHo@public.gmane.org>
2019-08-21 20:03       ` Lyude Paul
2019-08-21 20:01   ` [PATCH v3 07/16] drm/amd/display: Use correct helpers to compute timeslots David Francis
2019-08-21 20:01   ` [PATCH v3 08/16] drm/amd/display: Initialize DSC PPS variables to 0 David Francis
2019-08-21 20:01   ` [PATCH v3 10/16] drm/dp-mst: Add MST support to DP DPCD R/W functions David Francis
     [not found]     ` <20190821200129.11575-11-David.Francis-5C7GfCeVMHo@public.gmane.org>
2019-08-21 21:08       ` Lyude Paul
2019-08-21 20:01   ` [PATCH v3 11/16] drm/dp-mst: Fill branch->num_ports David Francis
2019-08-21 20:01   ` [PATCH v3 12/16] drm/dp-mst: Add helpers for querying and enabling MST DSC David Francis
2019-08-21 20:01   ` [PATCH v3 13/16] drm/amd/display: Validate DSC caps on MST endpoints David Francis
2019-08-22 13:26     ` Francis, David
2019-08-21 20:01   ` [PATCH v3 14/16] drm/amd/display: Write DSC enable to MST DPCD David Francis
2019-08-21 20:01   ` [PATCH v3 15/16] drm/amd/display: MST DSC compute fair share David Francis
2019-08-21 20:01 ` [PATCH v3 09/16] drm/dp-mst: Parse FEC capability on MST ports David Francis
2019-08-21 20:01 ` [PATCH v3 16/16] drm/amd/display: Trigger modesets on MST DSC connectors David Francis
2019-08-21 20:02   ` Francis, David
     [not found]     ` <BN8PR12MB3217348063E5E6798009996AEFAA0-h6+T2+wrnx1RCczRXbE7rwdYzm3356FpvxpqHgZTriW3zl9H0oFU5g@public.gmane.org>
2019-08-21 20:43       ` Lyude Paul
2019-08-21 21:20 ` [PATCH v3 00/16] Display Stream Compression (DSC) for AMD Navi Lyude Paul
     [not found]   ` <731de9e59c86128c01ff5473a908888545f10390.camel-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org>
2019-08-22 13:47     ` Francis, David

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20190821200129.11575-6-David.Francis@amd.com \
    --to=david.francis@amd.com \
    --cc=amd-gfx@lists.freedesktop.org \
    --cc=dri-devel@lists.freedesktop.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body. 
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox