From: David Francis <David.Francis-5C7GfCeVMHo@public.gmane.org>
To: dri-devel-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org,
amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org
Cc: David Francis <David.Francis-5C7GfCeVMHo@public.gmane.org>
Subject: [PATCH v3 08/16] drm/amd/display: Initialize DSC PPS variables to 0
Date: Wed, 21 Aug 2019 16:01:21 -0400 [thread overview]
Message-ID: <20190821200129.11575-9-David.Francis@amd.com> (raw)
In-Reply-To: <20190821200129.11575-1-David.Francis-5C7GfCeVMHo@public.gmane.org>
For DSC MST, sometimes monitors would break out
in full-screen static. The issue traced back to the
PPS generation code, where these variables were being used
uninitialized and were picking up garbage.
memset to 0 to avoid this
Signed-off-by: David Francis <David.Francis@amd.com>
Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
---
drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c | 3 +++
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c | 3 +++
2 files changed, 6 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c b/drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c
index 35c5467e60e8..619ac48edd05 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c
@@ -491,6 +491,9 @@ bool dp_set_dsc_pps_sdp(struct pipe_ctx *pipe_ctx, bool enable)
struct dsc_config dsc_cfg;
uint8_t dsc_packed_pps[128];
+ memset(&dsc_cfg, 0, sizeof(dsc_cfg));
+ memset(dsc_packed_pps, 0, 128);
+
/* Enable DSC hw block */
dsc_cfg.pic_width = stream->timing.h_addressable + stream->timing.h_border_left + stream->timing.h_border_right;
dsc_cfg.pic_height = stream->timing.v_addressable + stream->timing.v_border_top + stream->timing.v_border_bottom;
diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c
index 379c9e4ac63b..16debe6d89f2 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c
@@ -207,6 +207,9 @@ static bool dsc2_get_packed_pps(struct display_stream_compressor *dsc, const str
struct dsc_reg_values dsc_reg_vals;
struct dsc_optc_config dsc_optc_cfg;
+ memset(&dsc_reg_vals, 0, sizeof(dsc_reg_vals));
+ memset(&dsc_optc_cfg, 0, sizeof(dsc_optc_cfg));
+
DC_LOG_DSC("Getting packed DSC PPS for DSC Config:");
dsc_config_log(dsc, dsc_cfg);
DC_LOG_DSC("DSC Picture Parameter Set (PPS):");
--
2.17.1
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next prev parent reply other threads:[~2019-08-21 20:01 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-08-21 20:01 [PATCH v3 00/16] Display Stream Compression (DSC) for AMD Navi David Francis
2019-08-21 20:01 ` [PATCH v3 01/16] Revert "drm/amd/display: skip dsc config for navi10 bring up" David Francis
2019-08-21 20:01 ` [PATCH v3 02/16] Revert "drm/amd/display: navi10 bring up skip dsc encoder config" David Francis
2019-08-21 20:01 ` [PATCH v3 03/16] Revert "drm/amd/display: add global master update lock for DCN2" David Francis
2019-08-21 20:01 ` [PATCH v3 04/16] Revert "drm/amd/display: Fix underscan not using proper scaling" David Francis
2019-08-21 20:01 ` [PATCH v3 05/16] drm/amd/display: Enable SST DSC in DM David Francis
[not found] ` <20190821200129.11575-1-David.Francis-5C7GfCeVMHo@public.gmane.org>
2019-08-21 20:01 ` [PATCH v3 06/16] drm/dp-mst: Add PBN calculation for DSC modes David Francis
[not found] ` <20190821200129.11575-7-David.Francis-5C7GfCeVMHo@public.gmane.org>
2019-08-21 20:03 ` Lyude Paul
2019-08-21 20:01 ` [PATCH v3 07/16] drm/amd/display: Use correct helpers to compute timeslots David Francis
2019-08-21 20:01 ` David Francis [this message]
2019-08-21 20:01 ` [PATCH v3 10/16] drm/dp-mst: Add MST support to DP DPCD R/W functions David Francis
[not found] ` <20190821200129.11575-11-David.Francis-5C7GfCeVMHo@public.gmane.org>
2019-08-21 21:08 ` Lyude Paul
2019-08-21 20:01 ` [PATCH v3 11/16] drm/dp-mst: Fill branch->num_ports David Francis
2019-08-21 20:01 ` [PATCH v3 12/16] drm/dp-mst: Add helpers for querying and enabling MST DSC David Francis
2019-08-21 20:01 ` [PATCH v3 13/16] drm/amd/display: Validate DSC caps on MST endpoints David Francis
2019-08-22 13:26 ` Francis, David
2019-08-21 20:01 ` [PATCH v3 14/16] drm/amd/display: Write DSC enable to MST DPCD David Francis
2019-08-21 20:01 ` [PATCH v3 15/16] drm/amd/display: MST DSC compute fair share David Francis
2019-08-21 20:01 ` [PATCH v3 09/16] drm/dp-mst: Parse FEC capability on MST ports David Francis
2019-08-21 20:01 ` [PATCH v3 16/16] drm/amd/display: Trigger modesets on MST DSC connectors David Francis
2019-08-21 20:02 ` Francis, David
[not found] ` <BN8PR12MB3217348063E5E6798009996AEFAA0-h6+T2+wrnx1RCczRXbE7rwdYzm3356FpvxpqHgZTriW3zl9H0oFU5g@public.gmane.org>
2019-08-21 20:43 ` Lyude Paul
2019-08-21 21:20 ` [PATCH v3 00/16] Display Stream Compression (DSC) for AMD Navi Lyude Paul
[not found] ` <731de9e59c86128c01ff5473a908888545f10390.camel-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org>
2019-08-22 13:47 ` Francis, David
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