From: Huang Rui <ray.huang@amd.com>
To: amd-gfx@lists.freedesktop.org
Cc: "AnZhong Huang" <anzhong.huang@amd.com>,
"Aaron Liu" <aaron.liu@amd.com>, "Huang Rui" <ray.huang@amd.com>,
"Alex Deucher" <alexander.deucher@amd.com>,
"Leo Liu" <leo.liu@amd.com>,
"Christian König" <christian.koenig@amd.com>
Subject: [PATCH 11/12] drm/amdgpu: use register distance member instead of hardcode in mmhub v2
Date: Mon, 6 Jul 2020 13:05:08 +0800 [thread overview]
Message-ID: <20200706050509.714975-12-ray.huang@amd.com> (raw)
In-Reply-To: <20200706050509.714975-1-ray.huang@amd.com>
This patch updates to use register distance member instead of hardcode
in mmhub v2.
Signed-off-by: Huang Rui <ray.huang@amd.com>
Tested-by: AnZhong Huang <anzhong.huang@amd.com>
---
drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c | 39 +++++++++++++++----------
1 file changed, 24 insertions(+), 15 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c b/drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c
index 9bfb77c42fa4..d820fa02e6e8 100644
--- a/drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c
@@ -39,15 +39,15 @@
void mmhub_v2_0_setup_vm_pt_regs(struct amdgpu_device *adev, uint32_t vmid,
uint64_t page_table_base)
{
- /* two registers distance between mmMMVM_CONTEXT0_* to mmMMVM_CONTEXT1_* */
- int offset = mmMMVM_CONTEXT1_PAGE_TABLE_BASE_ADDR_LO32
- - mmMMVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32;
+ struct amdgpu_vmhub *hub = &adev->vmhub[AMDGPU_MMHUB_0];
WREG32_SOC15_OFFSET(MMHUB, 0, mmMMVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32,
- offset * vmid, lower_32_bits(page_table_base));
+ hub->ctx_addr_distance * vmid,
+ lower_32_bits(page_table_base));
WREG32_SOC15_OFFSET(MMHUB, 0, mmMMVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32,
- offset * vmid, upper_32_bits(page_table_base));
+ hub->ctx_addr_distance * vmid,
+ upper_32_bits(page_table_base));
}
static void mmhub_v2_0_init_gart_aperture_regs(struct amdgpu_device *adev)
@@ -209,6 +209,7 @@ static void mmhub_v2_0_disable_identity_aperture(struct amdgpu_device *adev)
static void mmhub_v2_0_setup_vmid_config(struct amdgpu_device *adev)
{
+ struct amdgpu_vmhub *hub = &adev->vmhub[AMDGPU_MMHUB_0];
int i;
uint32_t tmp;
@@ -239,25 +240,31 @@ static void mmhub_v2_0_setup_vmid_config(struct amdgpu_device *adev)
tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL,
RETRY_PERMISSION_OR_INVALID_PAGE_FAULT,
!amdgpu_noretry);
- WREG32_SOC15_OFFSET(MMHUB, 0, mmMMVM_CONTEXT1_CNTL, i, tmp);
- WREG32_SOC15_OFFSET(MMHUB, 0, mmMMVM_CONTEXT1_PAGE_TABLE_START_ADDR_LO32, i*2, 0);
- WREG32_SOC15_OFFSET(MMHUB, 0, mmMMVM_CONTEXT1_PAGE_TABLE_START_ADDR_HI32, i*2, 0);
- WREG32_SOC15_OFFSET(MMHUB, 0, mmMMVM_CONTEXT1_PAGE_TABLE_END_ADDR_LO32, i*2,
- lower_32_bits(adev->vm_manager.max_pfn - 1));
- WREG32_SOC15_OFFSET(MMHUB, 0, mmMMVM_CONTEXT1_PAGE_TABLE_END_ADDR_HI32, i*2,
- upper_32_bits(adev->vm_manager.max_pfn - 1));
+ WREG32_SOC15_OFFSET(MMHUB, 0, mmMMVM_CONTEXT1_CNTL,
+ i * hub->ctx_distance, tmp);
+ WREG32_SOC15_OFFSET(MMHUB, 0, mmMMVM_CONTEXT1_PAGE_TABLE_START_ADDR_LO32,
+ i * hub->ctx_addr_distance, 0);
+ WREG32_SOC15_OFFSET(MMHUB, 0, mmMMVM_CONTEXT1_PAGE_TABLE_START_ADDR_HI32,
+ i * hub->ctx_addr_distance, 0);
+ WREG32_SOC15_OFFSET(MMHUB, 0, mmMMVM_CONTEXT1_PAGE_TABLE_END_ADDR_LO32,
+ i * hub->ctx_addr_distance,
+ lower_32_bits(adev->vm_manager.max_pfn - 1));
+ WREG32_SOC15_OFFSET(MMHUB, 0, mmMMVM_CONTEXT1_PAGE_TABLE_END_ADDR_HI32,
+ i * hub->ctx_addr_distance,
+ upper_32_bits(adev->vm_manager.max_pfn - 1));
}
}
static void mmhub_v2_0_program_invalidation(struct amdgpu_device *adev)
{
+ struct amdgpu_vmhub *hub = &adev->vmhub[AMDGPU_MMHUB_0];
unsigned i;
for (i = 0; i < 18; ++i) {
WREG32_SOC15_OFFSET(MMHUB, 0, mmMMVM_INVALIDATE_ENG0_ADDR_RANGE_LO32,
- 2 * i, 0xffffffff);
+ i * hub->eng_addr_distance, 0xffffffff);
WREG32_SOC15_OFFSET(MMHUB, 0, mmMMVM_INVALIDATE_ENG0_ADDR_RANGE_HI32,
- 2 * i, 0x1f);
+ i * hub->eng_addr_distance, 0x1f);
}
}
@@ -279,12 +286,14 @@ int mmhub_v2_0_gart_enable(struct amdgpu_device *adev)
void mmhub_v2_0_gart_disable(struct amdgpu_device *adev)
{
+ struct amdgpu_vmhub *hub = &adev->vmhub[AMDGPU_MMHUB_0];
u32 tmp;
u32 i;
/* Disable all tables */
for (i = 0; i < 16; i++)
- WREG32_SOC15_OFFSET(MMHUB, 0, mmMMVM_CONTEXT0_CNTL, i, 0);
+ WREG32_SOC15_OFFSET(MMHUB, 0, mmMMVM_CONTEXT0_CNTL,
+ i * hub->ctx_distance, 0);
/* Setup TLB control */
tmp = RREG32_SOC15(MMHUB, 0, mmMMMC_VM_MX_L1_TLB_CNTL);
--
2.25.1
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next prev parent reply other threads:[~2020-07-06 5:06 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-07-06 5:04 [PATCH 00/12] drm/amdgpu: add register distance Huang Rui
2020-07-06 5:04 ` [PATCH 01/12] drm/amdgpu: add register distance members into vmhub structure Huang Rui
2020-07-06 5:04 ` [PATCH 02/12] drm/amdgpu: use register distance member instead of hardcode in GMC9 Huang Rui
2020-07-06 5:05 ` [PATCH 03/12] drm/amdgpu: use register distance member instead of hardcode in GMC10 Huang Rui
2020-07-06 5:05 ` [PATCH 04/12] drm/amdgpu: use register distance member instead of hardcode in VCN1/JEPG1 Huang Rui
2020-07-06 5:05 ` [PATCH 05/12] drm/amdgpu: use register distance member instead of hardcode in UVD7/VCE4 Huang Rui
2020-07-06 5:05 ` [PATCH 06/12] drm/amdgpu: use register distance member instead of hardcode in VCN2/JEPG2 Huang Rui
2020-07-06 5:05 ` [PATCH 07/12] drm/amdgpu: use register distance member instead of hardcode in gfxhub v1 Huang Rui
2020-07-06 5:05 ` [PATCH 08/12] drm/amdgpu: use register distance member instead of hardcode in gfxhub v2 Huang Rui
2020-07-06 5:05 ` [PATCH 09/12] drm/amdgpu: use register distance member instead of hardcode in gfxhub v2.1 Huang Rui
2020-07-06 5:05 ` [PATCH 10/12] drm/amdgpu: use register distance member instead of hardcode in mmhub v1 Huang Rui
2020-07-06 5:05 ` Huang Rui [this message]
2020-07-06 5:05 ` [PATCH 12/12] drm/amdgpu: use register distance member instead of hardcode in mmhub v9.4 Huang Rui
2020-07-06 10:39 ` [PATCH 00/12] drm/amdgpu: add register distance Christian König
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