* [PATCH 1/4] drm/amdgpu: add mode2 reset support for vangogh
@ 2020-11-25 16:21 Alex Deucher
2020-11-25 16:21 ` [PATCH 2/4] drm/amdgpu/nv: add mode2 reset handling Alex Deucher
` (2 more replies)
0 siblings, 3 replies; 5+ messages in thread
From: Alex Deucher @ 2020-11-25 16:21 UTC (permalink / raw)
To: amd-gfx; +Cc: Alex Deucher, Evan Quan
GPU reset is handled via SMU similar to previous APUs.
Acked-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c
index 1c1af7483dfe..3d4d27a304e9 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c
@@ -780,6 +780,11 @@ static int vangogh_set_fine_grain_gfx_freq_parameters(struct smu_context *smu)
return 0;
}
+static int vangogh_mode2_reset(struct smu_context *smu)
+{
+ return smu_cmn_send_smc_msg_with_param(smu, SMU_MSG_GfxDeviceDriverReset, SMU_RESET_MODE_2, NULL);
+}
+
static const struct pptable_funcs vangogh_ppt_funcs = {
.check_fw_status = smu_v11_0_check_fw_status,
@@ -808,6 +813,7 @@ static const struct pptable_funcs vangogh_ppt_funcs = {
.print_clk_levels = vangogh_print_fine_grain_clk,
.set_default_dpm_table = vangogh_set_default_dpm_tables,
.set_fine_grain_gfx_freq_parameters = vangogh_set_fine_grain_gfx_freq_parameters,
+ .mode2_reset = vangogh_mode2_reset,
};
void vangogh_set_ppt_funcs(struct smu_context *smu)
--
2.25.4
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^ permalink raw reply related [flat|nested] 5+ messages in thread* [PATCH 2/4] drm/amdgpu/nv: add mode2 reset handling
2020-11-25 16:21 [PATCH 1/4] drm/amdgpu: add mode2 reset support for vangogh Alex Deucher
@ 2020-11-25 16:21 ` Alex Deucher
2020-11-25 16:21 ` [PATCH 3/4] drm/amdgpu: fix mode2 reset sequence for vangogh Alex Deucher
2020-11-25 16:21 ` [PATCH 4/4] drm/amdgpu: Enable GPU reset " Alex Deucher
2 siblings, 0 replies; 5+ messages in thread
From: Alex Deucher @ 2020-11-25 16:21 UTC (permalink / raw)
To: amd-gfx; +Cc: Alex Deucher, Evan Quan
Vangogh will use mode2 reset, so plumb it through the nv
soc driver.
Acked-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
drivers/gpu/drm/amd/amdgpu/nv.c | 14 ++++++++++++--
1 file changed, 12 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/nv.c b/drivers/gpu/drm/amd/amdgpu/nv.c
index ac02dd707c44..221a29cdc0aa 100644
--- a/drivers/gpu/drm/amd/amdgpu/nv.c
+++ b/drivers/gpu/drm/amd/amdgpu/nv.c
@@ -352,6 +352,7 @@ nv_asic_reset_method(struct amdgpu_device *adev)
struct smu_context *smu = &adev->smu;
if (amdgpu_reset_method == AMD_RESET_METHOD_MODE1 ||
+ amdgpu_reset_method == AMD_RESET_METHOD_MODE2 ||
amdgpu_reset_method == AMD_RESET_METHOD_BACO)
return amdgpu_reset_method;
@@ -360,6 +361,8 @@ nv_asic_reset_method(struct amdgpu_device *adev)
amdgpu_reset_method);
switch (adev->asic_type) {
+ case CHIP_VANGOGH:
+ return AMD_RESET_METHOD_MODE2;
case CHIP_SIENNA_CICHLID:
case CHIP_NAVY_FLOUNDER:
return AMD_RESET_METHOD_MODE1;
@@ -376,7 +379,8 @@ static int nv_asic_reset(struct amdgpu_device *adev)
int ret = 0;
struct smu_context *smu = &adev->smu;
- if (nv_asic_reset_method(adev) == AMD_RESET_METHOD_BACO) {
+ switch (nv_asic_reset_method(adev)) {
+ case AMD_RESET_METHOD_BACO:
dev_info(adev->dev, "BACO reset\n");
ret = smu_baco_enter(smu);
@@ -385,9 +389,15 @@ static int nv_asic_reset(struct amdgpu_device *adev)
ret = smu_baco_exit(smu);
if (ret)
return ret;
- } else {
+ break;
+ case AMD_RESET_METHOD_MODE2:
+ dev_info(adev->dev, "MODE2 reset\n");
+ ret = amdgpu_dpm_mode2_reset(adev);
+ break;
+ default:
dev_info(adev->dev, "MODE1 reset\n");
ret = nv_asic_mode1_reset(adev);
+ break;
}
return ret;
--
2.25.4
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^ permalink raw reply related [flat|nested] 5+ messages in thread* [PATCH 3/4] drm/amdgpu: fix mode2 reset sequence for vangogh
2020-11-25 16:21 [PATCH 1/4] drm/amdgpu: add mode2 reset support for vangogh Alex Deucher
2020-11-25 16:21 ` [PATCH 2/4] drm/amdgpu/nv: add mode2 reset handling Alex Deucher
@ 2020-11-25 16:21 ` Alex Deucher
2020-11-26 3:13 ` Huang Rui
2020-11-25 16:21 ` [PATCH 4/4] drm/amdgpu: Enable GPU reset " Alex Deucher
2 siblings, 1 reply; 5+ messages in thread
From: Alex Deucher @ 2020-11-25 16:21 UTC (permalink / raw)
To: amd-gfx; +Cc: Alex Deucher
We need to save and restore PCI config space.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
drivers/gpu/drm/amd/amdgpu/nv.c | 34 ++++++++++++++++++++++++++++++++-
1 file changed, 33 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/nv.c b/drivers/gpu/drm/amd/amdgpu/nv.c
index 221a29cdc0aa..70d6556cd01d 100644
--- a/drivers/gpu/drm/amd/amdgpu/nv.c
+++ b/drivers/gpu/drm/amd/amdgpu/nv.c
@@ -336,6 +336,38 @@ static int nv_asic_mode1_reset(struct amdgpu_device *adev)
return ret;
}
+static int nv_asic_mode2_reset(struct amdgpu_device *adev)
+{
+ u32 i;
+ int ret = 0;
+
+ amdgpu_atombios_scratch_regs_engine_hung(adev, true);
+
+ /* disable BM */
+ pci_clear_master(adev->pdev);
+
+ amdgpu_device_cache_pci_state(adev->pdev);
+
+ ret = amdgpu_dpm_mode2_reset(adev);
+ if (ret)
+ dev_err(adev->dev, "GPU mode2 reset failed\n");
+
+ amdgpu_device_load_pci_state(adev->pdev);
+
+ /* wait for asic to come out of reset */
+ for (i = 0; i < adev->usec_timeout; i++) {
+ u32 memsize = adev->nbio.funcs->get_memsize(adev);
+
+ if (memsize != 0xffffffff)
+ break;
+ udelay(1);
+ }
+
+ amdgpu_atombios_scratch_regs_engine_hung(adev, false);
+
+ return ret;
+}
+
static bool nv_asic_supports_baco(struct amdgpu_device *adev)
{
struct smu_context *smu = &adev->smu;
@@ -392,7 +424,7 @@ static int nv_asic_reset(struct amdgpu_device *adev)
break;
case AMD_RESET_METHOD_MODE2:
dev_info(adev->dev, "MODE2 reset\n");
- ret = amdgpu_dpm_mode2_reset(adev);
+ ret = nv_asic_mode2_reset(adev);
break;
default:
dev_info(adev->dev, "MODE1 reset\n");
--
2.25.4
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^ permalink raw reply related [flat|nested] 5+ messages in thread* Re: [PATCH 3/4] drm/amdgpu: fix mode2 reset sequence for vangogh
2020-11-25 16:21 ` [PATCH 3/4] drm/amdgpu: fix mode2 reset sequence for vangogh Alex Deucher
@ 2020-11-26 3:13 ` Huang Rui
0 siblings, 0 replies; 5+ messages in thread
From: Huang Rui @ 2020-11-26 3:13 UTC (permalink / raw)
To: Alex Deucher; +Cc: Alex Deucher, amd-gfx
On Wed, Nov 25, 2020 at 11:21:31AM -0500, Alex Deucher wrote:
> We need to save and restore PCI config space.
>
> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Series are Reviewed-by: Huang Rui <ray.huang@amd.com>
Hi xiaomeng, let's verify these patch set in your platform.
> ---
> drivers/gpu/drm/amd/amdgpu/nv.c | 34 ++++++++++++++++++++++++++++++++-
> 1 file changed, 33 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/nv.c b/drivers/gpu/drm/amd/amdgpu/nv.c
> index 221a29cdc0aa..70d6556cd01d 100644
> --- a/drivers/gpu/drm/amd/amdgpu/nv.c
> +++ b/drivers/gpu/drm/amd/amdgpu/nv.c
> @@ -336,6 +336,38 @@ static int nv_asic_mode1_reset(struct amdgpu_device *adev)
> return ret;
> }
>
> +static int nv_asic_mode2_reset(struct amdgpu_device *adev)
> +{
> + u32 i;
> + int ret = 0;
> +
> + amdgpu_atombios_scratch_regs_engine_hung(adev, true);
> +
> + /* disable BM */
> + pci_clear_master(adev->pdev);
> +
> + amdgpu_device_cache_pci_state(adev->pdev);
> +
> + ret = amdgpu_dpm_mode2_reset(adev);
> + if (ret)
> + dev_err(adev->dev, "GPU mode2 reset failed\n");
> +
> + amdgpu_device_load_pci_state(adev->pdev);
> +
> + /* wait for asic to come out of reset */
> + for (i = 0; i < adev->usec_timeout; i++) {
> + u32 memsize = adev->nbio.funcs->get_memsize(adev);
> +
> + if (memsize != 0xffffffff)
> + break;
> + udelay(1);
> + }
> +
> + amdgpu_atombios_scratch_regs_engine_hung(adev, false);
> +
> + return ret;
> +}
> +
> static bool nv_asic_supports_baco(struct amdgpu_device *adev)
> {
> struct smu_context *smu = &adev->smu;
> @@ -392,7 +424,7 @@ static int nv_asic_reset(struct amdgpu_device *adev)
> break;
> case AMD_RESET_METHOD_MODE2:
> dev_info(adev->dev, "MODE2 reset\n");
> - ret = amdgpu_dpm_mode2_reset(adev);
> + ret = nv_asic_mode2_reset(adev);
> break;
> default:
> dev_info(adev->dev, "MODE1 reset\n");
> --
> 2.25.4
>
> _______________________________________________
> amd-gfx mailing list
> amd-gfx@lists.freedesktop.org
> https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Flists.freedesktop.org%2Fmailman%2Flistinfo%2Famd-gfx&data=04%7C01%7Cray.huang%40amd.com%7C232f4d9376fa46595ab708d8915e348c%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637419181097974222%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&sdata=G4MJVzemXHXDbWv53OWKVtD3DnJGgSs4TYbIEkQE2PE%3D&reserved=0
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^ permalink raw reply [flat|nested] 5+ messages in thread
* [PATCH 4/4] drm/amdgpu: Enable GPU reset for vangogh
2020-11-25 16:21 [PATCH 1/4] drm/amdgpu: add mode2 reset support for vangogh Alex Deucher
2020-11-25 16:21 ` [PATCH 2/4] drm/amdgpu/nv: add mode2 reset handling Alex Deucher
2020-11-25 16:21 ` [PATCH 3/4] drm/amdgpu: fix mode2 reset sequence for vangogh Alex Deucher
@ 2020-11-25 16:21 ` Alex Deucher
2 siblings, 0 replies; 5+ messages in thread
From: Alex Deucher @ 2020-11-25 16:21 UTC (permalink / raw)
To: amd-gfx; +Cc: Alex Deucher, Evan Quan
Enable GPU reset when we encounter a hang.
Acked-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index 79dd85f71fab..355fa0057c26 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -4189,6 +4189,7 @@ bool amdgpu_device_should_recover_gpu(struct amdgpu_device *adev)
case CHIP_NAVI14:
case CHIP_NAVI12:
case CHIP_SIENNA_CICHLID:
+ case CHIP_VANGOGH:
break;
default:
goto disabled;
--
2.25.4
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^ permalink raw reply related [flat|nested] 5+ messages in thread
end of thread, other threads:[~2020-11-26 3:11 UTC | newest]
Thread overview: 5+ messages (download: mbox.gz follow: Atom feed
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2020-11-25 16:21 [PATCH 1/4] drm/amdgpu: add mode2 reset support for vangogh Alex Deucher
2020-11-25 16:21 ` [PATCH 2/4] drm/amdgpu/nv: add mode2 reset handling Alex Deucher
2020-11-25 16:21 ` [PATCH 3/4] drm/amdgpu: fix mode2 reset sequence for vangogh Alex Deucher
2020-11-26 3:13 ` Huang Rui
2020-11-25 16:21 ` [PATCH 4/4] drm/amdgpu: Enable GPU reset " Alex Deucher
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