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From: Bindu Ramamurthy <bindu.r@amd.com>
To: <amd-gfx@lists.freedesktop.org>
Cc: Eryk.Brol@amd.com, Jake Wang <haonan.wang2@amd.com>,
	Sunpeng.Li@amd.com, Harry.Wentland@amd.com,
	Qingqing.Zhuo@amd.com, Rodrigo.Siqueira@amd.com,
	Aurabindo.Pillai@amd.com, Bhawanpreet.Lakha@amd.com,
	bindu.r@amd.com
Subject: [PATCH 11/14] drm/amd/display: updated wm table for Renoir
Date: Fri, 18 Dec 2020 17:29:01 -0500	[thread overview]
Message-ID: <20201218222904.393785-12-bindu.r@amd.com> (raw)
In-Reply-To: <20201218222904.393785-1-bindu.r@amd.com>

From: Jake Wang <haonan.wang2@amd.com>

[Why]
For certain timings, Renoir may underflow due to sr exit  latency
being too slow.

[How]
Updated wm table for renoir.

Signed-off-by: Jake Wang <haonan.wang2@amd.com>
Acked-by: Bindu Ramamurthy <bindu.r@amd.com>
---
 .../amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c    | 16 ++++++++--------
 1 file changed, 8 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c
index 9aa1b63bb161..bad30217c7b4 100644
--- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c
+++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c
@@ -731,32 +731,32 @@ static struct wm_table ddr4_wm_table_rn = {
 			.wm_inst = WM_A,
 			.wm_type = WM_TYPE_PSTATE_CHG,
 			.pstate_latency_us = 11.72,
-			.sr_exit_time_us = 9.09,
-			.sr_enter_plus_exit_time_us = 10.14,
+			.sr_exit_time_us = 11.90,
+			.sr_enter_plus_exit_time_us = 12.80,
 			.valid = true,
 		},
 		{
 			.wm_inst = WM_B,
 			.wm_type = WM_TYPE_PSTATE_CHG,
 			.pstate_latency_us = 11.72,
-			.sr_exit_time_us = 11.12,
-			.sr_enter_plus_exit_time_us = 12.48,
+			.sr_exit_time_us = 13.18,
+			.sr_enter_plus_exit_time_us = 14.30,
 			.valid = true,
 		},
 		{
 			.wm_inst = WM_C,
 			.wm_type = WM_TYPE_PSTATE_CHG,
 			.pstate_latency_us = 11.72,
-			.sr_exit_time_us = 11.12,
-			.sr_enter_plus_exit_time_us = 12.48,
+			.sr_exit_time_us = 13.18,
+			.sr_enter_plus_exit_time_us = 14.30,
 			.valid = true,
 		},
 		{
 			.wm_inst = WM_D,
 			.wm_type = WM_TYPE_PSTATE_CHG,
 			.pstate_latency_us = 11.72,
-			.sr_exit_time_us = 11.12,
-			.sr_enter_plus_exit_time_us = 12.48,
+			.sr_exit_time_us = 13.18,
+			.sr_enter_plus_exit_time_us = 14.30,
 			.valid = true,
 		},
 	}
-- 
2.25.1

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  parent reply	other threads:[~2020-12-18 22:30 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-12-18 22:28 [PATCH 00/14] DC Patches December 21, 2020 Bindu Ramamurthy
2020-12-18 22:28 ` [PATCH 01/14] drm/amd/display: handler not correctly checked at remove_irq_handler Bindu Ramamurthy
2020-12-18 22:28 ` [PATCH 02/14] drm/amd/display: Interfaces for hubp blank and soft reset Bindu Ramamurthy
2020-12-18 22:28 ` [PATCH 03/14] drm/amd/display: Modify the hdcp device count check condition Bindu Ramamurthy
2020-12-18 22:28 ` [PATCH 04/14] drm/amd/display: To modify the condition in indicating branch device Bindu Ramamurthy
2020-12-18 22:28 ` [PATCH 05/14] drm/amd/display: gradually ramp ABM intensity Bindu Ramamurthy
2020-12-18 22:28 ` [PATCH 06/14] drm/amd/display: change SMU repsonse timeout to 2s Bindu Ramamurthy
2020-12-18 22:28 ` [PATCH 07/14] drm/amd/display: Update RN/VGH active display count workaround Bindu Ramamurthy
2020-12-18 22:28 ` [PATCH 08/14] drm/amd/display: Remove unnecessary NULL check Bindu Ramamurthy
2020-12-18 22:28 ` [PATCH 09/14] drm/amd/display: Multi-display underflow observed Bindu Ramamurthy
2020-12-18 22:29 ` [PATCH 10/14] drm/amd/display: Acquire DSC during split stream for ODM only if top_pipe Bindu Ramamurthy
2020-12-18 22:29 ` Bindu Ramamurthy [this message]
2020-12-18 22:29 ` [PATCH 12/14] drm/amd/display: [FW Promotion] Release 0.0.47 Bindu Ramamurthy
2020-12-18 22:29 ` [PATCH 13/14] drm/amd/display: always program DPPDTO unless not safe to lower Bindu Ramamurthy
2020-12-18 22:29 ` [PATCH 14/14] drm/amd/display: add getter routine to retrieve mpcc mux Bindu Ramamurthy

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