* [PATCH AUTOSEL 5.4 006/130] drm/amd/display: Do not silently accept DCC for multiplane formats.
[not found] <20201223021813.2791612-1-sashal@kernel.org>
@ 2020-12-23 2:16 ` Sasha Levin
2020-12-29 14:54 ` Deucher, Alexander
2020-12-23 2:16 ` [PATCH AUTOSEL 5.4 032/130] drm/amd/amdgpu: Add rev_id workaround logic for SRIOV setup Sasha Levin
` (2 subsequent siblings)
3 siblings, 1 reply; 6+ messages in thread
From: Sasha Levin @ 2020-12-23 2:16 UTC (permalink / raw)
To: linux-kernel, stable
Cc: Sasha Levin, dri-devel, amd-gfx, Bas Nieuwenhuizen, Alex Deucher,
Nicholas Kazlauskas
From: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
[ Upstream commit b35ce7b364ec80b54f48a8fdf9fb74667774d2da ]
Silently accepting it could result in corruption.
Signed-off-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index d2dd387c95d86..ce70c42a2c3ec 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -2734,7 +2734,7 @@ fill_plane_dcc_attributes(struct amdgpu_device *adev,
return 0;
if (format >= SURFACE_PIXEL_FORMAT_VIDEO_BEGIN)
- return 0;
+ return -EINVAL;
if (!dc->cap_funcs.get_dcc_compression_cap)
return -EINVAL;
--
2.27.0
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https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply related [flat|nested] 6+ messages in thread* Re: [PATCH AUTOSEL 5.4 006/130] drm/amd/display: Do not silently accept DCC for multiplane formats.
2020-12-23 2:16 ` [PATCH AUTOSEL 5.4 006/130] drm/amd/display: Do not silently accept DCC for multiplane formats Sasha Levin
@ 2020-12-29 14:54 ` Deucher, Alexander
2021-01-04 21:20 ` Kazlauskas, Nicholas
0 siblings, 1 reply; 6+ messages in thread
From: Deucher, Alexander @ 2020-12-29 14:54 UTC (permalink / raw)
To: Sasha Levin, linux-kernel@vger.kernel.org, stable@vger.kernel.org
Cc: Kazlauskas, Nicholas, amd-gfx@lists.freedesktop.org,
dri-devel@lists.freedesktop.org, Bas Nieuwenhuizen
[-- Attachment #1.1: Type: text/plain, Size: 2554 bytes --]
[AMD Public Use]
I don't know if these fixes related to modifiers make sense in the pre-modifier code base. Bas, Nick?
Alex
________________________________
From: amd-gfx <amd-gfx-bounces@lists.freedesktop.org> on behalf of Sasha Levin <sashal@kernel.org>
Sent: Tuesday, December 22, 2020 9:16 PM
To: linux-kernel@vger.kernel.org <linux-kernel@vger.kernel.org>; stable@vger.kernel.org <stable@vger.kernel.org>
Cc: Sasha Levin <sashal@kernel.org>; dri-devel@lists.freedesktop.org <dri-devel@lists.freedesktop.org>; amd-gfx@lists.freedesktop.org <amd-gfx@lists.freedesktop.org>; Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>; Deucher, Alexander <Alexander.Deucher@amd.com>; Kazlauskas, Nicholas <Nicholas.Kazlauskas@amd.com>
Subject: [PATCH AUTOSEL 5.4 006/130] drm/amd/display: Do not silently accept DCC for multiplane formats.
From: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
[ Upstream commit b35ce7b364ec80b54f48a8fdf9fb74667774d2da ]
Silently accepting it could result in corruption.
Signed-off-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index d2dd387c95d86..ce70c42a2c3ec 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -2734,7 +2734,7 @@ fill_plane_dcc_attributes(struct amdgpu_device *adev,
return 0;
if (format >= SURFACE_PIXEL_FORMAT_VIDEO_BEGIN)
- return 0;
+ return -EINVAL;
if (!dc->cap_funcs.get_dcc_compression_cap)
return -EINVAL;
--
2.27.0
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[-- Attachment #1.2: Type: text/html, Size: 4743 bytes --]
[-- Attachment #2: Type: text/plain, Size: 154 bytes --]
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^ permalink raw reply related [flat|nested] 6+ messages in thread* Re: [PATCH AUTOSEL 5.4 006/130] drm/amd/display: Do not silently accept DCC for multiplane formats.
2020-12-29 14:54 ` Deucher, Alexander
@ 2021-01-04 21:20 ` Kazlauskas, Nicholas
0 siblings, 0 replies; 6+ messages in thread
From: Kazlauskas, Nicholas @ 2021-01-04 21:20 UTC (permalink / raw)
To: Deucher, Alexander, Sasha Levin, linux-kernel@vger.kernel.org,
stable@vger.kernel.org
Cc: amd-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org,
Bas Nieuwenhuizen
On 2020-12-29 9:54 a.m., Deucher, Alexander wrote:
> [AMD Public Use]
>
>
> I don't know if these fixes related to modifiers make sense in the
> pre-modifier code base. Bas, Nick?
>
> Alex
Mesa should be the only userspace trying to make use of DCC and it
doesn't do it for video formats. From the kernel side of things we've
also never supported this and you'd get corruption on the screen if you
tried.
It's a "fix" for both pre-modifiers and post-modifiers code.
Regards,
Nicholas Kazlauskas
> ------------------------------------------------------------------------
> *From:* amd-gfx <amd-gfx-bounces@lists.freedesktop.org> on behalf of
> Sasha Levin <sashal@kernel.org>
> *Sent:* Tuesday, December 22, 2020 9:16 PM
> *To:* linux-kernel@vger.kernel.org <linux-kernel@vger.kernel.org>;
> stable@vger.kernel.org <stable@vger.kernel.org>
> *Cc:* Sasha Levin <sashal@kernel.org>; dri-devel@lists.freedesktop.org
> <dri-devel@lists.freedesktop.org>; amd-gfx@lists.freedesktop.org
> <amd-gfx@lists.freedesktop.org>; Bas Nieuwenhuizen
> <bas@basnieuwenhuizen.nl>; Deucher, Alexander
> <Alexander.Deucher@amd.com>; Kazlauskas, Nicholas
> <Nicholas.Kazlauskas@amd.com>
> *Subject:* [PATCH AUTOSEL 5.4 006/130] drm/amd/display: Do not silently
> accept DCC for multiplane formats.
> From: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
>
> [ Upstream commit b35ce7b364ec80b54f48a8fdf9fb74667774d2da ]
>
> Silently accepting it could result in corruption.
>
> Signed-off-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
> Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
> Signed-off-by: Sasha Levin <sashal@kernel.org>
> ---
> drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> index d2dd387c95d86..ce70c42a2c3ec 100644
> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> @@ -2734,7 +2734,7 @@ fill_plane_dcc_attributes(struct amdgpu_device *adev,
> return 0;
>
> if (format >= SURFACE_PIXEL_FORMAT_VIDEO_BEGIN)
> - return 0;
> + return -EINVAL;
>
> if (!dc->cap_funcs.get_dcc_compression_cap)
> return -EINVAL;
> --
> 2.27.0
>
> _______________________________________________
> amd-gfx mailing list
> amd-gfx@lists.freedesktop.org
> https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Flists.freedesktop.org%2Fmailman%2Flistinfo%2Famd-gfx&data=04%7C01%7Calexander.deucher%40amd.com%7Cfb9f2581393f494acd1708d8a6e905fc%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637442867044150000%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&sdata=ZYz1FjTl6SoWX1B91t0McdUai%2FzRF9C8uBmE%2BNQNod4%3D&reserved=0
> <https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Flists.freedesktop.org%2Fmailman%2Flistinfo%2Famd-gfx&data=04%7C01%7Calexander.deucher%40amd.com%7Cfb9f2581393f494acd1708d8a6e905fc%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637442867044150000%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&sdata=ZYz1FjTl6SoWX1B91t0McdUai%2FzRF9C8uBmE%2BNQNod4%3D&reserved=0>
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^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH AUTOSEL 5.4 032/130] drm/amd/amdgpu: Add rev_id workaround logic for SRIOV setup
[not found] <20201223021813.2791612-1-sashal@kernel.org>
2020-12-23 2:16 ` [PATCH AUTOSEL 5.4 006/130] drm/amd/display: Do not silently accept DCC for multiplane formats Sasha Levin
@ 2020-12-23 2:16 ` Sasha Levin
2020-12-23 2:17 ` [PATCH AUTOSEL 5.4 080/130] drm/amd/display: Update dram_clock_change_latency for DCN2.1 Sasha Levin
2020-12-23 2:17 ` [PATCH AUTOSEL 5.4 096/130] drm/amd/display: Revert DCN2.1 dram_clock_change_latency update Sasha Levin
3 siblings, 0 replies; 6+ messages in thread
From: Sasha Levin @ 2020-12-23 2:16 UTC (permalink / raw)
To: linux-kernel, stable
Cc: Sasha Levin, Bokun Zhang, dri-devel, amd-gfx, Alex Deucher,
Monk Liu
From: Bokun Zhang <Bokun.Zhang@amd.com>
[ Upstream commit de21e4aeb2b26128dcc5be1bcb2fafa73d041e51 ]
- When we are under SRIOV setup, the rev_id cannot be read
properly. Therefore, we will return default value for it
Signed-off-by: Bokun Zhang <Bokun.Zhang@amd.com>
Reviewed-by: Monk Liu <monk.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
---
drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c | 11 ++++++++++-
1 file changed, 10 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c b/drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c
index c05d78d4efc66..56887affc13be 100644
--- a/drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c
+++ b/drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c
@@ -34,8 +34,17 @@
static u32 nbio_v2_3_get_rev_id(struct amdgpu_device *adev)
{
- u32 tmp = RREG32_SOC15(NBIO, 0, mmRCC_DEV0_EPF0_STRAP0);
+ u32 tmp;
+ /*
+ * guest vm gets 0xffffffff when reading RCC_DEV0_EPF0_STRAP0,
+ * therefore we force rev_id to 0 (which is the default value)
+ */
+ if (amdgpu_sriov_vf(adev)) {
+ return 0;
+ }
+
+ tmp = RREG32_SOC15(NBIO, 0, mmRCC_DEV0_EPF0_STRAP0);
tmp &= RCC_DEV0_EPF0_STRAP0__STRAP_ATI_REV_ID_DEV0_F0_MASK;
tmp >>= RCC_DEV0_EPF0_STRAP0__STRAP_ATI_REV_ID_DEV0_F0__SHIFT;
--
2.27.0
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https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply related [flat|nested] 6+ messages in thread* [PATCH AUTOSEL 5.4 080/130] drm/amd/display: Update dram_clock_change_latency for DCN2.1
[not found] <20201223021813.2791612-1-sashal@kernel.org>
2020-12-23 2:16 ` [PATCH AUTOSEL 5.4 006/130] drm/amd/display: Do not silently accept DCC for multiplane formats Sasha Levin
2020-12-23 2:16 ` [PATCH AUTOSEL 5.4 032/130] drm/amd/amdgpu: Add rev_id workaround logic for SRIOV setup Sasha Levin
@ 2020-12-23 2:17 ` Sasha Levin
2020-12-23 2:17 ` [PATCH AUTOSEL 5.4 096/130] drm/amd/display: Revert DCN2.1 dram_clock_change_latency update Sasha Levin
3 siblings, 0 replies; 6+ messages in thread
From: Sasha Levin @ 2020-12-23 2:17 UTC (permalink / raw)
To: linux-kernel, stable
Cc: Sasha Levin, Sung Lee, amd-gfx, Aurabindo Pillai, dri-devel,
Alex Deucher, Tony Cheng
From: Sung Lee <sung.lee@amd.com>
[ Upstream commit 901c1ec05ef277ce9d43cb806a225b28b3efe89a ]
[WHY]
dram clock change latencies get updated using ddr4 latency table, but
does that update does not happen before validation. This value
should not be the default and should be number received from
df for better mode support.
This may cause a PState hang on high refresh panels with short vblanks
such as on 1080p 360hz or 300hz panels.
[HOW]
Update latency from 23.84 to 11.72.
Signed-off-by: Sung Lee <sung.lee@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
---
drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c b/drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c
index bb7add5ea2273..a6d5beada6634 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c
@@ -257,7 +257,7 @@ struct _vcs_dpi_soc_bounding_box_st dcn2_1_soc = {
.num_banks = 8,
.num_chans = 4,
.vmm_page_size_bytes = 4096,
- .dram_clock_change_latency_us = 23.84,
+ .dram_clock_change_latency_us = 11.72,
.return_bus_width_bytes = 64,
.dispclk_dppclk_vco_speed_mhz = 3600,
.xfc_bus_transport_time_us = 4,
--
2.27.0
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^ permalink raw reply related [flat|nested] 6+ messages in thread* [PATCH AUTOSEL 5.4 096/130] drm/amd/display: Revert DCN2.1 dram_clock_change_latency update
[not found] <20201223021813.2791612-1-sashal@kernel.org>
` (2 preceding siblings ...)
2020-12-23 2:17 ` [PATCH AUTOSEL 5.4 080/130] drm/amd/display: Update dram_clock_change_latency for DCN2.1 Sasha Levin
@ 2020-12-23 2:17 ` Sasha Levin
3 siblings, 0 replies; 6+ messages in thread
From: Sasha Levin @ 2020-12-23 2:17 UTC (permalink / raw)
To: linux-kernel, stable
Cc: Sasha Levin, Sung Lee, Eryk Brol, amd-gfx, Yongqiang Sun,
Michael Strauss, dri-devel, Alex Deucher
From: Michael Strauss <michael.strauss@amd.com>
[ Upstream commit 3abad347c432b9f5904cfad40f417d5cff90300c ]
[Why]
New value breaks VSR on high refresh panels, reverting until a fix is developed
Signed-off-by: Michael Strauss <michael.strauss@amd.com>
Signed-off-by: Sung Lee <sung.lee@amd.com>
Reviewed-by: Yongqiang Sun <yongqiang.sun@amd.com>
Acked-by: Eryk Brol <eryk.brol@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
---
drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c b/drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c
index a6d5beada6634..bb7add5ea2273 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c
@@ -257,7 +257,7 @@ struct _vcs_dpi_soc_bounding_box_st dcn2_1_soc = {
.num_banks = 8,
.num_chans = 4,
.vmm_page_size_bytes = 4096,
- .dram_clock_change_latency_us = 11.72,
+ .dram_clock_change_latency_us = 23.84,
.return_bus_width_bytes = 64,
.dispclk_dppclk_vco_speed_mhz = 3600,
.xfc_bus_transport_time_us = 4,
--
2.27.0
_______________________________________________
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https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply related [flat|nested] 6+ messages in thread