From: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
To: amd-gfx@lists.freedesktop.org
Cc: Aric Cyr <Aric.Cyr@amd.com>,
Wesley Chalmers <Wesley.Chalmers@amd.com>,
Eryk.Brol@amd.com, Sunpeng.Li@amd.com, Harry.Wentland@amd.com,
qingqing.zhuo@amd.com, Rodrigo.Siqueira@amd.com,
roman.li@amd.com, Aurabindo.Pillai@amd.com,
Bhawanpreet.Lakha@amd.com, bindu.r@amd.com
Subject: [PATCH 07/21] drm/amd/display: Unblank hubp based on plane visibility
Date: Fri, 8 Jan 2021 16:49:53 -0500 [thread overview]
Message-ID: <20210108215007.851249-8-Rodrigo.Siqueira@amd.com> (raw)
In-Reply-To: <20210108215007.851249-1-Rodrigo.Siqueira@amd.com>
From: Wesley Chalmers <Wesley.Chalmers@amd.com>
[WHY]
DCN10 uses plane visibility to determine when to unblank HUBP; there is
no reason DCN20+ should not do the same.
[HOW]
In addition to changing the check in HWSEQ, we must change
is_pipe_tree_visible so that it checks ODM pipe topologies as well as
MPC. Since we're now checking both ODM and MPC topologies, the helper
function names have been changed to reference "parent" and "child"
instead of "top" and "bottom".
Signed-off-by: Wesley Chalmers <Wesley.Chalmers@amd.com>
Reviewed-by: Aric Cyr <Aric.Cyr@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
---
.../gpu/drm/amd/display/dc/basics/dc_common.c | 20 +++++++++++++------
.../gpu/drm/amd/display/dc/basics/dc_common.h | 4 ++--
.../drm/amd/display/dc/dcn20/dcn20_hwseq.c | 2 +-
3 files changed, 17 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/basics/dc_common.c b/drivers/gpu/drm/amd/display/dc/basics/dc_common.c
index b2fc4f8e6482..ad04ef98e652 100644
--- a/drivers/gpu/drm/amd/display/dc/basics/dc_common.c
+++ b/drivers/gpu/drm/amd/display/dc/basics/dc_common.c
@@ -49,20 +49,24 @@ bool is_rgb_cspace(enum dc_color_space output_color_space)
}
}
-bool is_lower_pipe_tree_visible(struct pipe_ctx *pipe_ctx)
+bool is_child_pipe_tree_visible(struct pipe_ctx *pipe_ctx)
{
if (pipe_ctx->plane_state && pipe_ctx->plane_state->visible)
return true;
- if (pipe_ctx->bottom_pipe && is_lower_pipe_tree_visible(pipe_ctx->bottom_pipe))
+ if (pipe_ctx->bottom_pipe && is_child_pipe_tree_visible(pipe_ctx->bottom_pipe))
+ return true;
+ if (pipe_ctx->next_odm_pipe && is_child_pipe_tree_visible(pipe_ctx->next_odm_pipe))
return true;
return false;
}
-bool is_upper_pipe_tree_visible(struct pipe_ctx *pipe_ctx)
+bool is_parent_pipe_tree_visible(struct pipe_ctx *pipe_ctx)
{
if (pipe_ctx->plane_state && pipe_ctx->plane_state->visible)
return true;
- if (pipe_ctx->top_pipe && is_upper_pipe_tree_visible(pipe_ctx->top_pipe))
+ if (pipe_ctx->top_pipe && is_parent_pipe_tree_visible(pipe_ctx->top_pipe))
+ return true;
+ if (pipe_ctx->prev_odm_pipe && is_parent_pipe_tree_visible(pipe_ctx->prev_odm_pipe))
return true;
return false;
}
@@ -71,9 +75,13 @@ bool is_pipe_tree_visible(struct pipe_ctx *pipe_ctx)
{
if (pipe_ctx->plane_state && pipe_ctx->plane_state->visible)
return true;
- if (pipe_ctx->top_pipe && is_upper_pipe_tree_visible(pipe_ctx->top_pipe))
+ if (pipe_ctx->top_pipe && is_parent_pipe_tree_visible(pipe_ctx->top_pipe))
+ return true;
+ if (pipe_ctx->bottom_pipe && is_child_pipe_tree_visible(pipe_ctx->bottom_pipe))
+ return true;
+ if (pipe_ctx->prev_odm_pipe && is_parent_pipe_tree_visible(pipe_ctx->prev_odm_pipe))
return true;
- if (pipe_ctx->bottom_pipe && is_lower_pipe_tree_visible(pipe_ctx->bottom_pipe))
+ if (pipe_ctx->next_odm_pipe && is_child_pipe_tree_visible(pipe_ctx->next_odm_pipe))
return true;
return false;
}
diff --git a/drivers/gpu/drm/amd/display/dc/basics/dc_common.h b/drivers/gpu/drm/amd/display/dc/basics/dc_common.h
index 7c0cbf47e8ce..b061497480b8 100644
--- a/drivers/gpu/drm/amd/display/dc/basics/dc_common.h
+++ b/drivers/gpu/drm/amd/display/dc/basics/dc_common.h
@@ -30,9 +30,9 @@
bool is_rgb_cspace(enum dc_color_space output_color_space);
-bool is_lower_pipe_tree_visible(struct pipe_ctx *pipe_ctx);
+bool is_child_pipe_tree_visible(struct pipe_ctx *pipe_ctx);
-bool is_upper_pipe_tree_visible(struct pipe_ctx *pipe_ctx);
+bool is_parent_pipe_tree_visible(struct pipe_ctx *pipe_ctx);
bool is_pipe_tree_visible(struct pipe_ctx *pipe_ctx);
diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
index cb822df21b7c..6470f5c7dfea 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
@@ -1570,7 +1570,7 @@ static void dcn20_update_dchubp_dpp(
- if (pipe_ctx->update_flags.bits.enable)
+ if (is_pipe_tree_visible(pipe_ctx))
hubp->funcs->set_blank(hubp, false);
}
--
2.25.1
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next prev parent reply other threads:[~2021-01-08 21:50 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-01-08 21:49 [PATCH 00/21] DC Patches January 08, 2021 Rodrigo Siqueira
2021-01-08 21:49 ` [PATCH 01/21] drm/amd/display: 3.2.117 Rodrigo Siqueira
2021-01-08 21:49 ` [PATCH 02/21] drm/amd/display: NULL pointer hang Rodrigo Siqueira
2021-01-08 21:49 ` [PATCH 03/21] drm/amd/display: Initialize stack variable Rodrigo Siqueira
2021-01-08 21:49 ` [PATCH 04/21] drm/amd/display: Separate fec debug flag and monitor patch Rodrigo Siqueira
2021-01-08 21:49 ` [PATCH 05/21] drm/amd/display: HUBP_IN_BLANK for DCN30 Rodrigo Siqueira
2021-01-08 21:49 ` [PATCH 06/21] drm/amd/display: Remove HUBP_DISABLE from default Rodrigo Siqueira
2021-01-10 23:12 ` Rodrigo Siqueira
2021-01-08 21:49 ` Rodrigo Siqueira [this message]
2021-01-08 21:49 ` [PATCH 08/21] drm/amd/display: New path for enabling DPG Rodrigo Siqueira
2021-01-08 21:49 ` [PATCH 09/21] drm/amd/display: removed unnecessary check when dpp clock increasing Rodrigo Siqueira
2021-01-08 21:49 ` [PATCH 10/21] drm/amd/display: doesn't reprogram AMD OUI Rodrigo Siqueira
2021-01-08 21:49 ` [PATCH 11/21] drm/amd/display: Remove unused P010 debug flag Rodrigo Siqueira
2021-01-08 21:49 ` [PATCH 12/21] drm/amd/display: implement T12 compliance Rodrigo Siqueira
2021-01-08 21:49 ` [PATCH 13/21] drm/amd/display: fix seamless boot stream adding algorithm Rodrigo Siqueira
2021-01-08 21:50 ` [PATCH 14/21] drm/amd/display: Fix assert being hit with GAMCOR memory shut down Rodrigo Siqueira
2021-01-08 21:50 ` [PATCH 15/21] drm/amd/display: New sequence for HUBP blank Rodrigo Siqueira
2021-01-08 21:50 ` [PATCH 16/21] drm/amd/display: enable HUBP blank behaviour Rodrigo Siqueira
2021-01-08 21:50 ` [PATCH 17/21] drm/amd/display: Add a missing DCN3.01 API mapping Rodrigo Siqueira
2021-01-08 21:50 ` [PATCH 18/21] drm/amd/display: 3.2.118 Rodrigo Siqueira
2021-01-08 21:50 ` [PATCH 19/21] drm/amd/display: Revert patch causing black screen Rodrigo Siqueira
2021-01-08 21:50 ` [PATCH 20/21] drm/amd/display: disable dcn10 pipe split by default Rodrigo Siqueira
2021-01-08 21:50 ` [PATCH 21/21] drm/amd/display: change SMU repsonse timeout to 2s Rodrigo Siqueira
2021-01-08 22:12 ` [PATCH 00/21] DC Patches January 08, 2021 Rodrigo Siqueira
2021-01-08 22:52 ` Wheeler, Daniel
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