* [RFC PATCH 1/2] drm/amdgpu: Add IB test dedicated BOs
@ 2021-09-08 5:45 xinhui pan
2021-09-08 5:45 ` [RFC PATCH 2/2] drm/amdgpu: IPs use IB test dedicated BO xinhui pan
0 siblings, 1 reply; 2+ messages in thread
From: xinhui pan @ 2021-09-08 5:45 UTC (permalink / raw)
To: amd-gfx; +Cc: alexander.deucher, christian.koenig, xinhui pan
Two dedicated VRAM and GTT BOs for IB test.
Signed-off-by: xinhui pan <xinhui.pan@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 4 ++
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 6 +++
drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c | 54 ++++++++++++++++++++++
3 files changed, 64 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index e9e3ea0bdf37..93db6ee9b719 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -519,6 +519,8 @@ int amdgpu_ib_schedule(struct amdgpu_ring *ring, unsigned num_ibs,
int amdgpu_ib_pool_init(struct amdgpu_device *adev);
void amdgpu_ib_pool_fini(struct amdgpu_device *adev);
int amdgpu_ib_ring_tests(struct amdgpu_device *adev);
+int amdgpu_ib_test_create_bo(struct amdgpu_device *adev);
+void amdgpu_ib_test_destroy_bo(struct amdgpu_device *adev);
/*
* CS.
@@ -949,6 +951,8 @@ struct amdgpu_device {
bool ib_pool_ready;
struct amdgpu_sa_manager ib_pools[AMDGPU_IB_POOL_MAX];
struct amdgpu_sched gpu_sched[AMDGPU_HW_IP_NUM][AMDGPU_RING_PRIO_MAX];
+ struct amdgpu_bo *ib_test_vram_bo;
+ struct amdgpu_bo *ib_test_gtt_bo;
/* interrupts */
struct amdgpu_irq irq;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index 4e13381e9b5f..5f9b6ca671db 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -2389,6 +2389,10 @@ static int amdgpu_device_ip_init(struct amdgpu_device *adev)
goto init_failed;
}
+ r = amdgpu_ib_test_create_bo(adev);
+ if (r)
+ goto init_failed;
+
r = amdgpu_ucode_create_bo(adev); /* create ucode bo when sw_init complete*/
if (r)
goto init_failed;
@@ -2768,6 +2772,8 @@ static int amdgpu_device_ip_fini(struct amdgpu_device *adev)
amdgpu_amdkfd_device_fini_sw(adev);
+ amdgpu_ib_test_destroy_bo(adev);
+
for (i = adev->num_ip_blocks - 1; i >= 0; i--) {
if (!adev->ip_blocks[i].status.sw)
continue;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
index c076a6b9a5a2..67865f6a91b1 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
@@ -429,6 +429,60 @@ int amdgpu_ib_ring_tests(struct amdgpu_device *adev)
return ret;
}
+void amdgpu_ib_test_destroy_bo(struct amdgpu_device *adev)
+{
+ if (adev->ib_test_gtt_bo)
+ amdgpu_bo_free_kernel(&adev->ib_test_gtt_bo, NULL, NULL);
+ if (adev->ib_test_vram_bo)
+ amdgpu_bo_free_kernel(&adev->ib_test_vram_bo, NULL, NULL);
+}
+
+int amdgpu_ib_test_create_bo(struct amdgpu_device *adev)
+{
+ struct amdgpu_bo *bo = NULL;
+ void *addr;
+ int r;
+
+ amdgpu_ib_test_destroy_bo(adev);
+
+ r = amdgpu_bo_create_reserved(adev, 128 * 1024, PAGE_SIZE,
+ AMDGPU_GEM_DOMAIN_GTT,
+ &bo, NULL, &addr);
+ if (r)
+ return r;
+ adev->ib_test_gtt_bo = bo;
+ amdgpu_bo_unreserve(bo);
+
+ bo = NULL;
+ r = amdgpu_bo_create_reserved(adev, 128 * 1024, PAGE_SIZE,
+ AMDGPU_GEM_DOMAIN_VRAM,
+ &bo, NULL, &addr);
+ if (r)
+ goto err_create;
+ if (!adev->uvd.address_64_bit) {
+ amdgpu_bo_kunmap(bo);
+ amdgpu_bo_unpin(bo);
+ r = amdgpu_bo_pin_restricted(bo, AMDGPU_GEM_DOMAIN_VRAM,
+ 0, 256 << 20);
+ if (r)
+ goto err_pin;
+ r = amdgpu_bo_kmap(bo, &addr);
+ if (r)
+ goto err_map;
+ }
+ adev->ib_test_vram_bo = bo;
+ amdgpu_bo_unreserve(bo);
+
+ return 0;
+err_map:
+ amdgpu_bo_unpin(bo);
+err_pin:
+ amdgpu_bo_unreserve(bo);
+ amdgpu_bo_unref(&bo);
+err_create:
+ amdgpu_bo_free_kernel(&adev->ib_test_gtt_bo, NULL, NULL);
+ return r;
+}
/*
* Debugfs info
*/
--
2.25.1
^ permalink raw reply related [flat|nested] 2+ messages in thread
* [RFC PATCH 2/2] drm/amdgpu: IPs use IB test dedicated BO
2021-09-08 5:45 [RFC PATCH 1/2] drm/amdgpu: Add IB test dedicated BOs xinhui pan
@ 2021-09-08 5:45 ` xinhui pan
0 siblings, 0 replies; 2+ messages in thread
From: xinhui pan @ 2021-09-08 5:45 UTC (permalink / raw)
To: amd-gfx; +Cc: alexander.deucher, christian.koenig, xinhui pan
Let vce/uvd/vcn use it to avoid memory allocation during IB test.
This is useful when memory is nearly used up and no BO can be
evicted/swappout.
Signed-off-by: xinhui pan <xinhui.pan@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c | 51 ++++-------
drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c | 9 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c | 113 ++++++++++++------------
drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c | 10 +--
drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c | 10 +--
5 files changed, 89 insertions(+), 104 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
index d451c359606a..573ab1d69bd7 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
@@ -1080,23 +1080,10 @@ static int amdgpu_uvd_send_msg(struct amdgpu_ring *ring, struct amdgpu_bo *bo,
unsigned offset_idx = 0;
unsigned offset[3] = { UVD_BASE_SI, 0, 0 };
- amdgpu_bo_kunmap(bo);
- amdgpu_bo_unpin(bo);
-
- if (!ring->adev->uvd.address_64_bit) {
- struct ttm_operation_ctx ctx = { true, false };
-
- amdgpu_bo_placement_from_domain(bo, AMDGPU_GEM_DOMAIN_VRAM);
- amdgpu_uvd_force_into_uvd_segment(bo);
- r = ttm_bo_validate(&bo->tbo, &bo->placement, &ctx);
- if (r)
- goto err;
- }
-
r = amdgpu_job_alloc_with_ib(adev, 64, direct ? AMDGPU_IB_POOL_DIRECT :
AMDGPU_IB_POOL_DELAYED, &job);
if (r)
- goto err;
+ return r;
if (adev->asic_type >= CHIP_VEGA10) {
offset_idx = 1 + ring->me;
@@ -1148,8 +1135,6 @@ static int amdgpu_uvd_send_msg(struct amdgpu_ring *ring, struct amdgpu_bo *bo,
}
amdgpu_bo_fence(bo, f, false);
- amdgpu_bo_unreserve(bo);
- amdgpu_bo_unref(&bo);
if (fence)
*fence = dma_fence_get(f);
@@ -1159,10 +1144,6 @@ static int amdgpu_uvd_send_msg(struct amdgpu_ring *ring, struct amdgpu_bo *bo,
err_free:
amdgpu_job_free(job);
-
-err:
- amdgpu_bo_unreserve(bo);
- amdgpu_bo_unref(&bo);
return r;
}
@@ -1177,11 +1158,12 @@ int amdgpu_uvd_get_create_msg(struct amdgpu_ring *ring, uint32_t handle,
uint32_t *msg;
int r, i;
- r = amdgpu_bo_create_reserved(adev, 1024, PAGE_SIZE,
- AMDGPU_GEM_DOMAIN_GTT,
- &bo, NULL, (void **)&msg);
- if (r)
- return r;
+ if (!ring->adev->uvd.address_64_bit)
+ bo = adev->ib_test_vram_bo;
+ else
+ bo = adev->ib_test_gtt_bo;
+ amdgpu_bo_reserve(bo, true);
+ msg = amdgpu_bo_kptr(bo);
/* stitch together an UVD create msg */
msg[0] = cpu_to_le32(0x00000de4);
@@ -1198,7 +1180,9 @@ int amdgpu_uvd_get_create_msg(struct amdgpu_ring *ring, uint32_t handle,
for (i = 11; i < 1024; ++i)
msg[i] = cpu_to_le32(0x0);
- return amdgpu_uvd_send_msg(ring, bo, true, fence);
+ r = amdgpu_uvd_send_msg(ring, bo, true, fence);
+ amdgpu_bo_unreserve(bo);
+ return r;
}
int amdgpu_uvd_get_destroy_msg(struct amdgpu_ring *ring, uint32_t handle,
@@ -1209,11 +1193,12 @@ int amdgpu_uvd_get_destroy_msg(struct amdgpu_ring *ring, uint32_t handle,
uint32_t *msg;
int r, i;
- r = amdgpu_bo_create_reserved(adev, 1024, PAGE_SIZE,
- AMDGPU_GEM_DOMAIN_GTT,
- &bo, NULL, (void **)&msg);
- if (r)
- return r;
+ if (!ring->adev->uvd.address_64_bit)
+ bo = adev->ib_test_vram_bo;
+ else
+ bo = adev->ib_test_gtt_bo;
+ amdgpu_bo_reserve(bo, true);
+ msg = amdgpu_bo_kptr(bo);
/* stitch together an UVD destroy msg */
msg[0] = cpu_to_le32(0x00000de4);
@@ -1223,7 +1208,9 @@ int amdgpu_uvd_get_destroy_msg(struct amdgpu_ring *ring, uint32_t handle,
for (i = 4; i < 1024; ++i)
msg[i] = cpu_to_le32(0x0);
- return amdgpu_uvd_send_msg(ring, bo, direct, fence);
+ r = amdgpu_uvd_send_msg(ring, bo, direct, fence);
+ amdgpu_bo_unreserve(bo);
+ return r;
}
static void amdgpu_uvd_idle_work_handler(struct work_struct *work)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c
index e9fdf49d69e8..70af6afbbbb6 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c
@@ -1141,11 +1141,11 @@ int amdgpu_vce_ring_test_ib(struct amdgpu_ring *ring, long timeout)
if (ring != &ring->adev->vce.ring[0])
return 0;
- r = amdgpu_bo_create_reserved(ring->adev, 512, PAGE_SIZE,
- AMDGPU_GEM_DOMAIN_VRAM,
- &bo, NULL, NULL);
+ bo = ring->adev->ib_test_vram_bo;
+ amdgpu_bo_reserve(bo, true);
+ r = ttm_bo_wait(&bo->tbo, false, false);
if (r)
- return r;
+ goto error;
r = amdgpu_vce_get_create_msg(ring, 1, bo, NULL);
if (r)
@@ -1164,7 +1164,6 @@ int amdgpu_vce_ring_test_ib(struct amdgpu_ring *ring, long timeout)
error:
dma_fence_put(fence);
amdgpu_bo_unreserve(bo);
- amdgpu_bo_free_kernel(&bo, NULL, NULL);
return r;
}
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
index 561296a85b43..b150d5a5db73 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
@@ -577,8 +577,6 @@ static int amdgpu_vcn_dec_send_msg(struct amdgpu_ring *ring,
goto err_free;
amdgpu_bo_fence(bo, f, false);
- amdgpu_bo_unreserve(bo);
- amdgpu_bo_free_kernel(&bo, NULL, (void **)&msg);
if (fence)
*fence = dma_fence_get(f);
@@ -588,26 +586,15 @@ static int amdgpu_vcn_dec_send_msg(struct amdgpu_ring *ring,
err_free:
amdgpu_job_free(job);
-
err:
- amdgpu_bo_unreserve(bo);
- amdgpu_bo_free_kernel(&bo, NULL, (void **)&msg);
return r;
}
-static int amdgpu_vcn_dec_get_create_msg(struct amdgpu_ring *ring, uint32_t handle,
- struct amdgpu_bo **bo)
+static void amdgpu_vcn_dec_get_create_msg(struct amdgpu_ring *ring, uint32_t handle,
+ struct amdgpu_bo *bo)
{
- struct amdgpu_device *adev = ring->adev;
- uint32_t *msg;
- int r, i;
-
- *bo = NULL;
- r = amdgpu_bo_create_reserved(adev, 1024, PAGE_SIZE,
- AMDGPU_GEM_DOMAIN_VRAM,
- bo, NULL, (void **)&msg);
- if (r)
- return r;
+ uint32_t *msg = amdgpu_bo_kptr(bo);
+ int i;
msg[0] = cpu_to_le32(0x00000028);
msg[1] = cpu_to_le32(0x00000038);
@@ -625,23 +612,13 @@ static int amdgpu_vcn_dec_get_create_msg(struct amdgpu_ring *ring, uint32_t hand
msg[13] = cpu_to_le32(0x00000440);
for (i = 14; i < 1024; ++i)
msg[i] = cpu_to_le32(0x0);
-
- return 0;
}
-static int amdgpu_vcn_dec_get_destroy_msg(struct amdgpu_ring *ring, uint32_t handle,
- struct amdgpu_bo **bo)
+static void amdgpu_vcn_dec_get_destroy_msg(struct amdgpu_ring *ring, uint32_t handle,
+ struct amdgpu_bo *bo)
{
- struct amdgpu_device *adev = ring->adev;
- uint32_t *msg;
- int r, i;
-
- *bo = NULL;
- r = amdgpu_bo_create_reserved(adev, 1024, PAGE_SIZE,
- AMDGPU_GEM_DOMAIN_VRAM,
- bo, NULL, (void **)&msg);
- if (r)
- return r;
+ uint32_t *msg = amdgpu_bo_kptr(bo);
+ int i;
msg[0] = cpu_to_le32(0x00000028);
msg[1] = cpu_to_le32(0x00000018);
@@ -651,8 +628,6 @@ static int amdgpu_vcn_dec_get_destroy_msg(struct amdgpu_ring *ring, uint32_t han
msg[5] = cpu_to_le32(0x00000000);
for (i = 6; i < 1024; ++i)
msg[i] = cpu_to_le32(0x0);
-
- return 0;
}
int amdgpu_vcn_dec_ring_test_ib(struct amdgpu_ring *ring, long timeout)
@@ -661,17 +636,29 @@ int amdgpu_vcn_dec_ring_test_ib(struct amdgpu_ring *ring, long timeout)
struct amdgpu_bo *bo;
long r;
- r = amdgpu_vcn_dec_get_create_msg(ring, 1, &bo);
+ bo = ring->adev->ib_test_vram_bo;
+ amdgpu_bo_reserve(bo, true);
+ r = ttm_bo_wait(&bo->tbo, false, false);
if (r)
goto error;
- r = amdgpu_vcn_dec_send_msg(ring, bo, NULL);
+ amdgpu_vcn_dec_get_create_msg(ring, 1, bo);
+
+ r = amdgpu_vcn_dec_send_msg(ring, bo, &fence);
if (r)
goto error;
- r = amdgpu_vcn_dec_get_destroy_msg(ring, 1, &bo);
- if (r)
+
+ r = dma_fence_wait_timeout(fence, false, timeout);
+ if (r == 0)
+ r = -ETIMEDOUT;
+ if (r < 0)
goto error;
+ dma_fence_put(fence);
+ fence = NULL;
+
+ amdgpu_vcn_dec_get_destroy_msg(ring, 1, bo);
+
r = amdgpu_vcn_dec_send_msg(ring, bo, &fence);
if (r)
goto error;
@@ -681,9 +668,9 @@ int amdgpu_vcn_dec_ring_test_ib(struct amdgpu_ring *ring, long timeout)
r = -ETIMEDOUT;
else if (r > 0)
r = 0;
-
- dma_fence_put(fence);
error:
+ dma_fence_put(fence);
+ amdgpu_bo_unreserve(bo);
return r;
}
@@ -727,8 +714,6 @@ static int amdgpu_vcn_dec_sw_send_msg(struct amdgpu_ring *ring,
goto err_free;
amdgpu_bo_fence(bo, f, false);
- amdgpu_bo_unreserve(bo);
- amdgpu_bo_unref(&bo);
if (fence)
*fence = dma_fence_get(f);
@@ -738,10 +723,7 @@ static int amdgpu_vcn_dec_sw_send_msg(struct amdgpu_ring *ring,
err_free:
amdgpu_job_free(job);
-
err:
- amdgpu_bo_unreserve(bo);
- amdgpu_bo_unref(&bo);
return r;
}
@@ -751,17 +733,29 @@ int amdgpu_vcn_dec_sw_ring_test_ib(struct amdgpu_ring *ring, long timeout)
struct amdgpu_bo *bo;
long r;
- r = amdgpu_vcn_dec_get_create_msg(ring, 1, &bo);
+ bo = ring->adev->ib_test_vram_bo;
+ amdgpu_bo_reserve(bo, true);
+ r = ttm_bo_wait(&bo->tbo, false, false);
if (r)
goto error;
- r = amdgpu_vcn_dec_sw_send_msg(ring, bo, NULL);
+ amdgpu_vcn_dec_get_create_msg(ring, 1, bo);
+
+ r = amdgpu_vcn_dec_sw_send_msg(ring, bo, &fence);
if (r)
goto error;
- r = amdgpu_vcn_dec_get_destroy_msg(ring, 1, &bo);
- if (r)
+
+ r = dma_fence_wait_timeout(fence, false, timeout);
+ if (r == 0)
+ r = -ETIMEDOUT;
+ if (r < 0)
goto error;
+ dma_fence_put(fence);
+ fence = NULL;
+
+ amdgpu_vcn_dec_get_destroy_msg(ring, 1, bo);
+
r = amdgpu_vcn_dec_sw_send_msg(ring, bo, &fence);
if (r)
goto error;
@@ -772,8 +766,9 @@ int amdgpu_vcn_dec_sw_ring_test_ib(struct amdgpu_ring *ring, long timeout)
else if (r > 0)
r = 0;
- dma_fence_put(fence);
error:
+ dma_fence_put(fence);
+ amdgpu_bo_unreserve(bo);
return r;
}
@@ -922,16 +917,25 @@ int amdgpu_vcn_enc_ring_test_ib(struct amdgpu_ring *ring, long timeout)
struct amdgpu_bo *bo = NULL;
long r;
- r = amdgpu_bo_create_reserved(ring->adev, 128 * 1024, PAGE_SIZE,
- AMDGPU_GEM_DOMAIN_VRAM,
- &bo, NULL, NULL);
+ bo = ring->adev->ib_test_vram_bo;
+ amdgpu_bo_reserve(bo, true);
+ r = ttm_bo_wait(&bo->tbo, false, false);
if (r)
- return r;
+ goto error;
- r = amdgpu_vcn_enc_get_create_msg(ring, 1, bo, NULL);
+ r = amdgpu_vcn_enc_get_create_msg(ring, 1, bo, &fence);
if (r)
goto error;
+ r = dma_fence_wait_timeout(fence, false, timeout);
+ if (r == 0)
+ r = -ETIMEDOUT;
+ if (r < 0)
+ goto error;
+
+ dma_fence_put(fence);
+ fence = NULL;
+
r = amdgpu_vcn_enc_get_destroy_msg(ring, 1, bo, &fence);
if (r)
goto error;
@@ -945,7 +949,6 @@ int amdgpu_vcn_enc_ring_test_ib(struct amdgpu_ring *ring, long timeout)
error:
dma_fence_put(fence);
amdgpu_bo_unreserve(bo);
- amdgpu_bo_free_kernel(&bo, NULL, NULL);
return r;
}
diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c b/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c
index bc571833632e..0ce8fcc318d3 100644
--- a/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c
@@ -335,11 +335,11 @@ static int uvd_v6_0_enc_ring_test_ib(struct amdgpu_ring *ring, long timeout)
struct amdgpu_bo *bo = NULL;
long r;
- r = amdgpu_bo_create_reserved(ring->adev, 128 * 1024, PAGE_SIZE,
- AMDGPU_GEM_DOMAIN_VRAM,
- &bo, NULL, NULL);
+ bo = ring->adev->ib_test_vram_bo;
+ amdgpu_bo_reserve(bo, true);
+ r = ttm_bo_wait(&bo->tbo, false, false);
if (r)
- return r;
+ goto error;
r = uvd_v6_0_enc_get_create_msg(ring, 1, bo, NULL);
if (r)
@@ -357,9 +357,7 @@ static int uvd_v6_0_enc_ring_test_ib(struct amdgpu_ring *ring, long timeout)
error:
dma_fence_put(fence);
- amdgpu_bo_unpin(bo);
amdgpu_bo_unreserve(bo);
- amdgpu_bo_unref(&bo);
return r;
}
diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c b/drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c
index b6e82d75561f..6d26c80df960 100644
--- a/drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c
@@ -341,11 +341,11 @@ static int uvd_v7_0_enc_ring_test_ib(struct amdgpu_ring *ring, long timeout)
struct amdgpu_bo *bo = NULL;
long r;
- r = amdgpu_bo_create_reserved(ring->adev, 128 * 1024, PAGE_SIZE,
- AMDGPU_GEM_DOMAIN_VRAM,
- &bo, NULL, NULL);
+ bo = ring->adev->ib_test_vram_bo;
+ amdgpu_bo_reserve(bo, true);
+ r = ttm_bo_wait(&bo->tbo, false, false);
if (r)
- return r;
+ goto error;
r = uvd_v7_0_enc_get_create_msg(ring, 1, bo, NULL);
if (r)
@@ -363,9 +363,7 @@ static int uvd_v7_0_enc_ring_test_ib(struct amdgpu_ring *ring, long timeout)
error:
dma_fence_put(fence);
- amdgpu_bo_unpin(bo);
amdgpu_bo_unreserve(bo);
- amdgpu_bo_unref(&bo);
return r;
}
--
2.25.1
^ permalink raw reply related [flat|nested] 2+ messages in thread
end of thread, other threads:[~2021-09-08 5:46 UTC | newest]
Thread overview: 2+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2021-09-08 5:45 [RFC PATCH 1/2] drm/amdgpu: Add IB test dedicated BOs xinhui pan
2021-09-08 5:45 ` [RFC PATCH 2/2] drm/amdgpu: IPs use IB test dedicated BO xinhui pan
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox