From: Alex Deucher <alexander.deucher@amd.com>
To: <amd-gfx@lists.freedesktop.org>
Cc: Alex Deucher <alexander.deucher@amd.com>
Subject: [PATCH 24/66] drm/amdgpu/smu11.0: convert to IP version checking
Date: Tue, 21 Sep 2021 14:06:43 -0400 [thread overview]
Message-ID: <20210921180725.1985552-25-alexander.deucher@amd.com> (raw)
In-Reply-To: <20210921180725.1985552-1-alexander.deucher@amd.com>
Use IP versions rather than asic_type to differentiate
IP version specific features.
v2: rebase
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
.../gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c | 88 ++++++++++---------
1 file changed, 46 insertions(+), 42 deletions(-)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c
index 87b055466a33..5af7c8b7806f 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c
@@ -90,36 +90,37 @@ int smu_v11_0_init_microcode(struct smu_context *smu)
struct amdgpu_firmware_info *ucode = NULL;
if (amdgpu_sriov_vf(adev) &&
- ((adev->asic_type == CHIP_NAVI12) ||
- (adev->asic_type == CHIP_SIENNA_CICHLID)))
+ ((adev->ip_versions[MP1_HWIP] == IP_VERSION(11, 0, 9)) ||
+ (adev->ip_versions[MP1_HWIP] == IP_VERSION(11, 0, 7))))
return 0;
- switch (adev->asic_type) {
- case CHIP_ARCTURUS:
- chip_name = "arcturus";
- break;
- case CHIP_NAVI10:
+ switch (adev->ip_versions[MP1_HWIP]) {
+ case IP_VERSION(11, 0, 0):
chip_name = "navi10";
break;
- case CHIP_NAVI14:
+ case IP_VERSION(11, 0, 5):
chip_name = "navi14";
break;
- case CHIP_NAVI12:
+ case IP_VERSION(11, 0, 9):
chip_name = "navi12";
break;
- case CHIP_SIENNA_CICHLID:
+ case IP_VERSION(11, 0, 7):
chip_name = "sienna_cichlid";
break;
- case CHIP_NAVY_FLOUNDER:
+ case IP_VERSION(11, 0, 11):
chip_name = "navy_flounder";
break;
- case CHIP_DIMGREY_CAVEFISH:
+ case IP_VERSION(11, 0, 12):
chip_name = "dimgrey_cavefish";
break;
- case CHIP_BEIGE_GOBY:
+ case IP_VERSION(11, 0, 13):
chip_name = "beige_goby";
break;
default:
+ if (adev->asic_type == CHIP_ARCTURUS) {
+ chip_name = "arcturus";
+ break;
+ }
dev_err(adev->dev, "Unsupported ASIC type %d\n", adev->asic_type);
return -EINVAL;
}
@@ -238,38 +239,39 @@ int smu_v11_0_check_fw_version(struct smu_context *smu)
if (smu->is_apu)
adev->pm.fw_version = smu_version;
- switch (smu->adev->asic_type) {
- case CHIP_ARCTURUS:
- smu->smc_driver_if_version = SMU11_DRIVER_IF_VERSION_ARCT;
- break;
- case CHIP_NAVI10:
+ switch (adev->ip_versions[MP1_HWIP]) {
+ case IP_VERSION(11, 0, 0):
smu->smc_driver_if_version = SMU11_DRIVER_IF_VERSION_NV10;
break;
- case CHIP_NAVI12:
+ case IP_VERSION(11, 0, 9):
smu->smc_driver_if_version = SMU11_DRIVER_IF_VERSION_NV12;
break;
- case CHIP_NAVI14:
+ case IP_VERSION(11, 0, 5):
smu->smc_driver_if_version = SMU11_DRIVER_IF_VERSION_NV14;
break;
- case CHIP_SIENNA_CICHLID:
+ case IP_VERSION(11, 0, 7):
smu->smc_driver_if_version = SMU11_DRIVER_IF_VERSION_Sienna_Cichlid;
break;
- case CHIP_NAVY_FLOUNDER:
+ case IP_VERSION(11, 0, 11):
smu->smc_driver_if_version = SMU11_DRIVER_IF_VERSION_Navy_Flounder;
break;
case CHIP_VANGOGH:
smu->smc_driver_if_version = SMU11_DRIVER_IF_VERSION_VANGOGH;
break;
- case CHIP_DIMGREY_CAVEFISH:
+ case IP_VERSION(11, 0, 12):
smu->smc_driver_if_version = SMU11_DRIVER_IF_VERSION_Dimgrey_Cavefish;
break;
- case CHIP_BEIGE_GOBY:
+ case IP_VERSION(11, 0, 13):
smu->smc_driver_if_version = SMU11_DRIVER_IF_VERSION_Beige_Goby;
break;
- case CHIP_CYAN_SKILLFISH:
+ case IP_VERSION(11, 0, 8):
smu->smc_driver_if_version = SMU11_DRIVER_IF_VERSION_Cyan_Skillfish;
break;
default:
+ if (adev->asic_type == CHIP_ARCTURUS) {
+ smu->smc_driver_if_version = SMU11_DRIVER_IF_VERSION_ARCT;
+ break;
+ }
dev_err(smu->adev->dev, "smu unsupported asic type:%d.\n", smu->adev->asic_type);
smu->smc_driver_if_version = SMU11_DRIVER_IF_VERSION_INV;
break;
@@ -492,8 +494,9 @@ int smu_v11_0_fini_smc_tables(struct smu_context *smu)
int smu_v11_0_init_power(struct smu_context *smu)
{
+ struct amdgpu_device *adev = smu->adev;
struct smu_power_context *smu_power = &smu->smu_power;
- size_t size = smu->adev->asic_type == CHIP_VANGOGH ?
+ size_t size = adev->ip_versions[MP1_HWIP] == IP_VERSION(11, 5, 0) ?
sizeof(struct smu_11_5_power_context) :
sizeof(struct smu_11_0_power_context);
@@ -750,8 +753,9 @@ int smu_v11_0_init_display_count(struct smu_context *smu, uint32_t count)
/* Navy_Flounder/Dimgrey_Cavefish do not support to change
* display num currently
*/
- if (adev->asic_type >= CHIP_NAVY_FLOUNDER &&
- adev->asic_type <= CHIP_BEIGE_GOBY)
+ if (adev->ip_versions[MP1_HWIP] == IP_VERSION(11, 0, 11) ||
+ adev->ip_versions[MP1_HWIP] == IP_VERSION(11, 5, 0) ||
+ adev->ip_versions[MP1_HWIP] == IP_VERSION(11, 0, 13))
return 0;
return smu_cmn_send_smc_msg_with_param(smu,
@@ -1136,15 +1140,15 @@ int smu_v11_0_gfx_off_control(struct smu_context *smu, bool enable)
int ret = 0;
struct amdgpu_device *adev = smu->adev;
- switch (adev->asic_type) {
- case CHIP_NAVI10:
- case CHIP_NAVI14:
- case CHIP_NAVI12:
- case CHIP_SIENNA_CICHLID:
- case CHIP_NAVY_FLOUNDER:
- case CHIP_DIMGREY_CAVEFISH:
- case CHIP_BEIGE_GOBY:
- case CHIP_VANGOGH:
+ switch (adev->ip_versions[MP1_HWIP]) {
+ case IP_VERSION(11, 0, 0):
+ case IP_VERSION(11, 0, 5):
+ case IP_VERSION(11, 0, 9):
+ case IP_VERSION(11, 0, 7):
+ case IP_VERSION(11, 0, 11):
+ case IP_VERSION(11, 0, 12):
+ case IP_VERSION(11, 0, 13):
+ case IP_VERSION(11, 5, 0):
if (!(adev->pm.pp_feature & PP_GFXOFF_MASK))
return 0;
if (enable)
@@ -1630,11 +1634,11 @@ int smu_v11_0_baco_set_state(struct smu_context *smu, enum smu_baco_state state)
mutex_lock(&smu_baco->mutex);
if (state == SMU_BACO_STATE_ENTER) {
- switch (adev->asic_type) {
- case CHIP_SIENNA_CICHLID:
- case CHIP_NAVY_FLOUNDER:
- case CHIP_DIMGREY_CAVEFISH:
- case CHIP_BEIGE_GOBY:
+ switch (adev->ip_versions[MP1_HWIP]) {
+ case IP_VERSION(11, 0, 7):
+ case IP_VERSION(11, 0, 11):
+ case IP_VERSION(11, 0, 12):
+ case IP_VERSION(11, 0, 13):
if (amdgpu_runtime_pm == 2)
ret = smu_cmn_send_smc_msg_with_param(smu,
SMU_MSG_EnterBaco,
--
2.31.1
next prev parent reply other threads:[~2021-09-21 18:08 UTC|newest]
Thread overview: 106+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-09-21 18:06 [PATCH 00/66] Move to IP driven device enumeration Alex Deucher
2021-09-21 18:06 ` [PATCH 01/66] drm/amdgpu: move headless sku check into harvest function Alex Deucher
2021-09-21 18:06 ` [PATCH 02/66] drm/amdgpu: add debugfs access to the IP discovery table Alex Deucher
2021-09-21 18:06 ` [PATCH 03/66] drm/amdgpu: store HW IP versions in the driver structure Alex Deucher
2021-09-21 18:06 ` [PATCH 04/66] drm/amdgpu: fill in IP versions from IP discovery table Alex Deucher
2021-09-22 16:58 ` Felix Kuehling
2021-09-22 20:43 ` Deucher, Alexander
2021-09-21 18:06 ` [PATCH 05/66] drm/amdgpu: add XGMI HWIP Alex Deucher
2021-09-21 18:06 ` [PATCH 06/66] drm/amdgpu/nv: export common IP functions Alex Deucher
2021-09-21 18:06 ` [PATCH 07/66] drm/amdgpu: add initial IP enumeration via IP discovery table Alex Deucher
2021-09-21 18:06 ` [PATCH 08/66] drm/amdgpu/sdma5.0: convert to IP version checking Alex Deucher
2021-09-21 18:06 ` [PATCH 09/66] drm/amdgpu/sdma5.2: " Alex Deucher
2021-09-22 5:55 ` Lazar, Lijo
2021-09-22 6:08 ` Chen, Guchun
2021-09-22 9:18 ` Lazar, Lijo
2021-09-21 18:06 ` [PATCH 10/66] drm/amdgpu/gfx10: " Alex Deucher
2021-09-21 18:06 ` [PATCH 11/66] drm/amdgpu: filter out radeon PCI device IDs Alex Deucher
2021-09-22 4:41 ` Lazar, Lijo
2021-09-22 15:19 ` Deucher, Alexander
2021-09-22 16:16 ` Felix Kuehling
2021-09-22 17:07 ` Alex Deucher
2021-09-21 18:06 ` [PATCH 12/66] drm/amdgpu: bind to any 0x1002 PCI diplay class device Alex Deucher
2021-09-21 18:06 ` [PATCH 13/66] drm/amdgpu/gmc10.0: convert to IP version checking Alex Deucher
2021-09-21 18:06 ` [PATCH 14/66] drm/amdgpu: Use IP discovery to drive setting IP blocks by default Alex Deucher
2021-09-21 18:06 ` [PATCH 15/66] drm/amdgpu: drive nav10 from the IP discovery table Alex Deucher
2021-09-21 18:06 ` [PATCH 16/66] drm/amdgpu/gfxhub2.1: convert to IP version checking Alex Deucher
2021-09-21 18:06 ` [PATCH 17/66] drm/amdgpu/mmhub2.0: " Alex Deucher
2021-09-21 18:06 ` [PATCH 18/66] drm/amdgpu/mmhub2.1: " Alex Deucher
2021-09-21 18:06 ` [PATCH 19/66] drm/amdgpu/vcn3.0: " Alex Deucher
2021-09-21 18:06 ` [PATCH 20/66] drm/amdgpu/athub2.0: " Alex Deucher
2021-09-21 18:06 ` [PATCH 21/66] drm/amdgpu/athub2.1: " Alex Deucher
2021-09-21 18:06 ` [PATCH 22/66] drm/amdgpu/navi10_ih: " Alex Deucher
2021-09-21 18:06 ` [PATCH 23/66] drm/amdgpu/amdgpu_smu: " Alex Deucher
2021-09-22 7:32 ` Lazar, Lijo
2021-09-22 15:40 ` Deucher, Alexander
2021-09-21 18:06 ` Alex Deucher [this message]
2021-09-21 18:06 ` [PATCH 25/66] drm/amdgpu/navi10_ppt: " Alex Deucher
2021-09-21 18:06 ` [PATCH 26/66] drm/amdgpu/sienna_cichlid_ppt: " Alex Deucher
2021-09-21 18:06 ` [PATCH 27/66] drm/amdgpu: drive all navi asics from the IP discovery table Alex Deucher
2021-09-21 18:06 ` [PATCH 28/66] drm/amdgpu/nv: convert to IP version checking Alex Deucher
2021-09-22 7:31 ` Lazar, Lijo
2021-09-22 15:21 ` Alex Deucher
2021-09-21 18:06 ` [PATCH 29/66] drm/amdgpu/display/dm: " Alex Deucher
2021-09-22 7:37 ` Lazar, Lijo
2021-09-22 15:53 ` Deucher, Alexander
2021-09-21 18:06 ` [PATCH 30/66] drm/amdgpu: add DCI HWIP Alex Deucher
2021-09-23 15:43 ` Harry Wentland
2021-09-24 19:58 ` Alex Deucher
2021-09-24 20:40 ` Harry Wentland
2021-09-21 18:06 ` [PATCH 31/66] drm/amdgpu: make soc15_common_ip_funcs static Alex Deucher
2021-09-21 18:06 ` [PATCH 32/66] drm/amdgpu/soc15: export common IP functions Alex Deucher
2021-09-21 18:06 ` [PATCH 33/66] drm/amdgpu: add initial IP discovery support for vega based parts Alex Deucher
2021-09-22 7:48 ` Lazar, Lijo
2021-09-22 7:54 ` Lazar, Lijo
2021-09-22 15:58 ` Alex Deucher
2021-09-21 18:06 ` [PATCH 34/66] drm/amdgpu/soc15: get rev_id in soc15_common_early_init Alex Deucher
2021-09-21 18:06 ` [PATCH 35/66] drm/amdgpu: drive all vega asics from the IP discovery table Alex Deucher
2021-09-21 18:06 ` [PATCH 36/66] drm/amdgpu: default to true in amdgpu_device_asic_has_dc_support Alex Deucher
2021-09-23 15:58 ` Harry Wentland
2021-09-21 18:06 ` [PATCH 37/66] drm/amdgpu/display/dm: convert RAVEN to IP version checking Alex Deucher
2021-09-21 18:06 ` [PATCH 38/66] drm/amdgpu/sdma4.0: convert " Alex Deucher
2021-09-21 18:06 ` [PATCH 39/66] drm/amdgpu/hdp4.0: " Alex Deucher
2021-09-21 18:06 ` [PATCH 40/66] drm/amdgpu/gfx9.0: " Alex Deucher
2021-09-21 18:07 ` [PATCH 41/66] drm/amdgpu/amdgpu_psp: " Alex Deucher
2021-09-21 18:07 ` [PATCH 42/66] drm/amdgpu/psp_v11.0: " Alex Deucher
2021-09-21 18:07 ` [PATCH 43/66] drm/amdgpu/psp_v13.0: " Alex Deucher
2021-09-21 18:07 ` [PATCH 44/66] drm/amdgpu/pm/smu_v11.0: update " Alex Deucher
2021-09-21 18:07 ` [PATCH 45/66] drm/amdgpu/pm/smu_v13.0: convert " Alex Deucher
2021-09-22 8:18 ` Lazar, Lijo
2021-09-21 18:07 ` [PATCH 46/66] drm/amdgpu/pm/amdgpu_smu: convert more " Alex Deucher
2021-09-22 8:16 ` Lazar, Lijo
2021-09-22 16:06 ` Deucher, Alexander
2021-09-21 18:07 ` [PATCH 47/66] drm/amdgpu/amdgpu_vcn: convert to " Alex Deucher
2021-09-21 18:07 ` [PATCH 48/66] drm/amdgpu/vcn2.5: " Alex Deucher
2021-09-21 18:07 ` [PATCH 49/66] drm/amdgpu/soc15: " Alex Deucher
2021-09-21 18:07 ` [PATCH 50/66] drm/amd/display: fix error case handling Alex Deucher
2021-09-21 18:07 ` [PATCH 51/66] drm/amdgpu: add VCN1 hardware IP Alex Deucher
2021-09-21 18:07 ` [PATCH 52/66] drm/amdgpu: store all instances of IPs in the IP version table Alex Deucher
2021-09-22 8:36 ` Lazar, Lijo
2021-09-22 8:45 ` Lazar, Lijo
2021-09-21 18:07 ` [PATCH 53/66] drm/amdgpu: add HWID of SDMA instance 2 and 3 Alex Deucher
2021-09-21 18:07 ` [PATCH 54/66] drm/amdgpu: get VCN and SDMA instances from IP discovery table Alex Deucher
2021-09-21 18:07 ` [PATCH 55/66] drm/amdgpu/sdma: remove manual instance setting Alex Deucher
2021-09-21 18:07 ` [PATCH 56/66] drm/amdgpu/vcn: " Alex Deucher
2021-09-21 18:07 ` [PATCH 57/66] drm/amdgpu: get VCN harvest information from IP discovery table Alex Deucher
2021-09-21 18:07 ` [PATCH 58/66] drm/amdgpu/ucode: add default behavior Alex Deucher
2021-09-21 18:07 ` [PATCH 59/66] drm/amdgpu: add new asic_type for IP discovery Alex Deucher
2021-09-21 18:07 ` [PATCH 60/66] drm/amdgpu: set CHIP_IP_DISCOVERY as the asic type by default Alex Deucher
2021-09-23 6:47 ` Lazar, Lijo
2021-09-23 21:46 ` Alex Deucher
2021-09-21 18:07 ` [PATCH 61/66] drm/amdgpu: convert IP version array to include instances Alex Deucher
2021-09-22 9:08 ` Lazar, Lijo
2021-09-22 16:17 ` Alex Deucher
2021-09-23 4:58 ` Lazar, Lijo
2021-09-23 21:42 ` Alex Deucher
2021-09-21 18:07 ` [PATCH 62/66] drm/amdgpu: clean up set IP function Alex Deucher
2021-09-21 18:07 ` [PATCH 63/66] drm/amdgpu: add support for SRIOV in IP discovery path Alex Deucher
2021-09-21 18:07 ` [PATCH 64/66] drm/amdkfd: clean up parameters in kgd2kfd_probe Alex Deucher
2021-09-21 18:07 ` [PATCH 65/66] drm/amdkfd: convert kfd_device.c to use GC IP version Alex Deucher
2021-09-21 21:00 ` ernstp
2021-09-22 1:44 ` Alex Deucher
2021-09-22 16:55 ` Felix Kuehling
2021-09-21 18:07 ` [PATCH 66/66] drm/amdgpu: add an option to override IP discovery table from a file Alex Deucher
2021-09-22 7:54 ` [PATCH 00/66] Move to IP driven device enumeration Christian König
2021-09-22 20:25 ` Alex Deucher
2021-09-23 6:43 ` Christian König
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