From: Solomon Chiu <solomon.chiu@amd.com>
To: <amd-gfx@lists.freedesktop.org>
Cc: stylon.wang@amd.com, Reza Amini <reza.amini@amd.com>,
Sunpeng.Li@amd.com, Harry.Wentland@amd.com,
qingqing.zhuo@amd.com, Rodrigo.Siqueira@amd.com,
roman.li@amd.com, solomon.chiu@amd.com,
Daniel Wheeler <daniel.wheeler@amd.com>,
Aurabindo.Pillai@amd.com, wayne.lin@amd.com,
Wellenreiter Ethan <Ethan.Wellenreiter@amd.com>,
Bhawanpreet.Lakha@amd.com, agustin.gutierrez@amd.com,
pavle.kotarac@amd.com
Subject: [PATCH 13/21] drm/amd/display: Re-implementing ARGB16161616 pixel format as 22
Date: Tue, 12 Jul 2022 23:37:32 +0800 [thread overview]
Message-ID: <20220712153733.501210-1-solomon.chiu@amd.com> (raw)
In-Reply-To: <20220708163529.3534276-1-solomon.chiu@amd.com>
From: Wellenreiter Ethan <Ethan.Wellenreiter@amd.com>
[Why]
ABGR16161616 colour format was added to dcn10/20/30, and set
any ARGB16161616 to the same value as it (26). As such, the
HDR10 Green Point y value was too far off of the EDID stated
value for DisplayPort.
[How]
Added back the pixel format as 22 for ARGB16161616 for
dcn10/20/30.
Reviewed-by: Reza Amini <reza.amini@amd.com>
Acked-by: Solomon Chiu <solomon.chiu@amd.com>
Signed-off-by: Wellenreiter Ethan <Ethan.Wellenreiter@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
---
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.c | 2 ++
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c | 3 +++
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dpp.c | 2 ++
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c | 3 +++
drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dpp.c | 2 ++
5 files changed, 12 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.c
index db7ca4b0cdb9..d4a6504dfe00 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.c
@@ -361,6 +361,8 @@ void dpp1_cnv_setup (
select = INPUT_CSC_SELECT_ICSC;
break;
case SURFACE_PIXEL_FORMAT_GRPH_ARGB16161616:
+ pixel_format = 22;
+ break;
case SURFACE_PIXEL_FORMAT_GRPH_ABGR16161616:
pixel_format = 26; /* ARGB16161616_UNORM */
break;
diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c
index 564e061ccb58..b54c12400323 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c
@@ -278,6 +278,9 @@ void hubp1_program_pixel_format(
SURFACE_PIXEL_FORMAT, 10);
break;
case SURFACE_PIXEL_FORMAT_GRPH_ARGB16161616:
+ REG_UPDATE(DCSURF_SURFACE_CONFIG,
+ SURFACE_PIXEL_FORMAT, 22);
+ break;
case SURFACE_PIXEL_FORMAT_GRPH_ABGR16161616: /*we use crossbar already*/
REG_UPDATE(DCSURF_SURFACE_CONFIG,
SURFACE_PIXEL_FORMAT, 26); /* ARGB16161616_UNORM */
diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dpp.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dpp.c
index eaa7032f0f1a..ea1f14af0db7 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dpp.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dpp.c
@@ -166,6 +166,8 @@ static void dpp2_cnv_setup (
select = DCN2_ICSC_SELECT_ICSC_A;
break;
case SURFACE_PIXEL_FORMAT_GRPH_ARGB16161616:
+ pixel_format = 22;
+ break;
case SURFACE_PIXEL_FORMAT_GRPH_ABGR16161616:
pixel_format = 26; /* ARGB16161616_UNORM */
break;
diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c
index 9570c2118ccc..936af65381ef 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c
@@ -463,6 +463,9 @@ void hubp2_program_pixel_format(
SURFACE_PIXEL_FORMAT, 10);
break;
case SURFACE_PIXEL_FORMAT_GRPH_ARGB16161616:
+ REG_UPDATE(DCSURF_SURFACE_CONFIG,
+ SURFACE_PIXEL_FORMAT, 22);
+ break;
case SURFACE_PIXEL_FORMAT_GRPH_ABGR16161616: /*we use crossbar already*/
REG_UPDATE(DCSURF_SURFACE_CONFIG,
SURFACE_PIXEL_FORMAT, 26); /* ARGB16161616_UNORM */
diff --git a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dpp.c b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dpp.c
index 3c77949b8110..787b852eeaf2 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dpp.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dpp.c
@@ -244,6 +244,8 @@ void dpp3_cnv_setup (
select = INPUT_CSC_SELECT_ICSC;
break;
case SURFACE_PIXEL_FORMAT_GRPH_ARGB16161616:
+ pixel_format = 22;
+ break;
case SURFACE_PIXEL_FORMAT_GRPH_ABGR16161616:
pixel_format = 26; /* ARGB16161616_UNORM */
break;
--
2.25.1
next prev parent reply other threads:[~2022-07-12 15:38 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-07-08 16:35 [PATCH 00/21] DC Patches July 11, 2022 Solomon Chiu
2022-07-08 16:35 ` [PATCH 01/21] drm/amd/display: Exit SubVP if MPO in use Solomon Chiu
2022-07-08 16:35 ` [PATCH 02/21] drm/amd/display: Check for DP2.0 when checking ODM combine Solomon Chiu
2022-07-08 16:35 ` [PATCH 03/21] drm/amd/display: Helper function for ALPM initialization Solomon Chiu
2022-07-08 16:35 ` [PATCH 04/21] drm/amd/display: Removing assert statements for Linux Solomon Chiu
2022-07-08 16:35 ` [PATCH 05/21] drm/amd/display: Fix windowed MPO video with ODM combine for DCN32 Solomon Chiu
2022-07-08 16:35 ` [PATCH 06/21] drm/amd/display: Clear edid when unplug mst connector Solomon Chiu
2022-07-08 16:35 ` [PATCH 07/21] drm/amd/display: Disable PSRSU when DSC enabled on the specific sink Solomon Chiu
2022-07-08 16:35 ` [PATCH 08/21] drm/amd/display: Fix black screen when disabling Freesync in OSD Solomon Chiu
2022-07-08 16:35 ` [PATCH 09/21] drm/amd/display: make enable link independent from verified link caps Solomon Chiu
2022-07-08 16:35 ` [PATCH 10/21] drm/amd/display: Reduce SCDC Status Flags Definition Solomon Chiu
2022-07-08 16:35 ` [PATCH 11/21] drm/amd/display: update DML1 logic for unbounded req handling Solomon Chiu
2022-07-08 16:35 ` [PATCH 12/21] drm/amd/display: 3.2.193 Solomon Chiu
2022-07-11 15:38 ` [PATCH 00/21] DC Patches July 11, 2022 Wheeler, Daniel
2022-07-12 15:37 ` Solomon Chiu [this message]
2022-07-12 15:38 ` [PATCH 14/21] drm/amd/display: Grab dc_lock before detecting link Solomon Chiu
2022-07-12 15:39 ` [PATCH 15/21] drm/amd/display: add system info table log Solomon Chiu
2022-07-12 15:40 ` [PATCH 16/21] drm/amd/display: Add DCN reg offsets to DC Solomon Chiu
2022-07-12 15:40 ` [PATCH 17/21] drm/amd/display: Add NBIO " Solomon Chiu
2022-07-12 15:41 ` [PATCH 18/21] drm/amd/display: Fix lag when moving windowed MPO across display using ODM 2:1 combine Solomon Chiu
2022-07-12 15:41 ` [PATCH 19/21] drm/amd/display: Fix wrong reference Solomon Chiu
2022-07-12 15:42 ` [PATCH 20/21] drm/amd/display: 3.2.194 Solomon Chiu
2022-07-12 15:42 ` [PATCH 21/21] drm/amd/display: Ignore First MST Sideband Message Return Error Solomon Chiu
2022-07-12 15:47 ` [21/21] " Limonciello, Mario
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