From: Solomon Chiu <solomon.chiu@amd.com>
To: <amd-gfx@lists.freedesktop.org>
Cc: stylon.wang@amd.com,
Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>,
Sunpeng.Li@amd.com, Harry.Wentland@amd.com,
qingqing.zhuo@amd.com, Rodrigo.Siqueira@amd.com,
roman.li@amd.com, Samson Tam <Samson.Tam@amd.com>,
solomon.chiu@amd.com, Daniel Wheeler <daniel.wheeler@amd.com>,
Aurabindo.Pillai@amd.com,
Ariel Bernstein <Eric.Bernstein@amd.com>,
wayne.lin@amd.com, Bhawanpreet.Lakha@amd.com,
agustin.gutierrez@amd.com, pavle.kotarac@amd.com
Subject: [PATCH 18/21] drm/amd/display: Fix lag when moving windowed MPO across display using ODM 2:1 combine
Date: Tue, 12 Jul 2022 23:41:11 +0800 [thread overview]
Message-ID: <20220712154111.501566-1-solomon.chiu@amd.com> (raw)
In-Reply-To: <20220708163529.3534276-1-solomon.chiu@amd.com>
From: Samson Tam <Samson.Tam@amd.com>
[Why]
With single display odm 2:1 policy, when moving windowed MPO across
the display, we experience a momentary lag when we move between the
centre of the display and the right half of the display. This is
caused by the MPO pipe being reallocated when it crosses this
boundary
[How]
Handle two cases:
1. if the head pipe has a MPO pipe already allocated in the old
context, then use that pipe if it is available in the current
context
2. if the head pipe is on the left side, check the right side to
see if it has a MPO pipe already allocated. If so, don't use
that pipe if it is selected as the idle pipe in the current
context
Add new function pointer called .acquire_idle_pipe_for_head_pipe
that will pass in the head pipe and handle case 1
Add find_idle_secondary_pipe_check_mpo() to handle case 2
if we don't hit case 1.
In dc_add_plane_to_context(), start with head pipe and check
case 1 and 2 in call acquire_free_pipe_for_head().
If we are on the right side of the display, check case 1
again by passing in right side pipe as the new head in
call acquire_free_pipe_for_head().
Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Ariel Bernstein <Eric.Bernstein@amd.com>
Acked-by: Solomon Chiu <solomon.chiu@amd.com>
Signed-off-by: Samson Tam <Samson.Tam@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
---
.../gpu/drm/amd/display/dc/core/dc_resource.c | 32 +++++++++++++++++--
.../gpu/drm/amd/display/dc/inc/core_types.h | 27 ++++++++++++++++
2 files changed, 57 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c b/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
index 9db50ed5460b..2a701c583332 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
@@ -1397,8 +1397,12 @@ static struct pipe_ctx *acquire_free_pipe_for_head(
* to acquire an idle one to satisfy the request
*/
- if (!pool->funcs->acquire_idle_pipe_for_layer)
- return NULL;
+ if (!pool->funcs->acquire_idle_pipe_for_layer) {
+ if (!pool->funcs->acquire_idle_pipe_for_head_pipe_in_layer)
+ return NULL;
+ else
+ return pool->funcs->acquire_idle_pipe_for_head_pipe_in_layer(context, pool, head_pipe->stream, head_pipe);
+ }
return pool->funcs->acquire_idle_pipe_for_layer(context, pool, head_pipe->stream);
}
@@ -1448,6 +1452,8 @@ bool dc_add_plane_to_context(
struct resource_pool *pool = dc->res_pool;
struct pipe_ctx *head_pipe, *tail_pipe, *free_pipe;
struct dc_stream_status *stream_status = NULL;
+ struct pipe_ctx *prev_right_head = NULL;
+ struct pipe_ctx *free_right_pipe = NULL;
DC_LOGGER_INIT(stream->ctx->logger);
for (i = 0; i < context->stream_count; i++)
@@ -1507,6 +1513,28 @@ bool dc_add_plane_to_context(
free_pipe->pipe_idx,
tail_pipe->next_odm_pipe ? tail_pipe->next_odm_pipe->pipe_idx : -1);
+ /*
+ * We want to avoid the case where the right side already has a pipe assigned to
+ * it and is different from free_pipe ( which would cause trigger a pipe
+ * reallocation ).
+ * Check the old context to see if the right side already has a pipe allocated
+ * - If not, continue to use free_pipe
+ * - If the right side already has a pipe, use that pipe instead if its available
+ */
+ prev_right_head = &dc->current_state->res_ctx.pipe_ctx[tail_pipe->next_odm_pipe->pipe_idx];
+ if ((prev_right_head->bottom_pipe) && (free_pipe->pipe_idx != prev_right_head->bottom_pipe->pipe_idx)) {
+ free_right_pipe = acquire_free_pipe_for_head(context, pool, tail_pipe->next_odm_pipe);
+ if (free_right_pipe) {
+ free_pipe->stream = NULL;
+ memset(&free_pipe->stream_res, 0, sizeof(struct stream_resource));
+ memset(&free_pipe->plane_res, 0, sizeof(struct plane_resource));
+ free_pipe->plane_state = NULL;
+ free_pipe->pipe_idx = 0;
+ free_right_pipe->plane_state = plane_state;
+ free_pipe = free_right_pipe;
+ }
+ }
+
free_pipe->stream_res.tg = tail_pipe->next_odm_pipe->stream_res.tg;
free_pipe->stream_res.abm = tail_pipe->next_odm_pipe->stream_res.abm;
free_pipe->stream_res.opp = tail_pipe->next_odm_pipe->stream_res.opp;
diff --git a/drivers/gpu/drm/amd/display/dc/inc/core_types.h b/drivers/gpu/drm/amd/display/dc/inc/core_types.h
index 2e158b1f5980..e4b4102b1538 100644
--- a/drivers/gpu/drm/amd/display/dc/inc/core_types.h
+++ b/drivers/gpu/drm/amd/display/dc/inc/core_types.h
@@ -143,11 +143,38 @@ struct resource_funcs {
struct dc *dc,
struct dc_state *context);
+ /*
+ * Acquires a free pipe for the head pipe.
+ * The head pipe is first pipe in the current context that matches the stream
+ * and does not have a top pipe or prev_odm_pipe.
+ */
struct pipe_ctx *(*acquire_idle_pipe_for_layer)(
struct dc_state *context,
const struct resource_pool *pool,
struct dc_stream_state *stream);
+ /*
+ * Acquires a free pipe for the head pipe with some additional checks for odm.
+ * The head pipe is passed in as an argument unlike acquire_idle_pipe_for_layer
+ * where it is read from the context. So this allows us look for different
+ * idle_pipe if the head_pipes are different ( ex. in odm 2:1 when we have
+ * a left and right pipe ).
+ *
+ * It also checks the old context to see if:
+ *
+ * 1. a pipe has already been allocated for the head pipe. If so, it will
+ * try to select that pipe as the idle pipe if it is available in the current
+ * context.
+ * 2. if the head_pipe is on the left, it will check if the right pipe has
+ * a pipe already allocated. If so, it will not use that pipe if it is
+ * selected as the idle pipe.
+ */
+ struct pipe_ctx *(*acquire_idle_pipe_for_head_pipe_in_layer)(
+ struct dc_state *context,
+ const struct resource_pool *pool,
+ struct dc_stream_state *stream,
+ struct pipe_ctx *head_pipe);
+
enum dc_status (*validate_plane)(const struct dc_plane_state *plane_state, struct dc_caps *caps);
enum dc_status (*add_stream_to_ctx)(
--
2.25.1
next prev parent reply other threads:[~2022-07-12 15:41 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-07-08 16:35 [PATCH 00/21] DC Patches July 11, 2022 Solomon Chiu
2022-07-08 16:35 ` [PATCH 01/21] drm/amd/display: Exit SubVP if MPO in use Solomon Chiu
2022-07-08 16:35 ` [PATCH 02/21] drm/amd/display: Check for DP2.0 when checking ODM combine Solomon Chiu
2022-07-08 16:35 ` [PATCH 03/21] drm/amd/display: Helper function for ALPM initialization Solomon Chiu
2022-07-08 16:35 ` [PATCH 04/21] drm/amd/display: Removing assert statements for Linux Solomon Chiu
2022-07-08 16:35 ` [PATCH 05/21] drm/amd/display: Fix windowed MPO video with ODM combine for DCN32 Solomon Chiu
2022-07-08 16:35 ` [PATCH 06/21] drm/amd/display: Clear edid when unplug mst connector Solomon Chiu
2022-07-08 16:35 ` [PATCH 07/21] drm/amd/display: Disable PSRSU when DSC enabled on the specific sink Solomon Chiu
2022-07-08 16:35 ` [PATCH 08/21] drm/amd/display: Fix black screen when disabling Freesync in OSD Solomon Chiu
2022-07-08 16:35 ` [PATCH 09/21] drm/amd/display: make enable link independent from verified link caps Solomon Chiu
2022-07-08 16:35 ` [PATCH 10/21] drm/amd/display: Reduce SCDC Status Flags Definition Solomon Chiu
2022-07-08 16:35 ` [PATCH 11/21] drm/amd/display: update DML1 logic for unbounded req handling Solomon Chiu
2022-07-08 16:35 ` [PATCH 12/21] drm/amd/display: 3.2.193 Solomon Chiu
2022-07-11 15:38 ` [PATCH 00/21] DC Patches July 11, 2022 Wheeler, Daniel
2022-07-12 15:37 ` [PATCH 13/21] drm/amd/display: Re-implementing ARGB16161616 pixel format as 22 Solomon Chiu
2022-07-12 15:38 ` [PATCH 14/21] drm/amd/display: Grab dc_lock before detecting link Solomon Chiu
2022-07-12 15:39 ` [PATCH 15/21] drm/amd/display: add system info table log Solomon Chiu
2022-07-12 15:40 ` [PATCH 16/21] drm/amd/display: Add DCN reg offsets to DC Solomon Chiu
2022-07-12 15:40 ` [PATCH 17/21] drm/amd/display: Add NBIO " Solomon Chiu
2022-07-12 15:41 ` Solomon Chiu [this message]
2022-07-12 15:41 ` [PATCH 19/21] drm/amd/display: Fix wrong reference Solomon Chiu
2022-07-12 15:42 ` [PATCH 20/21] drm/amd/display: 3.2.194 Solomon Chiu
2022-07-12 15:42 ` [PATCH 21/21] drm/amd/display: Ignore First MST Sideband Message Return Error Solomon Chiu
2022-07-12 15:47 ` [21/21] " Limonciello, Mario
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