* [PATCH 1/5] drm/amd/pm: Fix si_dpm mmCG_THERMAL_INT setting
2026-01-19 20:36 [PATCH 0/5] Various SI power management fixes Timur Kristóf
@ 2026-01-19 20:36 ` Timur Kristóf
2026-01-19 20:36 ` [PATCH 2/5] drm/amd/pm: Don't clear SI SMC table when setting power limit Timur Kristóf
` (3 subsequent siblings)
4 siblings, 0 replies; 7+ messages in thread
From: Timur Kristóf @ 2026-01-19 20:36 UTC (permalink / raw)
To: amd-gfx, Alexander.Deucher, Christian.Koenig, Mario Limonciello,
Ivan Lipski, Alex Hung, Prike Liang
Cc: Timur Kristóf
Use WREG32 to write mmCG_THERMAL_INT.
This is a direct access register.
Fixes: 841686df9f7d ("drm/amdgpu: add SI DPM support (v4)")
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
---
drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c b/drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c
index 9bdcd4e2aeb2..f7c2b1d206b6 100644
--- a/drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c
+++ b/drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c
@@ -7600,12 +7600,12 @@ static int si_dpm_set_interrupt_state(struct amdgpu_device *adev,
case AMDGPU_IRQ_STATE_DISABLE:
cg_thermal_int = RREG32_SMC(mmCG_THERMAL_INT);
cg_thermal_int |= CG_THERMAL_INT__THERM_INT_MASK_HIGH_MASK;
- WREG32_SMC(mmCG_THERMAL_INT, cg_thermal_int);
+ WREG32(mmCG_THERMAL_INT, cg_thermal_int);
break;
case AMDGPU_IRQ_STATE_ENABLE:
cg_thermal_int = RREG32_SMC(mmCG_THERMAL_INT);
cg_thermal_int &= ~CG_THERMAL_INT__THERM_INT_MASK_HIGH_MASK;
- WREG32_SMC(mmCG_THERMAL_INT, cg_thermal_int);
+ WREG32(mmCG_THERMAL_INT, cg_thermal_int);
break;
default:
break;
@@ -7617,12 +7617,12 @@ static int si_dpm_set_interrupt_state(struct amdgpu_device *adev,
case AMDGPU_IRQ_STATE_DISABLE:
cg_thermal_int = RREG32_SMC(mmCG_THERMAL_INT);
cg_thermal_int |= CG_THERMAL_INT__THERM_INT_MASK_LOW_MASK;
- WREG32_SMC(mmCG_THERMAL_INT, cg_thermal_int);
+ WREG32(mmCG_THERMAL_INT, cg_thermal_int);
break;
case AMDGPU_IRQ_STATE_ENABLE:
cg_thermal_int = RREG32_SMC(mmCG_THERMAL_INT);
cg_thermal_int &= ~CG_THERMAL_INT__THERM_INT_MASK_LOW_MASK;
- WREG32_SMC(mmCG_THERMAL_INT, cg_thermal_int);
+ WREG32(mmCG_THERMAL_INT, cg_thermal_int);
break;
default:
break;
--
2.52.0
^ permalink raw reply related [flat|nested] 7+ messages in thread* [PATCH 2/5] drm/amd/pm: Don't clear SI SMC table when setting power limit
2026-01-19 20:36 [PATCH 0/5] Various SI power management fixes Timur Kristóf
2026-01-19 20:36 ` [PATCH 1/5] drm/amd/pm: Fix si_dpm mmCG_THERMAL_INT setting Timur Kristóf
@ 2026-01-19 20:36 ` Timur Kristóf
2026-01-19 20:36 ` [PATCH 3/5] drm/amd/pm: Workaround SI powertune issue on Radeon 430 (v2) Timur Kristóf
` (2 subsequent siblings)
4 siblings, 0 replies; 7+ messages in thread
From: Timur Kristóf @ 2026-01-19 20:36 UTC (permalink / raw)
To: amd-gfx, Alexander.Deucher, Christian.Koenig, Mario Limonciello,
Ivan Lipski, Alex Hung, Prike Liang
Cc: Timur Kristóf
There is no reason to clear the SMC table.
We also don't need to recalculate the power limit then.
Fixes: 841686df9f7d ("drm/amdgpu: add SI DPM support (v4)")
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
---
drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c | 10 ----------
1 file changed, 10 deletions(-)
diff --git a/drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c b/drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c
index f7c2b1d206b6..87bab6c8564d 100644
--- a/drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c
+++ b/drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c
@@ -2273,8 +2273,6 @@ static int si_populate_smc_tdp_limits(struct amdgpu_device *adev,
if (scaling_factor == 0)
return -EINVAL;
- memset(smc_table, 0, sizeof(SISLANDS_SMC_STATETABLE));
-
ret = si_calculate_adjusted_tdp_limits(adev,
false, /* ??? */
adev->pm.dpm.tdp_adjustment,
@@ -2328,16 +2326,8 @@ static int si_populate_smc_tdp_limits_2(struct amdgpu_device *adev,
if (ni_pi->enable_power_containment) {
SISLANDS_SMC_STATETABLE *smc_table = &si_pi->smc_statetable;
- u32 scaling_factor = si_get_smc_power_scaling_factor(adev);
int ret;
- memset(smc_table, 0, sizeof(SISLANDS_SMC_STATETABLE));
-
- smc_table->dpm2Params.NearTDPLimit =
- cpu_to_be32(si_scale_power_for_smc(adev->pm.dpm.near_tdp_limit_adjusted, scaling_factor) * 1000);
- smc_table->dpm2Params.SafePowerLimit =
- cpu_to_be32(si_scale_power_for_smc((adev->pm.dpm.near_tdp_limit_adjusted * SISLANDS_DPM2_TDP_SAFE_LIMIT_PERCENT) / 100, scaling_factor) * 1000);
-
ret = amdgpu_si_copy_bytes_to_smc(adev,
(si_pi->state_table_start +
offsetof(SISLANDS_SMC_STATETABLE, dpm2Params) +
--
2.52.0
^ permalink raw reply related [flat|nested] 7+ messages in thread* [PATCH 3/5] drm/amd/pm: Workaround SI powertune issue on Radeon 430 (v2)
2026-01-19 20:36 [PATCH 0/5] Various SI power management fixes Timur Kristóf
2026-01-19 20:36 ` [PATCH 1/5] drm/amd/pm: Fix si_dpm mmCG_THERMAL_INT setting Timur Kristóf
2026-01-19 20:36 ` [PATCH 2/5] drm/amd/pm: Don't clear SI SMC table when setting power limit Timur Kristóf
@ 2026-01-19 20:36 ` Timur Kristóf
2026-01-19 20:36 ` [PATCH 4/5] drm/amd/pm: Return -EOPNOTSUPP when can't read power limit Timur Kristóf
2026-01-19 20:36 ` [PATCH 5/5] drm/amd/pm: Correct comment above power2_cap attributes Timur Kristóf
4 siblings, 0 replies; 7+ messages in thread
From: Timur Kristóf @ 2026-01-19 20:36 UTC (permalink / raw)
To: amd-gfx, Alexander.Deucher, Christian.Koenig, Mario Limonciello,
Ivan Lipski, Alex Hung, Prike Liang
Cc: Timur Kristóf
Radeon 430 and 520 are OEM GPUs from 2016~2017
They have the same device id: 0x6611 and revision: 0x87
On the Radeon 430, powertune is buggy and throttles the GPU,
never allowing it to reach its maximum SCLK. Work around this
bug by raising the TDP limits we program to the SMC from
24W (specified by the VBIOS on Radeon 430) to 32W.
Disabling powertune entirely is not a viable workaround,
because it causes the Radeon 520 to heat up above 100 C,
which I prefer to avoid.
Additionally, revise the maximum SCLK limit. Considering the
above issue, these GPUs never reached a high SCLK on Linux,
and the workarounds were added before the GPUs were released,
so the workaround likely didn't target these specifically.
Use 780 MHz (the maximum SCLK according to the VBIOS on the
Radeon 430). Note that the Radeon 520 VBIOS has a higher
maximum SCLK: 905 MHz, but in practice it doesn't seem to
perform better with the higher clock, only heats up more.
v2:
Move the workaround to si_populate_smc_tdp_limits.
Fixes: 841686df9f7d ("drm/amdgpu: add SI DPM support (v4)")
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
---
drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c | 13 ++++++++++++-
1 file changed, 12 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c b/drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c
index 87bab6c8564d..0f8f69481f5b 100644
--- a/drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c
+++ b/drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c
@@ -2281,6 +2281,12 @@ static int si_populate_smc_tdp_limits(struct amdgpu_device *adev,
if (ret)
return ret;
+ if (adev->pdev->device == 0x6611 && adev->pdev->revision == 0x87) {
+ /* Workaround buggy powertune on Radeon 430 and 520. */
+ tdp_limit = 32;
+ near_tdp_limit = 28;
+ }
+
smc_table->dpm2Params.TDPLimit =
cpu_to_be32(si_scale_power_for_smc(tdp_limit, scaling_factor) * 1000);
smc_table->dpm2Params.NearTDPLimit =
@@ -3463,10 +3469,15 @@ static void si_apply_state_adjust_rules(struct amdgpu_device *adev,
(adev->pdev->revision == 0x80) ||
(adev->pdev->revision == 0x81) ||
(adev->pdev->revision == 0x83) ||
- (adev->pdev->revision == 0x87) ||
+ (adev->pdev->revision == 0x87 &&
+ adev->pdev->device != 0x6611) ||
(adev->pdev->device == 0x6604) ||
(adev->pdev->device == 0x6605)) {
max_sclk = 75000;
+ } else if (adev->pdev->revision == 0x87 &&
+ adev->pdev->device == 0x6611) {
+ /* Radeon 430 and 520 */
+ max_sclk = 78000;
}
}
--
2.52.0
^ permalink raw reply related [flat|nested] 7+ messages in thread* [PATCH 4/5] drm/amd/pm: Return -EOPNOTSUPP when can't read power limit
2026-01-19 20:36 [PATCH 0/5] Various SI power management fixes Timur Kristóf
` (2 preceding siblings ...)
2026-01-19 20:36 ` [PATCH 3/5] drm/amd/pm: Workaround SI powertune issue on Radeon 430 (v2) Timur Kristóf
@ 2026-01-19 20:36 ` Timur Kristóf
2026-01-19 20:36 ` [PATCH 5/5] drm/amd/pm: Correct comment above power2_cap attributes Timur Kristóf
4 siblings, 0 replies; 7+ messages in thread
From: Timur Kristóf @ 2026-01-19 20:36 UTC (permalink / raw)
To: amd-gfx, Alexander.Deucher, Christian.Koenig, Mario Limonciello,
Ivan Lipski, Alex Hung, Prike Liang
Cc: Timur Kristóf
So that hwmon_attributes_visible() will see that the power2_cap
attributes should not be visible on GPUs that don't support
the get_power_limit() function.
This fixes an error when running the "sensors" command on SI.
Fixes: f9005c8896f8 ("drm/amd/pm: Expose ppt1 limit for gc_v9_5_0")
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
---
drivers/gpu/drm/amd/pm/amdgpu_dpm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/pm/amdgpu_dpm.c b/drivers/gpu/drm/amd/pm/amdgpu_dpm.c
index b27e4c2e550f..4214f7314963 100644
--- a/drivers/gpu/drm/amd/pm/amdgpu_dpm.c
+++ b/drivers/gpu/drm/amd/pm/amdgpu_dpm.c
@@ -1569,7 +1569,7 @@ int amdgpu_dpm_get_power_limit(struct amdgpu_device *adev,
int ret = 0;
if (!pp_funcs->get_power_limit)
- return -ENODATA;
+ return -EOPNOTSUPP;
mutex_lock(&adev->pm.mutex);
ret = pp_funcs->get_power_limit(adev->powerplay.pp_handle,
--
2.52.0
^ permalink raw reply related [flat|nested] 7+ messages in thread* [PATCH 5/5] drm/amd/pm: Correct comment above power2_cap attributes
2026-01-19 20:36 [PATCH 0/5] Various SI power management fixes Timur Kristóf
` (3 preceding siblings ...)
2026-01-19 20:36 ` [PATCH 4/5] drm/amd/pm: Return -EOPNOTSUPP when can't read power limit Timur Kristóf
@ 2026-01-19 20:36 ` Timur Kristóf
2026-01-20 20:32 ` Alex Deucher
4 siblings, 1 reply; 7+ messages in thread
From: Timur Kristóf @ 2026-01-19 20:36 UTC (permalink / raw)
To: amd-gfx, Alexander.Deucher, Christian.Koenig, Mario Limonciello,
Ivan Lipski, Alex Hung, Prike Liang
Cc: Timur Kristóf
Previously only Van Gogh supported this, but that is not true
anymore since:
commit f9005c8896f8 ("drm/amd/pm: Expose ppt1 limit for gc_v9_5_0")
Update the comment to reflect that.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
---
drivers/gpu/drm/amd/pm/amdgpu_pm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/pm/amdgpu_pm.c b/drivers/gpu/drm/amd/pm/amdgpu_pm.c
index 4c152df3fdfa..1ea0f073706d 100644
--- a/drivers/gpu/drm/amd/pm/amdgpu_pm.c
+++ b/drivers/gpu/drm/amd/pm/amdgpu_pm.c
@@ -3879,7 +3879,7 @@ static umode_t hwmon_attributes_visible(struct kobject *kobj,
attr == &sensor_dev_attr_temp3_emergency.dev_attr.attr))
return 0;
- /* only Vangogh has fast PPT limit and power labels */
+ /* only a few GPUs have fast PPT limit and power labels */
if ((attr == &sensor_dev_attr_power2_cap_max.dev_attr.attr ||
attr == &sensor_dev_attr_power2_cap_min.dev_attr.attr ||
attr == &sensor_dev_attr_power2_cap.dev_attr.attr ||
--
2.52.0
^ permalink raw reply related [flat|nested] 7+ messages in thread* Re: [PATCH 5/5] drm/amd/pm: Correct comment above power2_cap attributes
2026-01-19 20:36 ` [PATCH 5/5] drm/amd/pm: Correct comment above power2_cap attributes Timur Kristóf
@ 2026-01-20 20:32 ` Alex Deucher
0 siblings, 0 replies; 7+ messages in thread
From: Alex Deucher @ 2026-01-20 20:32 UTC (permalink / raw)
To: Timur Kristóf
Cc: amd-gfx, Alexander.Deucher, Christian.Koenig, Mario Limonciello,
Ivan Lipski, Alex Hung, Prike Liang
Series is:
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
I'll pull them in today.
Thanks!
On Mon, Jan 19, 2026 at 3:36 PM Timur Kristóf <timur.kristof@gmail.com> wrote:
>
> Previously only Van Gogh supported this, but that is not true
> anymore since:
> commit f9005c8896f8 ("drm/amd/pm: Expose ppt1 limit for gc_v9_5_0")
>
> Update the comment to reflect that.
>
> Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
> ---
> drivers/gpu/drm/amd/pm/amdgpu_pm.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/amd/pm/amdgpu_pm.c b/drivers/gpu/drm/amd/pm/amdgpu_pm.c
> index 4c152df3fdfa..1ea0f073706d 100644
> --- a/drivers/gpu/drm/amd/pm/amdgpu_pm.c
> +++ b/drivers/gpu/drm/amd/pm/amdgpu_pm.c
> @@ -3879,7 +3879,7 @@ static umode_t hwmon_attributes_visible(struct kobject *kobj,
> attr == &sensor_dev_attr_temp3_emergency.dev_attr.attr))
> return 0;
>
> - /* only Vangogh has fast PPT limit and power labels */
> + /* only a few GPUs have fast PPT limit and power labels */
> if ((attr == &sensor_dev_attr_power2_cap_max.dev_attr.attr ||
> attr == &sensor_dev_attr_power2_cap_min.dev_attr.attr ||
> attr == &sensor_dev_attr_power2_cap.dev_attr.attr ||
> --
> 2.52.0
>
^ permalink raw reply [flat|nested] 7+ messages in thread