[RFC PATCH 0/5] add compute performance count control

[RFC PATCH 0/5] add compute performance count control

[James Zhu]

in user mode queue properties. New user moded queue command
AMDGPU_USERQ_OP_MODIFY supports update queue properties at runtime.

James Zhu (5):
  drm/amdgpu: add MQD update on cu_flags
  drm/amdgpu/gfx10: add compute performance count control
  drm/amdgpu/gfx11: add compute performance count control
  drm/amdgpu/gfx12: add compute performance count control
  drm/amdgpu/gfx12.1: add compute performance count control

 drivers/gpu/drm/amd/amdgpu/amdgpu.h        | 2 ++
 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c     | 3 +++
 drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c     | 3 +++
 drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c     | 3 +++
 drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c     | 3 +++
 drivers/gpu/drm/amd/amdgpu/mes_userqueue.c | 2 ++
 6 files changed, 16 insertions(+)

-- 
2.34.1

[RFC PATCH 1/5] drm/amdgpu: add MQD update on cu_flags

[James Zhu]

pass queue properties flags at runtime, add new
MQD update flag to control performance count enable.

Signed-off-by: James Zhu <James.Zhu@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu.h        | 2 ++
 drivers/gpu/drm/amd/amdgpu/mes_userqueue.c | 2 ++
 2 files changed, 4 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index 116e509e7bed..4e9513cbe7f6 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -796,6 +796,8 @@ enum amdgpu_mqd_update_flag {
        AMDGPU_UPDATE_FLAG_DBG_WA_ENABLE = 1,
        AMDGPU_UPDATE_FLAG_DBG_WA_DISABLE = 2,
        AMDGPU_UPDATE_FLAG_IS_GWS = 4, /* quirk for gfx9 IP */
+       AMDGPU_UPDATE_FLAG_PERFCOUNT_ENABLE = 5,
+       AMDGPU_UPDATE_FLAG_PERFCOUNT_DISABLE = 6,
 };
 
 struct amdgpu_mqd_prop {
diff --git a/drivers/gpu/drm/amd/amdgpu/mes_userqueue.c b/drivers/gpu/drm/amd/amdgpu/mes_userqueue.c
index 412c00ecd97f..173fd09b5650 100644
--- a/drivers/gpu/drm/amd/amdgpu/mes_userqueue.c
+++ b/drivers/gpu/drm/amd/amdgpu/mes_userqueue.c
@@ -389,6 +389,7 @@ static int amdgpu_userq_set_compute_mqd(struct amdgpu_usermode_queue *queue,
 		props->cu_mask = cu_mask;
 		props->cu_mask_count = count;
 		props->is_user_cu_masked = (cu_mask != NULL);
+
 	}
 
 	/* Parse HQD priority and other compute properties */
@@ -623,6 +624,7 @@ static int mes_userq_mqd_update(struct amdgpu_usermode_queue *queue, struct drm_
 
 	userq_props->queue_size = args_in->queue_size;
 	userq_props->hqd_base_gpu_addr = args_in->queue_va;
+	userq_props->cu_flags = args_in->flags;
 
 	retval = mqd_hw_default->init_mqd(adev, (void *)queue->mqd.cpu_ptr, userq_props);
 
-- 
2.34.1

[RFC PATCH 2/5] drm/amdgpu/gfx10: add compute performance count control

[James Zhu]

through amdgpu IOCTL AMDGPU_USERQ/AMDGPU_USERQ_OP_MODIFY.

Signed-off-by: James Zhu <James.Zhu@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
index 1893ceeeb26c..d44dafe1f4ce 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
@@ -7017,6 +7017,9 @@ static int gfx_v10_0_compute_mqd_init(struct amdgpu_device *adev, void *m,
 
 	mqd->cp_hqd_active = prop->hqd_active;
 
+	mqd->compute_perfcount_enable =
+		(prop->cu_flags == AMDGPU_UPDATE_FLAG_PERFCOUNT_ENABLE) ? 1 : 0;
+
 	return 0;
 }
 
-- 
2.34.1

[RFC PATCH 3/5] drm/amdgpu/gfx11: add compute performance count control

[James Zhu]

through amdgpu IOCTL AMDGPU_USERQ/AMDGPU_USERQ_OP_MODIFY.

Signed-off-by: James Zhu <James.Zhu@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
index b1a1b8a10a08..231404bb6799 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
@@ -4406,6 +4406,9 @@ static int gfx_v11_0_compute_mqd_init(struct amdgpu_device *adev, void *m,
 	/* set CU mask */
 	gfx_v11_0_compute_mqd_set_cu_mask(adev, mqd, prop);
 
+	mqd->compute_perfcount_enable =
+		(prop->cu_flags == AMDGPU_UPDATE_FLAG_PERFCOUNT_ENABLE) ? 1 : 0;
+
 	return 0;
 }
 
-- 
2.34.1

[RFC PATCH 4/5] drm/amdgpu/gfx12: add compute performance count control

[James Zhu]

through amdgpu IOCTL AMDGPU_USERQ/AMDGPU_USERQ_OP_MODIFY.

Signed-off-by: James Zhu <James.Zhu@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c
index b9c43738bd86..410fbeea4111 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c
@@ -3293,6 +3293,9 @@ static int gfx_v12_0_compute_mqd_init(struct amdgpu_device *adev, void *m,
 		mqd->cp_hqd_wg_state_offset = prop->ctl_stack_size;
 	}
 
+	mqd->compute_perfcount_enable =
+		(prop->cu_flags == AMDGPU_UPDATE_FLAG_PERFCOUNT_ENABLE) ? 1 : 0;
+
 	return 0;
 }
 
-- 
2.34.1

[RFC PATCH 5/5] drm/amdgpu/gfx12.1: add compute performance count control

[James Zhu]

through amdgpu IOCTL AMDGPU_USERQ/AMDGPU_USERQ_OP_MODIFY.

Signed-off-by: James Zhu <James.Zhu@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c b/drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c
index eb9725ae1607..faedaa3aa5f9 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c
@@ -2240,6 +2240,9 @@ static int gfx_v12_1_compute_mqd_init(struct amdgpu_device *adev, void *m,
 
 	mqd->cp_hqd_active = prop->hqd_active;
 
+	mqd->compute_perfcount_enable =
+		(prop->cu_flags == AMDGPU_UPDATE_FLAG_PERFCOUNT_ENABLE) ? 1 : 0;
+
 	return 0;
 }
 
-- 
2.34.1

Re: [RFC PATCH 0/5] add compute performance count control

[James Zhu]

Ping ...

Thanks!

James Zhu
On 2026-03-04 17:28, James Zhu wrote:
> in user mode queue properties. New user moded queue command
> AMDGPU_USERQ_OP_MODIFY supports update queue properties at runtime.
>
> James Zhu (5):
>    drm/amdgpu: add MQD update on cu_flags
>    drm/amdgpu/gfx10: add compute performance count control
>    drm/amdgpu/gfx11: add compute performance count control
>    drm/amdgpu/gfx12: add compute performance count control
>    drm/amdgpu/gfx12.1: add compute performance count control
>
>   drivers/gpu/drm/amd/amdgpu/amdgpu.h        | 2 ++
>   drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c     | 3 +++
>   drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c     | 3 +++
>   drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c     | 3 +++
>   drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c     | 3 +++
>   drivers/gpu/drm/amd/amdgpu/mes_userqueue.c | 2 ++
>   6 files changed, 16 insertions(+)
>