[PATCH v4 10/10] drm/amdgpu/userq_fence: NOTIFY MES on SDMA UMQ submit

[Jesse Zhang <Jesse.Zhang@amd.com>]

From: "Jesse.zhang" <Jesse.zhang@amd.com>

Pair the userspace aggregated-doorbell ring (added by the
AMDGPU_INFO_DOORBELL / AMDGPU_GEM_GLOBAL_AGGREGATED_DOORBELL ABI in
the previous patches) with a kernel-side
MES_MISC_OP_NOTIFY_WORK_ON_UNMAPPED_QUEUE in amdgpu_userq_signal_ioctl
for SDMA UMQs.

Signed-off-by: Jesse Zhang <Jesse.Zhang@amd.com>
---
 .../gpu/drm/amd/amdgpu/amdgpu_userq_fence.c   | 29 +++++++++++++++++++
 1 file changed, 29 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_userq_fence.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_userq_fence.c
index a58342c2ac44..50e275b51c9e 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_userq_fence.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_userq_fence.c
@@ -598,6 +598,35 @@ int amdgpu_userq_signal_ioctl(struct drm_device *dev, void *data,
 	/* drop the reference acquired in fence creation function */
 	dma_fence_put(fence);
 
+	/*
+	 * SDMA UMQ wake: SDMA has no CP_UNMAPPED_DOORBELL HW intercept, so
+	 * once MES gangs the queue out (after the first IB's PROTECTED_FENCE
+	 * idles the queue), per-queue doorbell rings hit a mapped-out HW
+	 * slot and are silently dropped — FENCE IRQ never fires.
+	 *
+	 * Userspace rings the priority's MES aggregated doorbell directly
+	 * via the agdb_bo mmap (see AMDGPU_INFO_DOORBELL +
+	 * AMDGPU_GEM_GLOBAL_AGGREGATED_DOORBELL).  That alone, however, is
+	 * not enough on current MES12 firmware — MES will not scan the
+	 * priority's queue list unless its hasReadyQueues flag is set.
+	 * NOTIFY_WORK_ON_UNMAPPED_QUEUE flips that flag, so MES then
+	 * processes the doorbell ring and re-MAP_QUEUEs the SDMA UMQ.
+	 *
+	 * This is a kernel-side companion to the userspace agg doorbell
+	 * ring; remove once firmware learns to wake on bare aggregated
+	 * doorbell.
+	 */
+	if (queue && queue->queue_type == AMDGPU_HW_IP_DMA &&
+	    adev->enable_mes && adev->mes.funcs->misc_op) {
+		struct mes_misc_op_input op = { 0 };
+
+		op.op = MES_MISC_OP_NOTIFY_WORK_ON_UNMAPPED_QUEUE;
+		op.notify_work.priority_level = AMDGPU_MES_PRIORITY_LEVEL_NORMAL;
+		amdgpu_mes_lock(&adev->mes);
+		(void)adev->mes.funcs->misc_op(&adev->mes, &op);
+		amdgpu_mes_unlock(&adev->mes);
+	}
+
 exec_fini:
 	drm_exec_fini(&exec);
 put_gobj_write:
-- 
2.49.0