[PATCH v4 09/10] drm/amdgpu/userq: report SDMA UMQ doorbell info via AMDGPU_INFO_DOORBELL

[Jesse Zhang <Jesse.Zhang@amd.com>]

From: "Jesse.zhang" <Jesse.zhang@amd.com>

Extend AMDGPU_INFO_DOORBELL with an AMDGPU_HW_IP_DMA case so userspace
can discover:

  - The SDMA UMQ doorbell BAR range (index_start..index_end), used to
    validate per-queue doorbell offsets.
  - Whether an aggregated doorbell slot exists in adev->agdb_bo
    (agdb_enable) and its dword offset within that BO (agdb_offset).

A user-mode driver opens the global aggregated-doorbell BO via
AMDGPU_GEM_OP_OPEN_GLOBAL with AMDGPU_GEM_GLOBAL_AGGREGATED_DOORBELL,
mmaps it, and writes the queue's 32-bit WPTR at the byte offset
agdb_offset * 4 to wake MES — bypassing amdgpu_userq_signal_ioctl
entirely.

This is the user-visible half of moving the SDMA UMQ wake path out of
the kernel.  The kernel-side wake is removed in a follow-up patch.

Signed-off-by: Jesse Zhang <Jesse.Zhang@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
index a3beeff800bf..1c6368d25b7d 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
@@ -1437,6 +1437,17 @@ int amdgpu_info_ioctl(struct drm_device *dev, void *data, struct drm_file *filp)
 			doorbell_info.index_start = adev->doorbell_index.vcn.vcn_ring0_1 << 1;
 			doorbell_info.index_end = (adev->doorbell_index.vcn.vcn_ring6_7 << 1) + 1;
 			break;
+		case AMDGPU_HW_IP_DMA:
+			if (adev->agdb_bo) {
+				doorbell_info.agdb_enable = 1;
+				doorbell_info.agdb_offset = adev->sdma.agdb_offset;
+			}
+			doorbell_info.index_start =
+				adev->doorbell_index.sdma_engine[0] << 1;
+			doorbell_info.index_end =
+				(adev->doorbell_index.sdma_engine[adev->sdma.num_instances - 1]
+				 << 1) + 1;
+			break;
 		default:
 			return -EINVAL;
 		}
-- 
2.49.0