[PATCH 1/3] drm/amd/ras: report threshold status after bad pages are saved

[PATCH 1/3] drm/amd/ras: report threshold status after bad pages are saved

[Xiang Liu]

The EEPROM table is tagged as over threshold while the new bad page
records are written out, so the table status queried while the records
are only queued still reports the table as writable. The device is
therefore never flagged as having reached the threshold and neither the
in-band CPER record nor the out-of-band RMA reason is emitted.

Re-evaluate the table status once the records have been appended, so the
report is driven by the state that was just persisted.

Signed-off-by: Xiang Liu <xiang.liu@amd.com>
---
 drivers/gpu/drm/amd/ras/core/ras_umc.c | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/drivers/gpu/drm/amd/ras/core/ras_umc.c b/drivers/gpu/drm/amd/ras/core/ras_umc.c
index b3f30da19a78..c2663f84a883 100644
--- a/drivers/gpu/drm/amd/ras/core/ras_umc.c
+++ b/drivers/gpu/drm/amd/ras/core/ras_umc.c
@@ -848,6 +848,13 @@ static int ras_umc_save_bad_pages(struct ras_core_context *ras_core)
 		RAS_DEV_INFO(ras_core->dev, "Saved %d pages to EEPROM table.\n",
 			ras_umc_count_valid_pages(ras_core,
 				&data->bps[eeprom_record_num], save_count));
+
+		/* The table is only tagged as over threshold while the new
+		 * records are written out, so the status has to be
+		 * re-evaluated here.
+		 */
+		ras_eeprom_mgr_check_and_report_status(ras_core, true);
+		ras_umc_report_badpage_info(ras_core);
 	}
 
 exit:
-- 
2.34.1

[PATCH 2/3] drm/amd/ras: report the bad page threshold in every work mode

[Xiang Liu]

Only the mode that halts runtime services flags the device once the bad
page threshold is reached, so on a default or warn-only threshold the
in-band CPER record and the out-of-band RMA reason are not emitted even
though the table records that the threshold was hit.

Track the threshold condition separately from the halt decision and use
it to drive the report, so every mode except the debug one tells the
host that the device reached its bad page budget.

Signed-off-by: Xiang Liu <xiang.liu@amd.com>
---
 drivers/gpu/drm/amd/ras/core/ras.h            | 1 +
 drivers/gpu/drm/amd/ras/core/ras_eeprom_mgr.c | 4 ++++
 drivers/gpu/drm/amd/ras/core/ras_umc.c        | 2 +-
 3 files changed, 6 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/ras/core/ras.h b/drivers/gpu/drm/amd/ras/core/ras.h
index fcea457d5cbe..8c6e8ab89c58 100644
--- a/drivers/gpu/drm/amd/ras/core/ras.h
+++ b/drivers/gpu/drm/amd/ras/core/ras.h
@@ -415,6 +415,7 @@ struct ras_core_context {
 	bool poison_supported;
 
 	bool is_rma;
+	bool bad_page_over_threshold;
 	bool is_initialized;
 	bool in_early_init;
 	bool early_init_service_enabled;
diff --git a/drivers/gpu/drm/amd/ras/core/ras_eeprom_mgr.c b/drivers/gpu/drm/amd/ras/core/ras_eeprom_mgr.c
index 1781d037ef13..2f33e3132f76 100644
--- a/drivers/gpu/drm/amd/ras/core/ras_eeprom_mgr.c
+++ b/drivers/gpu/drm/amd/ras/core/ras_eeprom_mgr.c
@@ -294,6 +294,9 @@ int ras_eeprom_mgr_check_and_report_status(struct ras_core_context *ras_core, bo
 				RAS_DEV_ERR(ras_core->dev, "RAS records:%d exceed threshold:%d",
 					valid_err_count, mgr->ras_err_threshold);
 
+			if (mgr->work_mode_over_thresh != RAS_WORK_MODE_OVER_THRESH_DEBUG)
+				ras_core->bad_page_over_threshold = true;
+
 			if (mgr->work_mode_over_thresh == RAS_WORK_MODE_OVER_THRESH_STRICT) {
 				RAS_DEV_WARN(ras_core->dev,
 				"Please consult AMD Service Action Guide (SAG) for appropriate service procedures\n");
@@ -315,6 +318,7 @@ int ras_eeprom_mgr_check_and_report_status(struct ras_core_context *ras_core, bo
 				RAS_DEV_ERR(ras_core->dev, "Failed to resize RAS table\n");
 			} else {
 				ras_core->is_rma = false;
+				ras_core->bad_page_over_threshold = false;
 				RAS_DEV_INFO(ras_core->dev,
 					"records:%d threshold:%d, resetting RAS table header signature",
 					valid_err_count, mgr->ras_err_threshold);
diff --git a/drivers/gpu/drm/amd/ras/core/ras_umc.c b/drivers/gpu/drm/amd/ras/core/ras_umc.c
index c2663f84a883..6af41c68d83b 100644
--- a/drivers/gpu/drm/amd/ras/core/ras_umc.c
+++ b/drivers/gpu/drm/amd/ras/core/ras_umc.c
@@ -701,7 +701,7 @@ void ras_umc_report_badpage_info(struct ras_core_context *ras_core)
 			&ras_umc->last_channel_bitmap);
 	}
 
-	if (ras_core->is_rma)
+	if (ras_core->is_rma || ras_core->bad_page_over_threshold)
 		ras_core_event_notify(ras_core, RAS_EVENT_ID__DEVICE_RMA, NULL);
 }
 
-- 
2.34.1

[PATCH 3/3] drm/amd/ras: init reserved vram size before RAS core sw init

[Xiang Liu]

The RAS core derives the bad page threshold from
con->reserved_pages_in_bytes when amdgpu_ras_mgr_sw_init() builds the
EEPROM configuration. That field is still zero at this point, so the
threshold falls back to the 16MB default and ends up at 128 pages on
ASICs that reserve 32MB.

Set the reserved vram size before RAS core sw init so the threshold is
computed from the per-ASIC value.

Signed-off-by: Xiang Liu <xiang.liu@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
index becad704113c..0d39b1872b4c 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
@@ -3628,6 +3628,9 @@ int amdgpu_ras_init(struct amdgpu_device *adev)
 
 	amdgpu_ras_check_supported(adev);
 
+	/* The RAS core derives the bad page threshold from this value. */
+	amdgpu_ras_init_reserved_vram_size(adev);
+
 	param.ras_feature_enable = amdgpu_ras_enable;
 	param.ras_feature_mask = amdgpu_ras_mask;
 	param.ras_bad_page_threshold = amdgpu_bad_page_threshold;
@@ -3725,8 +3728,6 @@ int amdgpu_ras_init(struct amdgpu_device *adev)
 	/* Get RAS schema for particular SOC */
 	con->schema = amdgpu_get_ras_schema(adev);
 
-	amdgpu_ras_init_reserved_vram_size(adev);
-
 	if (amdgpu_ras_fs_init(adev)) {
 		r = -EINVAL;
 		goto release_con;
-- 
2.34.1

RE: [PATCH 3/3] drm/amd/ras: init reserved vram size before RAS core sw init

[Zhou1, Tao]

AMD General

The series is: Reviewed-by: Tao Zhou <tao.zhou1@amd.com>

Better to let Thomas take a look at it.

> -----Original Message-----
> From: Liu, Xiang(Dean) <Xiang.Liu@amd.com>
> Sent: Tuesday, September 29, 2026 8:02 PM
> To: amd-gfx@lists.freedesktop.org
> Cc: Zhang, Hawking <Hawking.Zhang@amd.com>; Zhou1, Tao
> <Tao.Zhou1@amd.com>; Yang, Stanley <Stanley.Yang@amd.com>; Chai, Thomas
> <YiPeng.Chai@amd.com>; Liu, Xiang(Dean) <Xiang.Liu@amd.com>
> Subject: [PATCH 3/3] drm/amd/ras: init reserved vram size before RAS core sw init
>
> The RAS core derives the bad page threshold from
> con->reserved_pages_in_bytes when amdgpu_ras_mgr_sw_init() builds the
> EEPROM configuration. That field is still zero at this point, so the threshold falls back
> to the 16MB default and ends up at 128 pages on ASICs that reserve 32MB.
>
> Set the reserved vram size before RAS core sw init so the threshold is computed
> from the per-ASIC value.
>
> Signed-off-by: Xiang Liu <xiang.liu@amd.com>
> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 5 +++--
>  1 file changed, 3 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
> index becad704113c..0d39b1872b4c 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
> @@ -3628,6 +3628,9 @@ int amdgpu_ras_init(struct amdgpu_device *adev)
>
>       amdgpu_ras_check_supported(adev);
>
> +     /* The RAS core derives the bad page threshold from this value. */
> +     amdgpu_ras_init_reserved_vram_size(adev);
> +
>       param.ras_feature_enable = amdgpu_ras_enable;
>       param.ras_feature_mask = amdgpu_ras_mask;
>       param.ras_bad_page_threshold = amdgpu_bad_page_threshold; @@ -
> 3725,8 +3728,6 @@ int amdgpu_ras_init(struct amdgpu_device *adev)
>       /* Get RAS schema for particular SOC */
>       con->schema = amdgpu_get_ras_schema(adev);
>
> -     amdgpu_ras_init_reserved_vram_size(adev);
> -
>       if (amdgpu_ras_fs_init(adev)) {
>               r = -EINVAL;
>               goto release_con;
> --
> 2.34.1