* [PATCH 1/3] drm/amdgpu/gmc6-8: properly disable the AGP aperture
@ 2023-09-21 14:12 Alex Deucher
2023-09-21 14:12 ` [PATCH 2/3] drm/amdgpu/gmc: set a default disable value for AGP Alex Deucher
` (2 more replies)
0 siblings, 3 replies; 8+ messages in thread
From: Alex Deucher @ 2023-09-21 14:12 UTC (permalink / raw)
To: amd-gfx; +Cc: Alex Deucher, Yang Wang
The BOT register needs to be larger than the TOP register
for this to be properly disabled. The lower 22 bits
of the BOT address are always 0 and the lower 22 bits of
the TOP register are always 1 so you need to make
the upper bits of BOT larger than the upper bits of BOT.
Reviewed-by: Yang Wang <kevinyang.wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c | 2 +-
drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c | 2 +-
drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c | 2 +-
3 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c
index 5b837a65fad2..07579fa26fa3 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c
@@ -253,7 +253,7 @@ static void gmc_v6_0_mc_program(struct amdgpu_device *adev)
WREG32(mmMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR,
adev->mem_scratch.gpu_addr >> 12);
WREG32(mmMC_VM_AGP_BASE, 0);
- WREG32(mmMC_VM_AGP_TOP, 0x0FFFFFFF);
+ WREG32(mmMC_VM_AGP_TOP, 0);
WREG32(mmMC_VM_AGP_BOT, 0x0FFFFFFF);
if (gmc_v6_0_wait_for_idle((void *)adev))
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
index 6a6929ac2748..e77e5593e1ab 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
@@ -288,7 +288,7 @@ static void gmc_v7_0_mc_program(struct amdgpu_device *adev)
WREG32(mmMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR,
adev->mem_scratch.gpu_addr >> 12);
WREG32(mmMC_VM_AGP_BASE, 0);
- WREG32(mmMC_VM_AGP_TOP, 0x0FFFFFFF);
+ WREG32(mmMC_VM_AGP_TOP, 0);
WREG32(mmMC_VM_AGP_BOT, 0x0FFFFFFF);
if (gmc_v7_0_wait_for_idle((void *)adev))
dev_warn(adev->dev, "Wait for MC idle timedout !\n");
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
index 5af235202513..6acf649469dd 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
@@ -473,7 +473,7 @@ static void gmc_v8_0_mc_program(struct amdgpu_device *adev)
}
WREG32(mmMC_VM_AGP_BASE, 0);
- WREG32(mmMC_VM_AGP_TOP, 0x0FFFFFFF);
+ WREG32(mmMC_VM_AGP_TOP, 0);
WREG32(mmMC_VM_AGP_BOT, 0x0FFFFFFF);
if (gmc_v8_0_wait_for_idle((void *)adev))
dev_warn(adev->dev, "Wait for MC idle timedout !\n");
--
2.41.0
^ permalink raw reply related [flat|nested] 8+ messages in thread* [PATCH 2/3] drm/amdgpu/gmc: set a default disable value for AGP
2023-09-21 14:12 [PATCH 1/3] drm/amdgpu/gmc6-8: properly disable the AGP aperture Alex Deucher
@ 2023-09-21 14:12 ` Alex Deucher
2023-09-22 10:08 ` Christian König
2023-09-21 14:13 ` [PATCH 3/3] drm/amdgpu/gmc11: disable AGP on GC 11.5 Alex Deucher
2023-09-22 10:07 ` [PATCH 1/3] drm/amdgpu/gmc6-8: properly disable the AGP aperture Christian König
2 siblings, 1 reply; 8+ messages in thread
From: Alex Deucher @ 2023-09-21 14:12 UTC (permalink / raw)
To: amd-gfx; +Cc: Alex Deucher
To disable AGP, the start needs to be set to a higher
value than the end. Set a default disable value for
the AGP aperture and allow the IP specific GMC code
to enable it selectively be calling amdgpu_gmc_agp_location().
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c | 27 +++++++++++++------
drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h | 2 ++
drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 3 +++
drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c | 3 ++-
drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c | 3 ++-
drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c | 4 +--
drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c | 4 +--
drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c | 4 +--
drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 3 ++-
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 2 +-
10 files changed, 37 insertions(+), 18 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
index c7793db6d098..d0653f5ba8a9 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
@@ -315,14 +315,6 @@ void amdgpu_gmc_agp_location(struct amdgpu_device *adev, struct amdgpu_gmc *mc)
const uint64_t sixteen_gb_mask = ~(sixteen_gb - 1);
u64 size_af, size_bf;
- if (amdgpu_sriov_vf(adev)) {
- mc->agp_start = 0xffffffffffff;
- mc->agp_end = 0x0;
- mc->agp_size = 0;
-
- return;
- }
-
if (mc->fb_start > mc->gart_start) {
size_bf = (mc->fb_start & sixteen_gb_mask) -
ALIGN(mc->gart_end + 1, sixteen_gb);
@@ -346,6 +338,25 @@ void amdgpu_gmc_agp_location(struct amdgpu_device *adev, struct amdgpu_gmc *mc)
mc->agp_size >> 20, mc->agp_start, mc->agp_end);
}
+/**
+ * amdgpu_gmc_set_agp_default - Set the default AGP aperture value.
+ * @adev: amdgpu device structure holding all necessary information
+ * @mc: memory controller structure holding memory information
+ *
+ * To disable the AGP aperture, you need to set the start to a larger
+ * value than the end. This function sets the default value which
+ * can then be overridden using amdgpu_gmc_agp_location() if you want
+ * to enable the AGP aperture on a specific chip.
+ *
+ */
+void amdgpu_gmc_set_agp_default(struct amdgpu_device *adev,
+ struct amdgpu_gmc *mc)
+{
+ mc->agp_start = 0xffffffffffff;
+ mc->agp_end = 0;
+ mc->agp_size = 0;
+}
+
/**
* amdgpu_gmc_fault_key - get hask key from vm fault address and pasid
*
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h
index fdc25cd559b6..49a28379fc79 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h
@@ -392,6 +392,8 @@ void amdgpu_gmc_gart_location(struct amdgpu_device *adev,
struct amdgpu_gmc *mc);
void amdgpu_gmc_agp_location(struct amdgpu_device *adev,
struct amdgpu_gmc *mc);
+void amdgpu_gmc_set_agp_default(struct amdgpu_device *adev,
+ struct amdgpu_gmc *mc);
bool amdgpu_gmc_filter_faults(struct amdgpu_device *adev,
struct amdgpu_ih_ring *ih, uint64_t addr,
uint16_t pasid, uint64_t timestamp);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
index cef920a93924..0dcb6c36b02c 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
@@ -1062,6 +1062,9 @@ static const char * const amdgpu_vram_names[] = {
*/
int amdgpu_bo_init(struct amdgpu_device *adev)
{
+ /* set the default AGP aperture state */
+ amdgpu_gmc_set_agp_default(adev, &adev->gmc);
+
/* On A+A platform, VRAM can be mapped as WB */
if (!adev->gmc.xgmi.connected_to_cpu && !adev->gmc.is_app_apu) {
/* reserve PAT memory space to WC for VRAM */
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
index e582073b57c8..e6f76cd19c94 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
@@ -780,7 +780,8 @@ static void gmc_v10_0_vram_gtt_location(struct amdgpu_device *adev,
amdgpu_gmc_vram_location(adev, &adev->gmc, base);
amdgpu_gmc_gart_location(adev, mc);
- amdgpu_gmc_agp_location(adev, mc);
+ if (!amdgpu_sriov_vf(adev))
+ amdgpu_gmc_agp_location(adev, mc);
/* base offset of vram pages */
adev->vm_manager.vram_base_offset = adev->gfxhub.funcs->get_mc_fb_offset(adev);
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c
index 69f65e9c4f93..0bd7de1488f2 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c
@@ -689,7 +689,8 @@ static void gmc_v11_0_vram_gtt_location(struct amdgpu_device *adev,
amdgpu_gmc_vram_location(adev, &adev->gmc, base);
amdgpu_gmc_gart_location(adev, mc);
- amdgpu_gmc_agp_location(adev, mc);
+ if (!amdgpu_sriov_vf(adev))
+ amdgpu_gmc_agp_location(adev, mc);
/* base offset of vram pages */
if (amdgpu_sriov_vf(adev))
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c
index 07579fa26fa3..3f31f268e0eb 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c
@@ -253,8 +253,8 @@ static void gmc_v6_0_mc_program(struct amdgpu_device *adev)
WREG32(mmMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR,
adev->mem_scratch.gpu_addr >> 12);
WREG32(mmMC_VM_AGP_BASE, 0);
- WREG32(mmMC_VM_AGP_TOP, 0);
- WREG32(mmMC_VM_AGP_BOT, 0x0FFFFFFF);
+ WREG32(mmMC_VM_AGP_TOP, adev->gmc.agp_end >> 22);
+ WREG32(mmMC_VM_AGP_BOT, adev->gmc.agp_start >> 22);
if (gmc_v6_0_wait_for_idle((void *)adev))
dev_warn(adev->dev, "Wait for MC idle timedout !\n");
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
index e77e5593e1ab..e5e64366a814 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
@@ -288,8 +288,8 @@ static void gmc_v7_0_mc_program(struct amdgpu_device *adev)
WREG32(mmMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR,
adev->mem_scratch.gpu_addr >> 12);
WREG32(mmMC_VM_AGP_BASE, 0);
- WREG32(mmMC_VM_AGP_TOP, 0);
- WREG32(mmMC_VM_AGP_BOT, 0x0FFFFFFF);
+ WREG32(mmMC_VM_AGP_TOP, adev->gmc.agp_end >> 22);
+ WREG32(mmMC_VM_AGP_BOT, adev->gmc.agp_start >> 22);
if (gmc_v7_0_wait_for_idle((void *)adev))
dev_warn(adev->dev, "Wait for MC idle timedout !\n");
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
index 6acf649469dd..4be407bbb7c3 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
@@ -473,8 +473,8 @@ static void gmc_v8_0_mc_program(struct amdgpu_device *adev)
}
WREG32(mmMC_VM_AGP_BASE, 0);
- WREG32(mmMC_VM_AGP_TOP, 0);
- WREG32(mmMC_VM_AGP_BOT, 0x0FFFFFFF);
+ WREG32(mmMC_VM_AGP_TOP, adev->gmc.agp_end >> 22);
+ WREG32(mmMC_VM_AGP_BOT, adev->gmc.agp_start >> 22);
if (gmc_v8_0_wait_for_idle((void *)adev))
dev_warn(adev->dev, "Wait for MC idle timedout !\n");
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
index 2936a0fb7527..e5588408f4a5 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
@@ -1696,7 +1696,8 @@ static void gmc_v9_0_vram_gtt_location(struct amdgpu_device *adev,
} else {
amdgpu_gmc_vram_location(adev, mc, base);
amdgpu_gmc_gart_location(adev, mc);
- amdgpu_gmc_agp_location(adev, mc);
+ if (!amdgpu_sriov_vf(adev))
+ amdgpu_gmc_agp_location(adev, mc);
}
/* base offset of vram pages */
adev->vm_manager.vram_base_offset = adev->gfxhub.funcs->get_mc_fb_offset(adev);
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index 2e4a8bdbf50e..c2cb4b4cd2d7 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -1255,7 +1255,7 @@ static void mmhub_read_system_context(struct amdgpu_device *adev, struct dc_phy_
agp_top = adev->gmc.agp_end >> 24;
/* AGP aperture is disabled */
- if (agp_bot == agp_top) {
+ if (agp_bot > agp_top) {
logical_addr_low = adev->gmc.fb_start >> 18;
if (adev->apu_flags & AMD_APU_IS_RAVEN2)
/*
--
2.41.0
^ permalink raw reply related [flat|nested] 8+ messages in thread* Re: [PATCH 2/3] drm/amdgpu/gmc: set a default disable value for AGP
2023-09-21 14:12 ` [PATCH 2/3] drm/amdgpu/gmc: set a default disable value for AGP Alex Deucher
@ 2023-09-22 10:08 ` Christian König
0 siblings, 0 replies; 8+ messages in thread
From: Christian König @ 2023-09-22 10:08 UTC (permalink / raw)
To: Alex Deucher, amd-gfx
Am 21.09.23 um 16:12 schrieb Alex Deucher:
> To disable AGP, the start needs to be set to a higher
> value than the end. Set a default disable value for
> the AGP aperture and allow the IP specific GMC code
> to enable it selectively be calling amdgpu_gmc_agp_location().
>
> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c | 27 +++++++++++++------
> drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h | 2 ++
> drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 3 +++
> drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c | 3 ++-
> drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c | 3 ++-
> drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c | 4 +--
> drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c | 4 +--
> drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c | 4 +--
> drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 3 ++-
> .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 2 +-
> 10 files changed, 37 insertions(+), 18 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
> index c7793db6d098..d0653f5ba8a9 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
> @@ -315,14 +315,6 @@ void amdgpu_gmc_agp_location(struct amdgpu_device *adev, struct amdgpu_gmc *mc)
> const uint64_t sixteen_gb_mask = ~(sixteen_gb - 1);
> u64 size_af, size_bf;
>
> - if (amdgpu_sriov_vf(adev)) {
> - mc->agp_start = 0xffffffffffff;
> - mc->agp_end = 0x0;
> - mc->agp_size = 0;
> -
> - return;
> - }
> -
> if (mc->fb_start > mc->gart_start) {
> size_bf = (mc->fb_start & sixteen_gb_mask) -
> ALIGN(mc->gart_end + 1, sixteen_gb);
> @@ -346,6 +338,25 @@ void amdgpu_gmc_agp_location(struct amdgpu_device *adev, struct amdgpu_gmc *mc)
> mc->agp_size >> 20, mc->agp_start, mc->agp_end);
> }
>
> +/**
> + * amdgpu_gmc_set_agp_default - Set the default AGP aperture value.
> + * @adev: amdgpu device structure holding all necessary information
> + * @mc: memory controller structure holding memory information
> + *
> + * To disable the AGP aperture, you need to set the start to a larger
> + * value than the end. This function sets the default value which
> + * can then be overridden using amdgpu_gmc_agp_location() if you want
> + * to enable the AGP aperture on a specific chip.
> + *
> + */
> +void amdgpu_gmc_set_agp_default(struct amdgpu_device *adev,
> + struct amdgpu_gmc *mc)
> +{
> + mc->agp_start = 0xffffffffffff;
> + mc->agp_end = 0;
> + mc->agp_size = 0;
> +}
> +
> /**
> * amdgpu_gmc_fault_key - get hask key from vm fault address and pasid
> *
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h
> index fdc25cd559b6..49a28379fc79 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h
> @@ -392,6 +392,8 @@ void amdgpu_gmc_gart_location(struct amdgpu_device *adev,
> struct amdgpu_gmc *mc);
> void amdgpu_gmc_agp_location(struct amdgpu_device *adev,
> struct amdgpu_gmc *mc);
> +void amdgpu_gmc_set_agp_default(struct amdgpu_device *adev,
> + struct amdgpu_gmc *mc);
> bool amdgpu_gmc_filter_faults(struct amdgpu_device *adev,
> struct amdgpu_ih_ring *ih, uint64_t addr,
> uint16_t pasid, uint64_t timestamp);
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
> index cef920a93924..0dcb6c36b02c 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
> @@ -1062,6 +1062,9 @@ static const char * const amdgpu_vram_names[] = {
> */
> int amdgpu_bo_init(struct amdgpu_device *adev)
> {
> + /* set the default AGP aperture state */
> + amdgpu_gmc_set_agp_default(adev, &adev->gmc);
> +
> /* On A+A platform, VRAM can be mapped as WB */
> if (!adev->gmc.xgmi.connected_to_cpu && !adev->gmc.is_app_apu) {
> /* reserve PAT memory space to WC for VRAM */
> diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
> index e582073b57c8..e6f76cd19c94 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
> @@ -780,7 +780,8 @@ static void gmc_v10_0_vram_gtt_location(struct amdgpu_device *adev,
>
> amdgpu_gmc_vram_location(adev, &adev->gmc, base);
> amdgpu_gmc_gart_location(adev, mc);
> - amdgpu_gmc_agp_location(adev, mc);
> + if (!amdgpu_sriov_vf(adev))
> + amdgpu_gmc_agp_location(adev, mc);
>
> /* base offset of vram pages */
> adev->vm_manager.vram_base_offset = adev->gfxhub.funcs->get_mc_fb_offset(adev);
> diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c
> index 69f65e9c4f93..0bd7de1488f2 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c
> @@ -689,7 +689,8 @@ static void gmc_v11_0_vram_gtt_location(struct amdgpu_device *adev,
>
> amdgpu_gmc_vram_location(adev, &adev->gmc, base);
> amdgpu_gmc_gart_location(adev, mc);
> - amdgpu_gmc_agp_location(adev, mc);
> + if (!amdgpu_sriov_vf(adev))
> + amdgpu_gmc_agp_location(adev, mc);
>
> /* base offset of vram pages */
> if (amdgpu_sriov_vf(adev))
> diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c
> index 07579fa26fa3..3f31f268e0eb 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c
> @@ -253,8 +253,8 @@ static void gmc_v6_0_mc_program(struct amdgpu_device *adev)
> WREG32(mmMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR,
> adev->mem_scratch.gpu_addr >> 12);
> WREG32(mmMC_VM_AGP_BASE, 0);
> - WREG32(mmMC_VM_AGP_TOP, 0);
> - WREG32(mmMC_VM_AGP_BOT, 0x0FFFFFFF);
> + WREG32(mmMC_VM_AGP_TOP, adev->gmc.agp_end >> 22);
> + WREG32(mmMC_VM_AGP_BOT, adev->gmc.agp_start >> 22);
>
> if (gmc_v6_0_wait_for_idle((void *)adev))
> dev_warn(adev->dev, "Wait for MC idle timedout !\n");
> diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
> index e77e5593e1ab..e5e64366a814 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
> @@ -288,8 +288,8 @@ static void gmc_v7_0_mc_program(struct amdgpu_device *adev)
> WREG32(mmMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR,
> adev->mem_scratch.gpu_addr >> 12);
> WREG32(mmMC_VM_AGP_BASE, 0);
> - WREG32(mmMC_VM_AGP_TOP, 0);
> - WREG32(mmMC_VM_AGP_BOT, 0x0FFFFFFF);
> + WREG32(mmMC_VM_AGP_TOP, adev->gmc.agp_end >> 22);
> + WREG32(mmMC_VM_AGP_BOT, adev->gmc.agp_start >> 22);
> if (gmc_v7_0_wait_for_idle((void *)adev))
> dev_warn(adev->dev, "Wait for MC idle timedout !\n");
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
> index 6acf649469dd..4be407bbb7c3 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
> @@ -473,8 +473,8 @@ static void gmc_v8_0_mc_program(struct amdgpu_device *adev)
> }
>
> WREG32(mmMC_VM_AGP_BASE, 0);
> - WREG32(mmMC_VM_AGP_TOP, 0);
> - WREG32(mmMC_VM_AGP_BOT, 0x0FFFFFFF);
> + WREG32(mmMC_VM_AGP_TOP, adev->gmc.agp_end >> 22);
> + WREG32(mmMC_VM_AGP_BOT, adev->gmc.agp_start >> 22);
> if (gmc_v8_0_wait_for_idle((void *)adev))
> dev_warn(adev->dev, "Wait for MC idle timedout !\n");
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> index 2936a0fb7527..e5588408f4a5 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> @@ -1696,7 +1696,8 @@ static void gmc_v9_0_vram_gtt_location(struct amdgpu_device *adev,
> } else {
> amdgpu_gmc_vram_location(adev, mc, base);
> amdgpu_gmc_gart_location(adev, mc);
> - amdgpu_gmc_agp_location(adev, mc);
> + if (!amdgpu_sriov_vf(adev))
> + amdgpu_gmc_agp_location(adev, mc);
> }
> /* base offset of vram pages */
> adev->vm_manager.vram_base_offset = adev->gfxhub.funcs->get_mc_fb_offset(adev);
> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> index 2e4a8bdbf50e..c2cb4b4cd2d7 100644
> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> @@ -1255,7 +1255,7 @@ static void mmhub_read_system_context(struct amdgpu_device *adev, struct dc_phy_
> agp_top = adev->gmc.agp_end >> 24;
>
> /* AGP aperture is disabled */
> - if (agp_bot == agp_top) {
> + if (agp_bot > agp_top) {
> logical_addr_low = adev->gmc.fb_start >> 18;
> if (adev->apu_flags & AMD_APU_IS_RAVEN2)
> /*
^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH 3/3] drm/amdgpu/gmc11: disable AGP on GC 11.5
2023-09-21 14:12 [PATCH 1/3] drm/amdgpu/gmc6-8: properly disable the AGP aperture Alex Deucher
2023-09-21 14:12 ` [PATCH 2/3] drm/amdgpu/gmc: set a default disable value for AGP Alex Deucher
@ 2023-09-21 14:13 ` Alex Deucher
2023-09-22 10:08 ` Christian König
2023-09-22 10:07 ` [PATCH 1/3] drm/amdgpu/gmc6-8: properly disable the AGP aperture Christian König
2 siblings, 1 reply; 8+ messages in thread
From: Alex Deucher @ 2023-09-21 14:13 UTC (permalink / raw)
To: amd-gfx; +Cc: Alex Deucher
AGP aperture is deprecated and no longer functional.
v2: fix typo (Alex)
v3: just skip the agp setup call
v4: revert back to the original model
v5: back to v3
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c
index 0bd7de1488f2..5b457297d468 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c
@@ -689,7 +689,8 @@ static void gmc_v11_0_vram_gtt_location(struct amdgpu_device *adev,
amdgpu_gmc_vram_location(adev, &adev->gmc, base);
amdgpu_gmc_gart_location(adev, mc);
- if (!amdgpu_sriov_vf(adev))
+ if (!amdgpu_sriov_vf(adev) ||
+ (amdgpu_ip_version(adev, GC_HWIP, 0) < IP_VERSION(11, 5, 0)))
amdgpu_gmc_agp_location(adev, mc);
/* base offset of vram pages */
--
2.41.0
^ permalink raw reply related [flat|nested] 8+ messages in thread
* Re: [PATCH 3/3] drm/amdgpu/gmc11: disable AGP on GC 11.5
2023-09-21 14:13 ` [PATCH 3/3] drm/amdgpu/gmc11: disable AGP on GC 11.5 Alex Deucher
@ 2023-09-22 10:08 ` Christian König
0 siblings, 0 replies; 8+ messages in thread
From: Christian König @ 2023-09-22 10:08 UTC (permalink / raw)
To: Alex Deucher, amd-gfx
Am 21.09.23 um 16:13 schrieb Alex Deucher:
> AGP aperture is deprecated and no longer functional.
>
> v2: fix typo (Alex)
> v3: just skip the agp setup call
> v4: revert back to the original model
> v5: back to v3
>
> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c
> index 0bd7de1488f2..5b457297d468 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c
> @@ -689,7 +689,8 @@ static void gmc_v11_0_vram_gtt_location(struct amdgpu_device *adev,
>
> amdgpu_gmc_vram_location(adev, &adev->gmc, base);
> amdgpu_gmc_gart_location(adev, mc);
> - if (!amdgpu_sriov_vf(adev))
> + if (!amdgpu_sriov_vf(adev) ||
> + (amdgpu_ip_version(adev, GC_HWIP, 0) < IP_VERSION(11, 5, 0)))
> amdgpu_gmc_agp_location(adev, mc);
>
> /* base offset of vram pages */
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH 1/3] drm/amdgpu/gmc6-8: properly disable the AGP aperture
2023-09-21 14:12 [PATCH 1/3] drm/amdgpu/gmc6-8: properly disable the AGP aperture Alex Deucher
2023-09-21 14:12 ` [PATCH 2/3] drm/amdgpu/gmc: set a default disable value for AGP Alex Deucher
2023-09-21 14:13 ` [PATCH 3/3] drm/amdgpu/gmc11: disable AGP on GC 11.5 Alex Deucher
@ 2023-09-22 10:07 ` Christian König
2 siblings, 0 replies; 8+ messages in thread
From: Christian König @ 2023-09-22 10:07 UTC (permalink / raw)
To: Alex Deucher, amd-gfx; +Cc: Yang Wang
Am 21.09.23 um 16:12 schrieb Alex Deucher:
> The BOT register needs to be larger than the TOP register
> for this to be properly disabled. The lower 22 bits
> of the BOT address are always 0 and the lower 22 bits of
> the TOP register are always 1 so you need to make
> the upper bits of BOT larger than the upper bits of BOT.
>
> Reviewed-by: Yang Wang <kevinyang.wang@amd.com>
> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c | 2 +-
> drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c | 2 +-
> drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c | 2 +-
> 3 files changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c
> index 5b837a65fad2..07579fa26fa3 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c
> @@ -253,7 +253,7 @@ static void gmc_v6_0_mc_program(struct amdgpu_device *adev)
> WREG32(mmMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR,
> adev->mem_scratch.gpu_addr >> 12);
> WREG32(mmMC_VM_AGP_BASE, 0);
> - WREG32(mmMC_VM_AGP_TOP, 0x0FFFFFFF);
> + WREG32(mmMC_VM_AGP_TOP, 0);
> WREG32(mmMC_VM_AGP_BOT, 0x0FFFFFFF);
>
> if (gmc_v6_0_wait_for_idle((void *)adev))
> diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
> index 6a6929ac2748..e77e5593e1ab 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
> @@ -288,7 +288,7 @@ static void gmc_v7_0_mc_program(struct amdgpu_device *adev)
> WREG32(mmMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR,
> adev->mem_scratch.gpu_addr >> 12);
> WREG32(mmMC_VM_AGP_BASE, 0);
> - WREG32(mmMC_VM_AGP_TOP, 0x0FFFFFFF);
> + WREG32(mmMC_VM_AGP_TOP, 0);
> WREG32(mmMC_VM_AGP_BOT, 0x0FFFFFFF);
> if (gmc_v7_0_wait_for_idle((void *)adev))
> dev_warn(adev->dev, "Wait for MC idle timedout !\n");
> diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
> index 5af235202513..6acf649469dd 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
> @@ -473,7 +473,7 @@ static void gmc_v8_0_mc_program(struct amdgpu_device *adev)
> }
>
> WREG32(mmMC_VM_AGP_BASE, 0);
> - WREG32(mmMC_VM_AGP_TOP, 0x0FFFFFFF);
> + WREG32(mmMC_VM_AGP_TOP, 0);
> WREG32(mmMC_VM_AGP_BOT, 0x0FFFFFFF);
> if (gmc_v8_0_wait_for_idle((void *)adev))
> dev_warn(adev->dev, "Wait for MC idle timedout !\n");
^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH 1/3] drm/amdgpu/gmc6-8: properly disable the AGP aperture
@ 2023-09-20 17:58 Alex Deucher
0 siblings, 0 replies; 8+ messages in thread
From: Alex Deucher @ 2023-09-20 17:58 UTC (permalink / raw)
To: amd-gfx; +Cc: Alex Deucher
The BOT register needs to be larger than the TOP register
for this to be properly disabled. The lower 22 bits
of the BOT address are always 0 and the lower 22 bits of
the TOP register are always 1 so you need to make
the upper bits of BOT larger than the upper bits of BOT.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c | 2 +-
drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c | 2 +-
drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c | 2 +-
3 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c
index 5b837a65fad2..07579fa26fa3 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c
@@ -253,7 +253,7 @@ static void gmc_v6_0_mc_program(struct amdgpu_device *adev)
WREG32(mmMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR,
adev->mem_scratch.gpu_addr >> 12);
WREG32(mmMC_VM_AGP_BASE, 0);
- WREG32(mmMC_VM_AGP_TOP, 0x0FFFFFFF);
+ WREG32(mmMC_VM_AGP_TOP, 0);
WREG32(mmMC_VM_AGP_BOT, 0x0FFFFFFF);
if (gmc_v6_0_wait_for_idle((void *)adev))
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
index 6a6929ac2748..e77e5593e1ab 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
@@ -288,7 +288,7 @@ static void gmc_v7_0_mc_program(struct amdgpu_device *adev)
WREG32(mmMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR,
adev->mem_scratch.gpu_addr >> 12);
WREG32(mmMC_VM_AGP_BASE, 0);
- WREG32(mmMC_VM_AGP_TOP, 0x0FFFFFFF);
+ WREG32(mmMC_VM_AGP_TOP, 0);
WREG32(mmMC_VM_AGP_BOT, 0x0FFFFFFF);
if (gmc_v7_0_wait_for_idle((void *)adev))
dev_warn(adev->dev, "Wait for MC idle timedout !\n");
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
index 5af235202513..6acf649469dd 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
@@ -473,7 +473,7 @@ static void gmc_v8_0_mc_program(struct amdgpu_device *adev)
}
WREG32(mmMC_VM_AGP_BASE, 0);
- WREG32(mmMC_VM_AGP_TOP, 0x0FFFFFFF);
+ WREG32(mmMC_VM_AGP_TOP, 0);
WREG32(mmMC_VM_AGP_BOT, 0x0FFFFFFF);
if (gmc_v8_0_wait_for_idle((void *)adev))
dev_warn(adev->dev, "Wait for MC idle timedout !\n");
--
2.41.0
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH 1/3] drm/amdgpu/gmc6-8: properly disable the AGP aperture
@ 2023-09-20 17:46 Alex Deucher
0 siblings, 0 replies; 8+ messages in thread
From: Alex Deucher @ 2023-09-20 17:46 UTC (permalink / raw)
To: amd-gfx; +Cc: Alex Deucher
The BOT register needs to be larger than the TOP register
for this to be properly disabled. The lower 22 bits
of the BOT address are always 0 and the lower 22 bits of
the TOP register are always 1 so you need to make
the upper bits of BOT larger than the upper bits of BOT.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c | 2 +-
drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c | 2 +-
drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c | 2 +-
3 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c
index 5b837a65fad2..07579fa26fa3 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c
@@ -253,7 +253,7 @@ static void gmc_v6_0_mc_program(struct amdgpu_device *adev)
WREG32(mmMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR,
adev->mem_scratch.gpu_addr >> 12);
WREG32(mmMC_VM_AGP_BASE, 0);
- WREG32(mmMC_VM_AGP_TOP, 0x0FFFFFFF);
+ WREG32(mmMC_VM_AGP_TOP, 0);
WREG32(mmMC_VM_AGP_BOT, 0x0FFFFFFF);
if (gmc_v6_0_wait_for_idle((void *)adev))
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
index 6a6929ac2748..e77e5593e1ab 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
@@ -288,7 +288,7 @@ static void gmc_v7_0_mc_program(struct amdgpu_device *adev)
WREG32(mmMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR,
adev->mem_scratch.gpu_addr >> 12);
WREG32(mmMC_VM_AGP_BASE, 0);
- WREG32(mmMC_VM_AGP_TOP, 0x0FFFFFFF);
+ WREG32(mmMC_VM_AGP_TOP, 0);
WREG32(mmMC_VM_AGP_BOT, 0x0FFFFFFF);
if (gmc_v7_0_wait_for_idle((void *)adev))
dev_warn(adev->dev, "Wait for MC idle timedout !\n");
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
index 5af235202513..6acf649469dd 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
@@ -473,7 +473,7 @@ static void gmc_v8_0_mc_program(struct amdgpu_device *adev)
}
WREG32(mmMC_VM_AGP_BASE, 0);
- WREG32(mmMC_VM_AGP_TOP, 0x0FFFFFFF);
+ WREG32(mmMC_VM_AGP_TOP, 0);
WREG32(mmMC_VM_AGP_BOT, 0x0FFFFFFF);
if (gmc_v8_0_wait_for_idle((void *)adev))
dev_warn(adev->dev, "Wait for MC idle timedout !\n");
--
2.41.0
^ permalink raw reply related [flat|nested] 8+ messages in thread
end of thread, other threads:[~2023-09-22 10:09 UTC | newest]
Thread overview: 8+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2023-09-21 14:12 [PATCH 1/3] drm/amdgpu/gmc6-8: properly disable the AGP aperture Alex Deucher
2023-09-21 14:12 ` [PATCH 2/3] drm/amdgpu/gmc: set a default disable value for AGP Alex Deucher
2023-09-22 10:08 ` Christian König
2023-09-21 14:13 ` [PATCH 3/3] drm/amdgpu/gmc11: disable AGP on GC 11.5 Alex Deucher
2023-09-22 10:08 ` Christian König
2023-09-22 10:07 ` [PATCH 1/3] drm/amdgpu/gmc6-8: properly disable the AGP aperture Christian König
-- strict thread matches above, loose matches on Subject: below --
2023-09-20 17:58 Alex Deucher
2023-09-20 17:46 Alex Deucher
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox