* [PATCH 1/3] drm/amdgpu/pm: add missing revision check for CI
@ 2026-04-28 14:56 Alex Deucher
2026-04-28 14:56 ` [PATCH 2/3] drm/amdgpu/pm: align Hawaii mclk workaround with radeon Alex Deucher
` (2 more replies)
0 siblings, 3 replies; 5+ messages in thread
From: Alex Deucher @ 2026-04-28 14:56 UTC (permalink / raw)
To: amd-gfx, timur.kristof; +Cc: Alex Deucher, Kent Russell
The ci_populate_all_memory_levels() workaround only
applies to revision 0 SKUs.
Link: https://gitlab.freedesktop.org/drm/amd/-/work_items/1816
Fixes: 9f4b35411cfe ("drm/amd/powerplay: add CI asics support to smumgr (v3)")
Reviewed-by: Kent Russell <kent.russell@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
drivers/gpu/drm/amd/pm/powerplay/smumgr/ci_smumgr.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/pm/powerplay/smumgr/ci_smumgr.c b/drivers/gpu/drm/amd/pm/powerplay/smumgr/ci_smumgr.c
index 69d8b05ef2457..6e89a032e3dcf 100644
--- a/drivers/gpu/drm/amd/pm/powerplay/smumgr/ci_smumgr.c
+++ b/drivers/gpu/drm/amd/pm/powerplay/smumgr/ci_smumgr.c
@@ -1333,8 +1333,9 @@ static int ci_populate_all_memory_levels(struct pp_hwmgr *hwmgr)
dev_id = adev->pdev->device;
- if ((dpm_table->mclk_table.count >= 2)
- && ((dev_id == 0x67B0) || (dev_id == 0x67B1))) {
+ if ((dpm_table->mclk_table.count >= 2) &&
+ ((dev_id == 0x67B0) || (dev_id == 0x67B1)) &&
+ (adev->pdev->revision == 0)) {
smu_data->smc_state_table.MemoryLevel[1].MinVddci =
smu_data->smc_state_table.MemoryLevel[0].MinVddci;
smu_data->smc_state_table.MemoryLevel[1].MinMvdd =
--
2.53.0
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [PATCH 2/3] drm/amdgpu/pm: align Hawaii mclk workaround with radeon
2026-04-28 14:56 [PATCH 1/3] drm/amdgpu/pm: add missing revision check for CI Alex Deucher
@ 2026-04-28 14:56 ` Alex Deucher
2026-04-28 15:22 ` Russell, Kent
2026-04-28 14:56 ` [PATCH 3/3] drm/radeon: add missing revision check for CI Alex Deucher
2026-04-30 12:20 ` [PATCH 1/3] drm/amdgpu/pm: " Timur Kristóf
2 siblings, 1 reply; 5+ messages in thread
From: Alex Deucher @ 2026-04-28 14:56 UTC (permalink / raw)
To: amd-gfx, timur.kristof; +Cc: Alex Deucher
Align the hawaii mclk workaround with radeon and windows.
Link: https://gitlab.freedesktop.org/drm/amd/-/work_items/1816
Fixes: 9f4b35411cfe ("drm/amd/powerplay: add CI asics support to smumgr (v3)")
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
drivers/gpu/drm/amd/pm/powerplay/smumgr/ci_smumgr.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/pm/powerplay/smumgr/ci_smumgr.c b/drivers/gpu/drm/amd/pm/powerplay/smumgr/ci_smumgr.c
index 6e89a032e3dcf..aea3ad523cc03 100644
--- a/drivers/gpu/drm/amd/pm/powerplay/smumgr/ci_smumgr.c
+++ b/drivers/gpu/drm/amd/pm/powerplay/smumgr/ci_smumgr.c
@@ -1336,10 +1336,10 @@ static int ci_populate_all_memory_levels(struct pp_hwmgr *hwmgr)
if ((dpm_table->mclk_table.count >= 2) &&
((dev_id == 0x67B0) || (dev_id == 0x67B1)) &&
(adev->pdev->revision == 0)) {
- smu_data->smc_state_table.MemoryLevel[1].MinVddci =
- smu_data->smc_state_table.MemoryLevel[0].MinVddci;
- smu_data->smc_state_table.MemoryLevel[1].MinMvdd =
- smu_data->smc_state_table.MemoryLevel[0].MinMvdd;
+ smu_data->smc_state_table.MemoryLevel[1].MinVddc =
+ smu_data->smc_state_table.MemoryLevel[0].MinVddc;
+ smu_data->smc_state_table.MemoryLevel[1].MinVddcPhases =
+ smu_data->smc_state_table.MemoryLevel[0].MinVddcPhases;
}
smu_data->smc_state_table.MemoryLevel[0].ActivityLevel = 0x1F;
CONVERT_FROM_HOST_TO_SMC_US(smu_data->smc_state_table.MemoryLevel[0].ActivityLevel);
--
2.53.0
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [PATCH 3/3] drm/radeon: add missing revision check for CI
2026-04-28 14:56 [PATCH 1/3] drm/amdgpu/pm: add missing revision check for CI Alex Deucher
2026-04-28 14:56 ` [PATCH 2/3] drm/amdgpu/pm: align Hawaii mclk workaround with radeon Alex Deucher
@ 2026-04-28 14:56 ` Alex Deucher
2026-04-30 12:20 ` [PATCH 1/3] drm/amdgpu/pm: " Timur Kristóf
2 siblings, 0 replies; 5+ messages in thread
From: Alex Deucher @ 2026-04-28 14:56 UTC (permalink / raw)
To: amd-gfx, timur.kristof; +Cc: Alex Deucher, Kent Russell
The memory level workarounds only apply to revision 0 SKUs.
Link: https://gitlab.freedesktop.org/drm/amd/-/work_items/1816
Fixes: 127e056e2a82 ("drm/radeon: fix mclk vddc configuration for cards for hawaii")
Fixes: 21b8a369046f ("drm/radeon: fix dram timing for certain hawaii boards")
Fixes: 90b2fee35cb9 ("drm/radeon: fix dpm mc init for certain hawaii boards")
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Kent Russell <kent.russell@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
drivers/gpu/drm/radeon/ci_dpm.c | 9 ++++++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/radeon/ci_dpm.c b/drivers/gpu/drm/radeon/ci_dpm.c
index ba8db1d07c070..b47b91272b244 100644
--- a/drivers/gpu/drm/radeon/ci_dpm.c
+++ b/drivers/gpu/drm/radeon/ci_dpm.c
@@ -2461,7 +2461,8 @@ static void ci_register_patching_mc_arb(struct radeon_device *rdev,
if (patch &&
((rdev->pdev->device == 0x67B0) ||
- (rdev->pdev->device == 0x67B1))) {
+ (rdev->pdev->device == 0x67B1)) &&
+ (rdev->pdev->revision == 0)) {
if ((memory_clock > 100000) && (memory_clock <= 125000)) {
tmp2 = (((0x31 * engine_clock) / 125000) - 1) & 0xff;
*dram_timimg2 &= ~0x00ff0000;
@@ -3304,7 +3305,8 @@ static int ci_populate_all_memory_levels(struct radeon_device *rdev)
pi->smc_state_table.MemoryLevel[0].EnabledForActivity = 1;
if ((dpm_table->mclk_table.count >= 2) &&
- ((rdev->pdev->device == 0x67B0) || (rdev->pdev->device == 0x67B1))) {
+ ((rdev->pdev->device == 0x67B0) || (rdev->pdev->device == 0x67B1)) &&
+ (rdev->pdev->revision == 0)) {
pi->smc_state_table.MemoryLevel[1].MinVddc =
pi->smc_state_table.MemoryLevel[0].MinVddc;
pi->smc_state_table.MemoryLevel[1].MinVddcPhases =
@@ -4493,7 +4495,8 @@ static int ci_register_patching_mc_seq(struct radeon_device *rdev,
if (patch &&
((rdev->pdev->device == 0x67B0) ||
- (rdev->pdev->device == 0x67B1))) {
+ (rdev->pdev->device == 0x67B1)) &&
+ (rdev->pdev->revision == 0)) {
for (i = 0; i < table->last; i++) {
if (table->last >= SMU7_DISCRETE_MC_REGISTER_ARRAY_SIZE)
return -EINVAL;
--
2.53.0
^ permalink raw reply related [flat|nested] 5+ messages in thread
* RE: [PATCH 2/3] drm/amdgpu/pm: align Hawaii mclk workaround with radeon
2026-04-28 14:56 ` [PATCH 2/3] drm/amdgpu/pm: align Hawaii mclk workaround with radeon Alex Deucher
@ 2026-04-28 15:22 ` Russell, Kent
0 siblings, 0 replies; 5+ messages in thread
From: Russell, Kent @ 2026-04-28 15:22 UTC (permalink / raw)
To: Deucher, Alexander, amd-gfx@lists.freedesktop.org,
timur.kristof@gmail.com
Cc: Deucher, Alexander
Public
Reviewed-by: Kent Russell <kent.russell@amd.com>
> -----Original Message-----
> From: amd-gfx <amd-gfx-bounces@lists.freedesktop.org> On Behalf Of Alex
> Deucher
> Sent: Tuesday, April 28, 2026 10:56 AM
> To: amd-gfx@lists.freedesktop.org; timur.kristof@gmail.com
> Cc: Deucher, Alexander <Alexander.Deucher@amd.com>
> Subject: [PATCH 2/3] drm/amdgpu/pm: align Hawaii mclk workaround with radeon
>
> Align the hawaii mclk workaround with radeon and windows.
>
> Link: https://gitlab.freedesktop.org/drm/amd/-/work_items/1816
> Fixes: 9f4b35411cfe ("drm/amd/powerplay: add CI asics support to smumgr (v3)")
> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
> ---
> drivers/gpu/drm/amd/pm/powerplay/smumgr/ci_smumgr.c | 8 ++++----
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/pm/powerplay/smumgr/ci_smumgr.c
> b/drivers/gpu/drm/amd/pm/powerplay/smumgr/ci_smumgr.c
> index 6e89a032e3dcf..aea3ad523cc03 100644
> --- a/drivers/gpu/drm/amd/pm/powerplay/smumgr/ci_smumgr.c
> +++ b/drivers/gpu/drm/amd/pm/powerplay/smumgr/ci_smumgr.c
> @@ -1336,10 +1336,10 @@ static int ci_populate_all_memory_levels(struct
> pp_hwmgr *hwmgr)
> if ((dpm_table->mclk_table.count >= 2) &&
> ((dev_id == 0x67B0) || (dev_id == 0x67B1)) &&
> (adev->pdev->revision == 0)) {
> - smu_data->smc_state_table.MemoryLevel[1].MinVddci =
> - smu_data-
> >smc_state_table.MemoryLevel[0].MinVddci;
> - smu_data->smc_state_table.MemoryLevel[1].MinMvdd =
> - smu_data-
> >smc_state_table.MemoryLevel[0].MinMvdd;
> + smu_data->smc_state_table.MemoryLevel[1].MinVddc =
> + smu_data-
> >smc_state_table.MemoryLevel[0].MinVddc;
> + smu_data->smc_state_table.MemoryLevel[1].MinVddcPhases =
> + smu_data-
> >smc_state_table.MemoryLevel[0].MinVddcPhases;
> }
> smu_data->smc_state_table.MemoryLevel[0].ActivityLevel = 0x1F;
> CONVERT_FROM_HOST_TO_SMC_US(smu_data-
> >smc_state_table.MemoryLevel[0].ActivityLevel);
> --
> 2.53.0
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH 1/3] drm/amdgpu/pm: add missing revision check for CI
2026-04-28 14:56 [PATCH 1/3] drm/amdgpu/pm: add missing revision check for CI Alex Deucher
2026-04-28 14:56 ` [PATCH 2/3] drm/amdgpu/pm: align Hawaii mclk workaround with radeon Alex Deucher
2026-04-28 14:56 ` [PATCH 3/3] drm/radeon: add missing revision check for CI Alex Deucher
@ 2026-04-30 12:20 ` Timur Kristóf
2 siblings, 0 replies; 5+ messages in thread
From: Timur Kristóf @ 2026-04-30 12:20 UTC (permalink / raw)
To: amd-gfx, Alex Deucher; +Cc: Alex Deucher, Kent Russell
On 2026. április 28., kedd 16:56:18 közép-európai nyári idő Alex Deucher
wrote:
> The ci_populate_all_memory_levels() workaround only
> applies to revision 0 SKUs.
>
> Link: https://gitlab.freedesktop.org/drm/amd/-/work_items/1816
> Fixes: 9f4b35411cfe ("drm/amd/powerplay: add CI asics support to smumgr
> (v3)") Reviewed-by: Kent Russell <kent.russell@amd.com>
> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Thank you Alex!
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
for all 3 patches in this series
> ---
> drivers/gpu/drm/amd/pm/powerplay/smumgr/ci_smumgr.c | 5 +++--
> 1 file changed, 3 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/pm/powerplay/smumgr/ci_smumgr.c
> b/drivers/gpu/drm/amd/pm/powerplay/smumgr/ci_smumgr.c index
> 69d8b05ef2457..6e89a032e3dcf 100644
> --- a/drivers/gpu/drm/amd/pm/powerplay/smumgr/ci_smumgr.c
> +++ b/drivers/gpu/drm/amd/pm/powerplay/smumgr/ci_smumgr.c
> @@ -1333,8 +1333,9 @@ static int ci_populate_all_memory_levels(struct
> pp_hwmgr *hwmgr)
>
> dev_id = adev->pdev->device;
>
> - if ((dpm_table->mclk_table.count >= 2)
> - && ((dev_id == 0x67B0) || (dev_id == 0x67B1))) {
> + if ((dpm_table->mclk_table.count >= 2) &&
> + ((dev_id == 0x67B0) || (dev_id == 0x67B1)) &&
> + (adev->pdev->revision == 0)) {
> smu_data->smc_state_table.MemoryLevel[1].MinVddci =
> smu_data-
>smc_state_table.MemoryLevel[0].MinVddci;
> smu_data->smc_state_table.MemoryLevel[1].MinMvdd =
^ permalink raw reply [flat|nested] 5+ messages in thread
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2026-04-28 14:56 [PATCH 1/3] drm/amdgpu/pm: add missing revision check for CI Alex Deucher
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2026-04-28 15:22 ` Russell, Kent
2026-04-28 14:56 ` [PATCH 3/3] drm/radeon: add missing revision check for CI Alex Deucher
2026-04-30 12:20 ` [PATCH 1/3] drm/amdgpu/pm: " Timur Kristóf
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