[PATCH] drm/amdgpu: use local xcc write to flush tlb

[PATCH] drm/amdgpu: use local xcc write to flush tlb

[Yiqing Yao]

When flushing gpu tlb using kiq from gfxhub, kiq ring is always
local as xcc instance is selected for it. Thus using lower 18 bits
to access mmregs inside local xcc instead of full address used
when accessing regs outside of local xcc.

Remove redundent code.

Signed-off-by: Yiqing Yao <YiQing.Yao@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
index 350f6b6676f1..864fea31c354 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
@@ -853,8 +853,10 @@ static void gmc_v9_0_flush_gpu_tlb(struct amdgpu_device *adev, uint32_t vmid,
 	 */
 	if (adev->gfx.kiq[inst].ring.sched.ready &&
 	    (amdgpu_sriov_runtime(adev) || !amdgpu_sriov_vf(adev))) {
-		uint32_t req = hub->vm_inv_eng0_req + hub->eng_distance * eng;
-		uint32_t ack = hub->vm_inv_eng0_ack + hub->eng_distance * eng;
+
+		/* Select lower 18 bits to write in local xcc */
+		if (vmhub < AMDGPU_MMHUB0(0))
+			req = req & 0x3ffff;
 
 		amdgpu_gmc_fw_reg_write_reg_wait(adev, req, ack, inv_req,
 						 1 << vmid, inst);
-- 
2.34.1

Re: [PATCH] drm/amdgpu: use local xcc write to flush tlb

[Christian König]

Am 03.06.24 um 13:46 schrieb Yiqing Yao:
> When flushing gpu tlb using kiq from gfxhub, kiq ring is always
> local as xcc instance is selected for it. Thus using lower 18 bits
> to access mmregs inside local xcc instead of full address used
> when accessing regs outside of local xcc.
>
> Remove redundent code.
>
> Signed-off-by: Yiqing Yao <YiQing.Yao@amd.com>
> ---
>   drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 6 ++++--
>   1 file changed, 4 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> index 350f6b6676f1..864fea31c354 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> @@ -853,8 +853,10 @@ static void gmc_v9_0_flush_gpu_tlb(struct amdgpu_device *adev, uint32_t vmid,
>   	 */
>   	if (adev->gfx.kiq[inst].ring.sched.ready &&
>   	    (amdgpu_sriov_runtime(adev) || !amdgpu_sriov_vf(adev))) {
> -		uint32_t req = hub->vm_inv_eng0_req + hub->eng_distance * eng;
> -		uint32_t ack = hub->vm_inv_eng0_ack + hub->eng_distance * eng;
> +
> +		/* Select lower 18 bits to write in local xcc */
> +		if (vmhub < AMDGPU_MMHUB0(0))
> +			req = req & 0x3ffff;

A bit more explanation would be good here, e.g. what you have in the 
commit message.

Apart from that why do we need that in the first place? Isn't the KIQ 
able to access the register anyway?

Regards,
Christian.

>   
>   		amdgpu_gmc_fw_reg_write_reg_wait(adev, req, ack, inv_req,
>   						 1 << vmid, inst);