[PATCH 1/2] Revert "drm/amdgpu: don't attach the tlb fence for SI"

[PATCH 1/2] Revert "drm/amdgpu: don't attach the tlb fence for SI"

[Prike Liang]

This reverts commit 47d28900bc2049379b28656cf1e527aa8598925b.

It’s better to validate VM TLB flushes in the flush‑TLB backend
rather than in the generic VM layer.

Signed-off-by: Prike Liang <Prike.Liang@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
index 0eccb31793ca..6a2ea200d90c 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
@@ -1069,9 +1069,7 @@ amdgpu_vm_tlb_flush(struct amdgpu_vm_update_params *params,
 	}
 
 	/* Prepare a TLB flush fence to be attached to PTs */
-	if (!params->unlocked &&
-	    /* SI doesn't support pasid or KIQ/MES */
-	    params->adev->family > AMDGPU_FAMILY_SI) {
+	if (!params->unlocked) {
 		amdgpu_vm_tlb_fence_create(params->adev, vm, fence);
 
 		/* Makes sure no PD/PT is freed before the flush */
-- 
2.34.1

[PATCH 2/2] drm/amdgpu: validate the flush_gpu_tlb_pasid()

[Prike Liang]

Validate flush_gpu_tlb_pasid() availability before flushing tlb.

Signed-off-by: Prike Liang <Prike.Liang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
index 6d7b8bb953ae..0e67fa4338ff 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
@@ -780,6 +780,10 @@ int amdgpu_gmc_flush_gpu_tlb_pasid(struct amdgpu_device *adev, uint16_t pasid,
 		return 0;
 
 	if (!adev->gmc.flush_pasid_uses_kiq || !ring->sched.ready) {
+
+		if (!adev->gmc.gmc_funcs->flush_gpu_tlb_pasid)
+			return 0;
+
 		if (adev->gmc.flush_tlb_needs_extra_type_2)
 			adev->gmc.gmc_funcs->flush_gpu_tlb_pasid(adev, pasid,
 								 2, all_hub,
-- 
2.34.1

Re: [PATCH 2/2] drm/amdgpu: validate the flush_gpu_tlb_pasid()

[Christian König]

On 1/9/26 09:25, Prike Liang wrote:
> Validate flush_gpu_tlb_pasid() availability before flushing tlb.
> 
> Signed-off-by: Prike Liang <Prike.Liang@amd.com>
> Reviewed-by: Christian König <christian.koenig@amd.com>

This patch set needs to be re-ordered, e.g. this patch here first and then the other one.

Otherwise you have a state in between where it is broken again.

Apart from that looks good to me.

Regards,
Christian.

> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c | 4 ++++
>  1 file changed, 4 insertions(+)
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
> index 6d7b8bb953ae..0e67fa4338ff 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
> @@ -780,6 +780,10 @@ int amdgpu_gmc_flush_gpu_tlb_pasid(struct amdgpu_device *adev, uint16_t pasid,
>  		return 0;
>  
>  	if (!adev->gmc.flush_pasid_uses_kiq || !ring->sched.ready) {
> +
> +		if (!adev->gmc.gmc_funcs->flush_gpu_tlb_pasid)
> +			return 0;
> +
>  		if (adev->gmc.flush_tlb_needs_extra_type_2)
>  			adev->gmc.gmc_funcs->flush_gpu_tlb_pasid(adev, pasid,
>  								 2, all_hub,

RE: [PATCH 2/2] drm/amdgpu: validate the flush_gpu_tlb_pasid()

[Liang, Prike]

[Public]

Yes, I missed that they can be merged separately. I’ll reorder the patch list when merging them.

Regards,
      Prike

> -----Original Message-----
> From: Koenig, Christian <Christian.Koenig@amd.com>
> Sent: Friday, January 9, 2026 5:09 PM
> To: Liang, Prike <Prike.Liang@amd.com>; amd-gfx@lists.freedesktop.org
> Cc: Deucher, Alexander <Alexander.Deucher@amd.com>; phil@jpmr.org
> Subject: Re: [PATCH 2/2] drm/amdgpu: validate the flush_gpu_tlb_pasid()
>
> On 1/9/26 09:25, Prike Liang wrote:
> > Validate flush_gpu_tlb_pasid() availability before flushing tlb.
> >
> > Signed-off-by: Prike Liang <Prike.Liang@amd.com>
> > Reviewed-by: Christian König <christian.koenig@amd.com>
>
> This patch set needs to be re-ordered, e.g. this patch here first and then the other
> one.
>
> Otherwise you have a state in between where it is broken again.
>
> Apart from that looks good to me.
>
> Regards,
> Christian.
>
> > ---
> >  drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c | 4 ++++
> >  1 file changed, 4 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
> > index 6d7b8bb953ae..0e67fa4338ff 100644
> > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
> > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
> > @@ -780,6 +780,10 @@ int amdgpu_gmc_flush_gpu_tlb_pasid(struct
> amdgpu_device *adev, uint16_t pasid,
> >             return 0;
> >
> >     if (!adev->gmc.flush_pasid_uses_kiq || !ring->sched.ready) {
> > +
> > +           if (!adev->gmc.gmc_funcs->flush_gpu_tlb_pasid)
> > +                   return 0;
> > +
> >             if (adev->gmc.flush_tlb_needs_extra_type_2)
> >                     adev->gmc.gmc_funcs->flush_gpu_tlb_pasid(adev, pasid,
> >                                                              2, all_hub,

Re: [PATCH 1/2] Revert "drm/amdgpu: don't attach the tlb fence for SI"

[Christian König]

On 1/9/26 09:25, Prike Liang wrote:
> This reverts commit 47d28900bc2049379b28656cf1e527aa8598925b.
> 
> It’s better to validate VM TLB flushes in the flush‑TLB backend
> rather than in the generic VM layer.
> 
> Signed-off-by: Prike Liang <Prike.Liang@amd.com>

Reviewed-by: Christian König <christian.koenig@amd.com>

> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 4 +---
>  1 file changed, 1 insertion(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
> index 0eccb31793ca..6a2ea200d90c 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
> @@ -1069,9 +1069,7 @@ amdgpu_vm_tlb_flush(struct amdgpu_vm_update_params *params,
>  	}
>  
>  	/* Prepare a TLB flush fence to be attached to PTs */
> -	if (!params->unlocked &&
> -	    /* SI doesn't support pasid or KIQ/MES */
> -	    params->adev->family > AMDGPU_FAMILY_SI) {
> +	if (!params->unlocked) {
>  		amdgpu_vm_tlb_fence_create(params->adev, vm, fence);
>  
>  		/* Makes sure no PD/PT is freed before the flush */