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From: "Christian König" <christian.koenig@amd.com>
To: Shashank Sharma <shashank.sharma@amd.com>, amd-gfx@lists.freedesktop.org
Cc: Alex Deucher <alexander.deucher@amd.com>,
	pierre-eric.pelloux-prayer@amd.com,
	contactshashanksharma@gmail.com, arvind.yadav@amd.com
Subject: Re: [PATCH v4 06/10] drm/amdgpu: set FW parameters in v11_struct
Date: Tue, 25 Apr 2023 14:32:13 +0200	[thread overview]
Message-ID: <3ce3210e-bc0a-bcf5-a83f-629c1792ad43@amd.com> (raw)
In-Reply-To: <20230424173836.1441-7-shashank.sharma@amd.com>

Am 24.04.23 um 19:38 schrieb Shashank Sharma:
> From: Arvind Yadav <arvind.yadav@amd.com>
>
> This patch sets new parameters defined in v11_struct for
> usermode queue with the respective allocated gpu context
> space addresses.
>
> V4: Split the patch into two parts, keep only the set parameter
>      part in this series (Alex).
>
> Cc: Alex Deucher <alexander.deucher@amd.com>
> Cc: Christian Koenig <christian.koenig@amd.com>
> Cc: Shashank Sharma <shashank.sharma@amd.com>
> Signed-off-by: Arvind Yadav <arvind.yadav@amd.com>
> ---
>   drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c | 19 ++++++++++++++++++-
>   1 file changed, 18 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
> index f6b33faea86f..86de35292f69 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
> @@ -6411,6 +6411,21 @@ const struct amdgpu_ip_block_version gfx_v11_0_ip_block =
>   	.funcs = &gfx_v11_0_ip_funcs,
>   };
>   
> +static void gfx_v11_userq_set_ctx_space(struct amdgpu_userq_mgr *uq_mgr,
> +					struct amdgpu_usermode_queue *queue)
> +{
> +	struct v11_gfx_mqd *mqd = queue->mqd.cpu_ptr;
> +
> +	mqd->shadow_base_lo = queue->shadow_ctx_gpu_addr & 0xfffffffc;
> +	mqd->shadow_base_hi = upper_32_bits(queue->shadow_ctx_gpu_addr);
> +
> +	mqd->gds_bkup_base_lo = queue->gds_ctx_gpu_addr & 0xfffffffc;
> +	mqd->gds_bkup_base_hi = upper_32_bits(queue->gds_ctx_gpu_addr);
> +
> +	mqd->fw_work_area_base_lo = queue->fw_ctx_gpu_addr & 0xfffffffc;
> +	mqd->fw_work_area_base_lo = upper_32_bits(queue->fw_ctx_gpu_addr);

Mhm, first of all please use lower_32_bits() here instead of the mask.

Then are you sure that is correct? The shadow, csa, gds are supposed to 
be VAs as far as I know, but you use MC addresses here.

Christian.

> +}
> +
>   static int gfx_v11_userq_create_ctx_space(struct amdgpu_userq_mgr *uq_mgr,
>   					  struct amdgpu_usermode_queue *queue)
>   {
> @@ -6484,12 +6499,14 @@ gfx_v11_userq_mqd_create(struct amdgpu_userq_mgr *uq_mgr, struct amdgpu_usermode
>   	queue->userq_prop.use_doorbell = true;
>   	queue->userq_prop.mqd_gpu_addr = mqd->gpu_addr;
>   	r = gfx_v11_mqd->init_mqd(adev, (void *)mqd->cpu_ptr, &queue->userq_prop);
> -	amdgpu_bo_unreserve(mqd->obj);
>   	if (r) {
> +		amdgpu_bo_unreserve(mqd->obj);
>   		DRM_ERROR("Failed to init MQD for queue\n");
>   		goto free_ctx;
>   	}
>   
> +	gfx_v11_userq_set_ctx_space(uq_mgr, queue);
> +	amdgpu_bo_unreserve(mqd->obj);
>   	DRM_DEBUG_DRIVER("MQD for queue %d created\n", queue->queue_id);
>   	return 0;
>   


  reply	other threads:[~2023-04-25 12:32 UTC|newest]

Thread overview: 45+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-04-24 17:38 [PATCH v4 00/10] AMDGPU usermode queues Shashank Sharma
2023-04-24 17:38 ` [PATCH v4 01/10] drm/amdgpu: UAPI for user queue management Shashank Sharma
2023-05-19 21:03   ` Alex Deucher
2023-05-22  8:54     ` Shashank Sharma
2023-04-24 17:38 ` [PATCH v4 02/10] drm/amdgpu: add usermode queue base code Shashank Sharma
2023-04-25 12:03   ` Christian König
2023-04-25 12:19     ` Shashank Sharma
2023-04-24 17:38 ` [PATCH v4 03/10] drm/amdgpu: add new IOCTL for usermode queue Shashank Sharma
2023-04-25 12:14   ` Christian König
2023-04-25 12:21     ` Shashank Sharma
2023-04-24 17:38 ` [PATCH v4 04/10] drm/amdgpu: create GFX-gen11 MQD for userqueue Shashank Sharma
2023-04-25 12:27   ` Christian König
2023-04-25 13:10     ` Shashank Sharma
2023-04-25 13:45       ` Christian König
2023-04-25 17:02         ` Shashank Sharma
2023-05-19 21:19   ` Alex Deucher
2023-05-22  9:05     ` Shashank Sharma
2023-04-24 17:38 ` [PATCH v4 05/10] drm/amdgpu: create context space for usermode queue Shashank Sharma
2023-04-25 12:30   ` Christian König
2023-04-25 13:13     ` Shashank Sharma
2023-04-25 17:38       ` Deucher, Alexander
2023-04-25 20:00         ` Sharma, Shashank
2023-05-19 21:21   ` Alex Deucher
2023-05-22  9:05     ` Shashank Sharma
2023-04-24 17:38 ` [PATCH v4 06/10] drm/amdgpu: set FW parameters in v11_struct Shashank Sharma
2023-04-25 12:32   ` Christian König [this message]
2023-04-25 13:27     ` Shashank Sharma
2023-05-19 21:22   ` Alex Deucher
2023-05-22  9:06     ` Shashank Sharma
2023-04-24 17:38 ` [PATCH v4 07/10] drm/amdgpu: map usermode queue into MES Shashank Sharma
2023-04-25 12:34   ` Christian König
2023-04-25 13:31     ` Shashank Sharma
2023-04-25 15:33       ` Christian König
2023-04-25 16:56         ` Shashank Sharma
2023-05-19 21:22   ` Alex Deucher
2023-05-22  9:06     ` Shashank Sharma
2023-04-24 17:38 ` [PATCH v4 08/10] drm/amdgpu: map wptr BO into GART Shashank Sharma
2023-04-25 12:36   ` Christian König
2023-04-25 13:33     ` Shashank Sharma
2023-04-24 17:38 ` [PATCH v4 09/10] drm/amdgpu: generate doorbell index for userqueue Shashank Sharma
2023-04-25 12:38   ` Christian König
2023-04-25 13:34     ` Shashank Sharma
2023-04-24 17:38 ` [PATCH v4 10/10] drm/amdgpu: cleanup leftover queues Shashank Sharma
2023-04-25 12:40   ` Christian König
2023-04-25 13:34     ` Shashank Sharma

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