AMD-GFX Archive on lore.kernel.org
 help / color / mirror / Atom feed
From: Shashank Sharma <shashank.sharma@amd.com>
To: "Christian König" <christian.koenig@amd.com>,
	amd-gfx@lists.freedesktop.org
Cc: Alex Deucher <alexander.deucher@amd.com>,
	pierre-eric.pelloux-prayer@amd.com,
	contactshashanksharma@gmail.com, arvind.yadav@amd.com
Subject: Re: [PATCH v4 04/10] drm/amdgpu: create GFX-gen11 MQD for userqueue
Date: Tue, 25 Apr 2023 19:02:27 +0200	[thread overview]
Message-ID: <514f467c-e0c2-73a1-9623-6c046f80c859@amd.com> (raw)
In-Reply-To: <8e194e8a-4b71-f16c-e8bf-cfd0b34f7c22@amd.com>


On 25/04/2023 15:45, Christian König wrote:
> Am 25.04.23 um 15:10 schrieb Shashank Sharma:
>>
>> On 25/04/2023 14:27, Christian König wrote:
>>> Am 24.04.23 um 19:38 schrieb Shashank Sharma:
>>>> A Memory queue descriptor (MQD) of a userqueue defines it in
>>>> the hw's context. As MQD format can vary between different
>>>> graphics IPs, we need gfx GEN specific handlers to create MQDs.
>>>>
>>>> This patch:
>>>> - Introduces MQD handler functions for the usermode queues.
>>>> - Adds new functions to create and destroy userqueue MQD for
>>>>    GFX-GEN-11 IP
>>>>
>>>> V1: Worked on review comments from Alex:
>>>>      - Make MQD functions GEN and IP specific
>>>>
>>>> V2: Worked on review comments from Alex:
>>>>      - Reuse the existing adev->mqd[ip] for MQD creation
>>>>      - Formatting and arrangement of code
>>>>
>>>> V3:
>>>>      - Integration with doorbell manager
>>>>
>>>> V4: Review comments addressed:
>>>>      - Do not create a new file for userq, reuse gfx_v11_0.c (Alex)
>>>>      - Align name of structure members (Luben)
>>>>      - Don't break up the Cc tag list and the Sob tag list in commit
>>>>        message (Luben)
>>>>
>>>> Cc: Alex Deucher <alexander.deucher@amd.com>
>>>> Cc: Christian Koenig <christian.koenig@amd.com>
>>>> Signed-off-by: Shashank Sharma <shashank.sharma@amd.com>
>>>> Signed-off-by: Arvind Yadav <arvind.yadav@amd.com>
>>>> ---
>>>>   drivers/gpu/drm/amd/amdgpu/amdgpu_userqueue.c | 25 ++++++++
>>>>   drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c        | 57 
>>>> +++++++++++++++++++
>>>>   .../gpu/drm/amd/include/amdgpu_userqueue.h    |  7 +++
>>>>   3 files changed, 89 insertions(+)
>>>>
>>>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_userqueue.c 
>>>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_userqueue.c
>>>> index 333f31efbe7b..e95fb35b0cb5 100644
>>>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_userqueue.c
>>>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_userqueue.c
>>>> @@ -81,6 +81,14 @@ static int amdgpu_userqueue_create_gfx(struct 
>>>> drm_file *filp, union drm_amdgpu_u
>>>>           goto free_queue;
>>>>       }
>>>>   +    if (uq_mgr->userq_funcs[queue->queue_type]->mqd_create) {
>>>> +        r = 
>>>> uq_mgr->userq_funcs[queue->queue_type]->mqd_create(uq_mgr, queue);
>>>> +        if (r) {
>>>> +            DRM_ERROR("Failed to create/map userqueue MQD\n");
>>>> +            goto free_queue;
>>>> +        }
>>>> +    }
>>>> +
>>>>       args->out.queue_id = queue->queue_id;
>>>>       args->out.flags = 0;
>>>>       mutex_unlock(&uq_mgr->userq_mutex);
>>>> @@ -119,6 +127,8 @@ static void amdgpu_userqueue_destroy(struct 
>>>> drm_file *filp, int queue_id)
>>>>       }
>>>>         mutex_lock(&uq_mgr->userq_mutex);
>>>> +    if (uq_mgr->userq_funcs[queue->queue_type]->mqd_destroy)
>>>> + uq_mgr->userq_funcs[queue->queue_type]->mqd_destroy(uq_mgr, queue);
>>>>       amdgpu_userqueue_free_index(uq_mgr, queue->queue_id);
>>>>       mutex_unlock(&uq_mgr->userq_mutex);
>>>>       kfree(queue);
>>>> @@ -149,6 +159,20 @@ int amdgpu_userq_ioctl(struct drm_device *dev, 
>>>> void *data,
>>>>       return r;
>>>>   }
>>>>   +extern const struct amdgpu_userq_funcs userq_gfx_v11_funcs;
>>>> +
>>>> +static void
>>>> +amdgpu_userqueue_setup_ip_funcs(struct amdgpu_userq_mgr *uq_mgr)
>>>> +{
>>>> +    int maj;
>>>> +    struct amdgpu_device *adev = uq_mgr->adev;
>>>> +    uint32_t version = adev->ip_versions[GC_HWIP][0];
>>>> +
>>>> +    /* We support usermode queue only for GFX IP as of now */
>>>> +    maj = IP_VERSION_MAJ(version);
>>>> +    if (maj == 11)
>>>> +        uq_mgr->userq_funcs[AMDGPU_HW_IP_GFX] = &userq_gfx_v11_funcs;
>>>> +}
>>>>     int amdgpu_userq_mgr_init(struct amdgpu_userq_mgr *userq_mgr, 
>>>> struct amdgpu_device *adev)
>>>>   {
>>>> @@ -156,6 +180,7 @@ int amdgpu_userq_mgr_init(struct 
>>>> amdgpu_userq_mgr *userq_mgr, struct amdgpu_devi
>>>>       idr_init_base(&userq_mgr->userq_idr, 1);
>>>>       userq_mgr->adev = adev;
>>>>   +    amdgpu_userqueue_setup_ip_funcs(userq_mgr);
>>>>       return 0;
>>>>   }
>>>>   diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c 
>>>> b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
>>>> index a56c6e106d00..9f7b14966ac8 100644
>>>> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
>>>> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
>>>> @@ -30,6 +30,7 @@
>>>>   #include "amdgpu_psp.h"
>>>>   #include "amdgpu_smu.h"
>>>>   #include "amdgpu_atomfirmware.h"
>>>> +#include "amdgpu_userqueue.h"
>>>>   #include "imu_v11_0.h"
>>>>   #include "soc21.h"
>>>>   #include "nvd.h"
>>>> @@ -6404,3 +6405,59 @@ const struct amdgpu_ip_block_version 
>>>> gfx_v11_0_ip_block =
>>>>       .rev = 0,
>>>>       .funcs = &gfx_v11_0_ip_funcs,
>>>>   };
>>>> +
>>>> +static int
>>>> +gfx_v11_userq_mqd_create(struct amdgpu_userq_mgr *uq_mgr, struct 
>>>> amdgpu_usermode_queue *queue)
>>>> +{
>>>> +    struct amdgpu_device *adev = uq_mgr->adev;
>>>> +    struct amdgpu_userq_ctx_space *mqd = &queue->mqd;
>>>> +    struct amdgpu_mqd *gfx_v11_mqd = &adev->mqds[queue->queue_type];
>>>> +    int size = gfx_v11_mqd->mqd_size;
>>>> +    int r;
>>>> +
>>>> +    r = amdgpu_bo_create_kernel(adev, size, PAGE_SIZE,
>>>> +                    AMDGPU_GEM_DOMAIN_GTT,
>>>> +                    &mqd->obj,
>>>> +                    &mqd->gpu_addr,
>>>> +                    &mqd->cpu_ptr);
>>>> +    if (r) {
>>>> +        DRM_ERROR("Failed to allocate bo for userqueue (%d)", r);
>>>> +        return r;
>>>> +    }
>>>> +
>>>> +    memset(mqd->cpu_ptr, 0, size);
>>>> +    r = amdgpu_bo_reserve(mqd->obj, false);
>>>> +    if (unlikely(r != 0)) {
>>>> +        DRM_ERROR("Failed to reserve mqd for userqueue (%d)", r);
>>>> +        goto free_mqd;
>>>> +    }
>>>
>>> This reserve/unreserve dance here doesn't seem to make much sense. 
>>> Why do you do that?
>> We wanted to make sure that the MQD buffer is reserved until we fill 
>> it. Does it sound incorrect ?
>
> Yeah, that sounds strongly like we have some misunderstanding.
>
> Reserving a buffer is needed for two thing:
> 1. Prevent that it moves around.
> 2. Change some parameters of the BO.
>
> Since the BO is a pinned kernel BO neither of those two use cases 
> seems to be the case here.
>
> So why do you reserve the BO here?
>
I guess I missed the fact that Kernel BOs are already pinned, so we 
don't need this. I will remove this.

>>>
>>> Christian.
>>>
>>>> +
>>>> +    queue->userq_prop.use_doorbell = true;
>>>> +    queue->userq_prop.mqd_gpu_addr = mqd->gpu_addr;
>>>
>>> Are those the only two parameters needed? If yes we should probably 
>>> drop the userq_prop structure and give them directly.
>> In patch set 1 and 2, everything was getting stored directly in the 
>> queue, but then we decided to re-use the existing init_mqd() 
>> functions from each of the IP engines.
>>
>> If you see the prototype of mqd->init_mqd(), it expects userq_prop 
>> structure as input parameters, so we encapsulated a subset of queue 
>> to this structure.
>
> Yeah, the question is if the init_mqd() interface is a good idea or if 
> we should re-work that as well?

I think is a good idea and we should keep it. This makes sure that the 
same code gets executed with both usermode_queue MQD initialization and 
kernel level/KIQ queue init.

- Shashank

>
> Christian.
>
>>
>> - Shashank
>>
>>>
>>> Christian.
>>>
>>>> +    r = gfx_v11_mqd->init_mqd(adev, (void *)mqd->cpu_ptr, 
>>>> &queue->userq_prop);
>>>> +    amdgpu_bo_unreserve(mqd->obj);
>>>> +    if (r) {
>>>> +        DRM_ERROR("Failed to init MQD for queue\n");
>>>> +        goto free_mqd;
>>>> +    }
>>>> +
>>>> +    DRM_DEBUG_DRIVER("MQD for queue %d created\n", queue->queue_id);
>>>> +    return 0;
>>>> +
>>>> +free_mqd:
>>>> +    amdgpu_bo_free_kernel(&mqd->obj, &mqd->gpu_addr, &mqd->cpu_ptr);
>>>> +    return r;
>>>> +}
>>>> +
>>>> +static void
>>>> +gfx_v11_userq_mqd_destroy(struct amdgpu_userq_mgr *uq_mgr, struct 
>>>> amdgpu_usermode_queue *queue)
>>>> +{
>>>> +    struct amdgpu_userq_ctx_space *mqd = &queue->mqd;
>>>> +
>>>> +    amdgpu_bo_free_kernel(&mqd->obj, &mqd->gpu_addr, &mqd->cpu_ptr);
>>>> +}
>>>> +
>>>> +const struct amdgpu_userq_funcs userq_gfx_v11_funcs = {
>>>> +    .mqd_create = gfx_v11_userq_mqd_create,
>>>> +    .mqd_destroy = gfx_v11_userq_mqd_destroy,
>>>> +};
>>>> diff --git a/drivers/gpu/drm/amd/include/amdgpu_userqueue.h 
>>>> b/drivers/gpu/drm/amd/include/amdgpu_userqueue.h
>>>> index 8d8f6b3bcda5..e7da27918bd2 100644
>>>> --- a/drivers/gpu/drm/amd/include/amdgpu_userqueue.h
>>>> +++ b/drivers/gpu/drm/amd/include/amdgpu_userqueue.h
>>>> @@ -28,6 +28,12 @@
>>>>   #include "amdgpu.h"
>>>>   #define AMDGPU_MAX_USERQ 512
>>>>   +struct amdgpu_userq_ctx_space {
>>>> +    uint64_t     gpu_addr;
>>>> +    void         *cpu_ptr;
>>>> +    struct amdgpu_bo *obj;
>>>> +};
>>>> +
>>>>   struct amdgpu_usermode_queue {
>>>>       int            queue_id;
>>>>       int            queue_type;
>>>> @@ -36,6 +42,7 @@ struct amdgpu_usermode_queue {
>>>>       struct amdgpu_mqd_prop    userq_prop;
>>>>       struct amdgpu_userq_mgr *userq_mgr;
>>>>       struct amdgpu_vm    *vm;
>>>> +    struct amdgpu_userq_ctx_space mqd;
>>>>   };
>>>>     struct amdgpu_userq_funcs {
>>>
>

  reply	other threads:[~2023-04-25 17:02 UTC|newest]

Thread overview: 45+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-04-24 17:38 [PATCH v4 00/10] AMDGPU usermode queues Shashank Sharma
2023-04-24 17:38 ` [PATCH v4 01/10] drm/amdgpu: UAPI for user queue management Shashank Sharma
2023-05-19 21:03   ` Alex Deucher
2023-05-22  8:54     ` Shashank Sharma
2023-04-24 17:38 ` [PATCH v4 02/10] drm/amdgpu: add usermode queue base code Shashank Sharma
2023-04-25 12:03   ` Christian König
2023-04-25 12:19     ` Shashank Sharma
2023-04-24 17:38 ` [PATCH v4 03/10] drm/amdgpu: add new IOCTL for usermode queue Shashank Sharma
2023-04-25 12:14   ` Christian König
2023-04-25 12:21     ` Shashank Sharma
2023-04-24 17:38 ` [PATCH v4 04/10] drm/amdgpu: create GFX-gen11 MQD for userqueue Shashank Sharma
2023-04-25 12:27   ` Christian König
2023-04-25 13:10     ` Shashank Sharma
2023-04-25 13:45       ` Christian König
2023-04-25 17:02         ` Shashank Sharma [this message]
2023-05-19 21:19   ` Alex Deucher
2023-05-22  9:05     ` Shashank Sharma
2023-04-24 17:38 ` [PATCH v4 05/10] drm/amdgpu: create context space for usermode queue Shashank Sharma
2023-04-25 12:30   ` Christian König
2023-04-25 13:13     ` Shashank Sharma
2023-04-25 17:38       ` Deucher, Alexander
2023-04-25 20:00         ` Sharma, Shashank
2023-05-19 21:21   ` Alex Deucher
2023-05-22  9:05     ` Shashank Sharma
2023-04-24 17:38 ` [PATCH v4 06/10] drm/amdgpu: set FW parameters in v11_struct Shashank Sharma
2023-04-25 12:32   ` Christian König
2023-04-25 13:27     ` Shashank Sharma
2023-05-19 21:22   ` Alex Deucher
2023-05-22  9:06     ` Shashank Sharma
2023-04-24 17:38 ` [PATCH v4 07/10] drm/amdgpu: map usermode queue into MES Shashank Sharma
2023-04-25 12:34   ` Christian König
2023-04-25 13:31     ` Shashank Sharma
2023-04-25 15:33       ` Christian König
2023-04-25 16:56         ` Shashank Sharma
2023-05-19 21:22   ` Alex Deucher
2023-05-22  9:06     ` Shashank Sharma
2023-04-24 17:38 ` [PATCH v4 08/10] drm/amdgpu: map wptr BO into GART Shashank Sharma
2023-04-25 12:36   ` Christian König
2023-04-25 13:33     ` Shashank Sharma
2023-04-24 17:38 ` [PATCH v4 09/10] drm/amdgpu: generate doorbell index for userqueue Shashank Sharma
2023-04-25 12:38   ` Christian König
2023-04-25 13:34     ` Shashank Sharma
2023-04-24 17:38 ` [PATCH v4 10/10] drm/amdgpu: cleanup leftover queues Shashank Sharma
2023-04-25 12:40   ` Christian König
2023-04-25 13:34     ` Shashank Sharma

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=514f467c-e0c2-73a1-9623-6c046f80c859@amd.com \
    --to=shashank.sharma@amd.com \
    --cc=alexander.deucher@amd.com \
    --cc=amd-gfx@lists.freedesktop.org \
    --cc=arvind.yadav@amd.com \
    --cc=christian.koenig@amd.com \
    --cc=contactshashanksharma@gmail.com \
    --cc=pierre-eric.pelloux-prayer@amd.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox