From: Shashank Sharma <shashank.sharma@amd.com>
To: "Christian König" <christian.koenig@amd.com>,
amd-gfx@lists.freedesktop.org
Cc: Alex Deucher <alexander.deucher@amd.com>,
pierre-eric.pelloux-prayer@amd.com,
contactshashanksharma@gmail.com, arvind.yadav@amd.com
Subject: Re: [PATCH v4 03/10] drm/amdgpu: add new IOCTL for usermode queue
Date: Tue, 25 Apr 2023 14:21:04 +0200 [thread overview]
Message-ID: <e87e2e7f-bab7-2d1c-5c72-bb6282b0cf17@amd.com> (raw)
In-Reply-To: <c5b6ed37-7488-c693-0607-39fa16bcf32a@amd.com>
On 25/04/2023 14:14, Christian König wrote:
> Am 24.04.23 um 19:38 schrieb Shashank Sharma:
>> This patch adds:
>> - A new IOCTL function to create and destroy
>> - A new structure to keep all the user queue data in one place.
>> - A function to generate unique index for the queue.
>>
>> V1: Worked on review comments from RFC patch series:
>> - Alex: Keep a list of queues, instead of single queue per process.
>> - Christian: Use the queue manager instead of global ptrs,
>> Don't keep the queue structure in amdgpu_ctx
>>
>> V2: Worked on review comments:
>> - Christian:
>> - Formatting of text
>> - There is no need for queuing of userqueues, with idr in place
>> - Alex:
>> - Remove use_doorbell, its unnecessary
>> - Reuse amdgpu_mqd_props for saving mqd fields
>>
>> - Code formatting and re-arrangement
>>
>> V3:
>> - Integration with doorbell manager
>>
>> V4:
>> - Accommodate MQD union related changes in UAPI (Alex)
>> - Do not set the queue size twice (Bas)
>>
>> Cc: Alex Deucher <alexander.deucher@amd.com>
>> Cc: Christian Koenig <christian.koenig@amd.com>
>> Signed-off-by: Shashank Sharma <shashank.sharma@amd.com>
>> ---
>> drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 1 +
>> drivers/gpu/drm/amd/amdgpu/amdgpu_userqueue.c | 126 ++++++++++++++++++
>> .../gpu/drm/amd/include/amdgpu_userqueue.h | 2 +
>> 3 files changed, 129 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
>> index 2d6bcfd727c8..229976a2d0e7 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
>> @@ -2749,6 +2749,7 @@ const struct drm_ioctl_desc amdgpu_ioctls_kms[]
>> = {
>> DRM_IOCTL_DEF_DRV(AMDGPU_GEM_VA, amdgpu_gem_va_ioctl,
>> DRM_AUTH|DRM_RENDER_ALLOW),
>> DRM_IOCTL_DEF_DRV(AMDGPU_GEM_OP, amdgpu_gem_op_ioctl,
>> DRM_AUTH|DRM_RENDER_ALLOW),
>> DRM_IOCTL_DEF_DRV(AMDGPU_GEM_USERPTR, amdgpu_gem_userptr_ioctl,
>> DRM_AUTH|DRM_RENDER_ALLOW),
>> + DRM_IOCTL_DEF_DRV(AMDGPU_USERQ, amdgpu_userq_ioctl,
>> DRM_AUTH|DRM_RENDER_ALLOW),
>> };
>> static const struct drm_driver amdgpu_kms_driver = {
>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_userqueue.c
>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_userqueue.c
>> index effc0c7c02cf..333f31efbe7b 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_userqueue.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_userqueue.c
>> @@ -23,6 +23,132 @@
>> */
>> #include "amdgpu.h"
>> +#include "amdgpu_vm.h"
>> +#include "amdgpu_userqueue.h"
>> +
>> +static inline int
>> +amdgpu_userqueue_index(struct amdgpu_userq_mgr *uq_mgr, struct
>> amdgpu_usermode_queue *queue)
>
> Maybe call that handle instead of index. And I don't think you
> actually need those wrapper functions, see below.
>
>> +{
>> + return idr_alloc(&uq_mgr->userq_idr, queue, 1, AMDGPU_MAX_USERQ,
>> GFP_KERNEL);
>> +}
>> +
>> +static inline void
>> +amdgpu_userqueue_free_index(struct amdgpu_userq_mgr *uq_mgr, int
>> queue_id)
>> +{
>> + idr_remove(&uq_mgr->userq_idr, queue_id);
>> +}
>> +
>> +static struct amdgpu_usermode_queue *
>> +amdgpu_userqueue_find(struct amdgpu_userq_mgr *uq_mgr, int qid)
>> +{
>> + return idr_find(&uq_mgr->userq_idr, qid);
>> +}
>> +
>> +static int amdgpu_userqueue_create_gfx(struct drm_file *filp, union
>> drm_amdgpu_userq *args)
>> +{
>> + struct amdgpu_usermode_queue *queue;
>> + struct amdgpu_fpriv *fpriv = filp->driver_priv;
>> + struct amdgpu_userq_mgr *uq_mgr = &fpriv->userq_mgr;
>> + struct drm_amdgpu_userq_mqd_gfx *mqd_in = &args->in.mqd.gfx;
>> + int r;
>> +
>> + /* Do we support usermode queues on this GFX IP ? */
>> + if (!uq_mgr->userq_funcs[AMDGPU_HW_IP_GFX]) {
>> + DRM_ERROR("Usermode queue is not supported for this GFX IP\n");
>> + return -EINVAL;
>> + }
>> +
>> + queue = kzalloc(sizeof(struct amdgpu_usermode_queue), GFP_KERNEL);
>> + if (!queue) {
>> + DRM_ERROR("Failed to allocate memory for queue\n");
>> + return -ENOMEM;
>> + }
>> +
>> + mutex_lock(&uq_mgr->userq_mutex);
>> + queue->userq_prop.wptr_gpu_addr = mqd_in->wptr_va;
>> + queue->userq_prop.rptr_gpu_addr = mqd_in->rptr_va;
>> + queue->userq_prop.queue_size = mqd_in->queue_size;
>> + queue->userq_prop.hqd_base_gpu_addr = mqd_in->queue_va;
>> +
>> + queue->doorbell_handle = mqd_in->doorbell_handle;
>> + queue->queue_type = AMDGPU_HW_IP_GFX;
>> + queue->flags = mqd_in->flags;
>> + queue->vm = &fpriv->vm;
>> + queue->queue_id = amdgpu_userqueue_index(uq_mgr, queue);
>
> It is usually good practice to *not* store those handles inside the
> object they refer to, background is that this always creates a circle
> reference (handle->object, object->handle).
>
> Additional to that I would move registering the userspace handle out
> of this function.
I guess idr should be good enough to get me the queue ptr, and I don't
have to save the queue id in queue.
>
>> + if (queue->queue_id < 0) {
>> + DRM_ERROR("Failed to allocate a queue id\n");
>> + r = queue->queue_id;
>> + goto free_queue;
>> + }
>> +
>> + args->out.queue_id = queue->queue_id;
>> + args->out.flags = 0;
>> + mutex_unlock(&uq_mgr->userq_mutex);
>> + return 0;
>> +
>> +free_queue:
>> + mutex_unlock(&uq_mgr->userq_mutex);
>> + kfree(queue);
>> + return r;
>> +}
>> +
>> +static int amdgpu_userqueue_create(struct drm_file *filp, union
>> drm_amdgpu_userq *args)
>> +{
>> + u32 ip_type = args->in.ip_type;
>> +
>> + switch (ip_type) {
>> + case AMDGPU_HW_IP_GFX:
>> + return amdgpu_userqueue_create_gfx(filp, args);
>> + default:
>> + DRM_ERROR("Usermode queue is not supported for this IP
>> (%u)\n", ip_type);
>> + }
>
> Instead insert the idr_alloc() or more generally handle alloc here.
Noted,
- Shashank
>
> Christian.
>
>> +
>> + return -EINVAL;
>> +}
>> +
>> +static void amdgpu_userqueue_destroy(struct drm_file *filp, int
>> queue_id)
>> +{
>> + struct amdgpu_fpriv *fpriv = filp->driver_priv;
>> + struct amdgpu_userq_mgr *uq_mgr = &fpriv->userq_mgr;
>> + struct amdgpu_usermode_queue *queue;
>> +
>> + queue = amdgpu_userqueue_find(uq_mgr, queue_id);
>> + if (!queue) {
>> + DRM_DEBUG_DRIVER("Invalid queue id to destroy\n");
>> + return;
>> + }
>> +
>> + mutex_lock(&uq_mgr->userq_mutex);
>> + amdgpu_userqueue_free_index(uq_mgr, queue->queue_id);
>> + mutex_unlock(&uq_mgr->userq_mutex);
>> + kfree(queue);
>> +}
>> +
>> +int amdgpu_userq_ioctl(struct drm_device *dev, void *data,
>> + struct drm_file *filp)
>> +{
>> + union drm_amdgpu_userq *args = data;
>> + int r = 0;
>> +
>> + switch (args->in.op) {
>> + case AMDGPU_USERQ_OP_CREATE:
>> + r = amdgpu_userqueue_create(filp, args);
>> + if (r)
>> + DRM_ERROR("Failed to create usermode queue\n");
>> + break;
>> +
>> + case AMDGPU_USERQ_OP_FREE:
>> + amdgpu_userqueue_destroy(filp, args->in.queue_id);
>> + break;
>> +
>> + default:
>> + DRM_ERROR("Invalid user queue op specified: %d\n",
>> args->in.op);
>> + return -EINVAL;
>> + }
>> +
>> + return r;
>> +}
>> +
>> int amdgpu_userq_mgr_init(struct amdgpu_userq_mgr *userq_mgr,
>> struct amdgpu_device *adev)
>> {
>> diff --git a/drivers/gpu/drm/amd/include/amdgpu_userqueue.h
>> b/drivers/gpu/drm/amd/include/amdgpu_userqueue.h
>> index 6fe5d8d73f37..8d8f6b3bcda5 100644
>> --- a/drivers/gpu/drm/amd/include/amdgpu_userqueue.h
>> +++ b/drivers/gpu/drm/amd/include/amdgpu_userqueue.h
>> @@ -43,6 +43,8 @@ struct amdgpu_userq_funcs {
>> void (*mqd_destroy)(struct amdgpu_userq_mgr *uq_mgr, struct
>> amdgpu_usermode_queue *uq);
>> };
>> +int amdgpu_userq_ioctl(struct drm_device *dev, void *data, struct
>> drm_file *filp);
>> +
>> int amdgpu_userq_mgr_init(struct amdgpu_userq_mgr *userq_mgr,
>> struct amdgpu_device *adev);
>> void amdgpu_userq_mgr_fini(struct amdgpu_userq_mgr *userq_mgr);
>
next prev parent reply other threads:[~2023-04-25 12:21 UTC|newest]
Thread overview: 45+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-04-24 17:38 [PATCH v4 00/10] AMDGPU usermode queues Shashank Sharma
2023-04-24 17:38 ` [PATCH v4 01/10] drm/amdgpu: UAPI for user queue management Shashank Sharma
2023-05-19 21:03 ` Alex Deucher
2023-05-22 8:54 ` Shashank Sharma
2023-04-24 17:38 ` [PATCH v4 02/10] drm/amdgpu: add usermode queue base code Shashank Sharma
2023-04-25 12:03 ` Christian König
2023-04-25 12:19 ` Shashank Sharma
2023-04-24 17:38 ` [PATCH v4 03/10] drm/amdgpu: add new IOCTL for usermode queue Shashank Sharma
2023-04-25 12:14 ` Christian König
2023-04-25 12:21 ` Shashank Sharma [this message]
2023-04-24 17:38 ` [PATCH v4 04/10] drm/amdgpu: create GFX-gen11 MQD for userqueue Shashank Sharma
2023-04-25 12:27 ` Christian König
2023-04-25 13:10 ` Shashank Sharma
2023-04-25 13:45 ` Christian König
2023-04-25 17:02 ` Shashank Sharma
2023-05-19 21:19 ` Alex Deucher
2023-05-22 9:05 ` Shashank Sharma
2023-04-24 17:38 ` [PATCH v4 05/10] drm/amdgpu: create context space for usermode queue Shashank Sharma
2023-04-25 12:30 ` Christian König
2023-04-25 13:13 ` Shashank Sharma
2023-04-25 17:38 ` Deucher, Alexander
2023-04-25 20:00 ` Sharma, Shashank
2023-05-19 21:21 ` Alex Deucher
2023-05-22 9:05 ` Shashank Sharma
2023-04-24 17:38 ` [PATCH v4 06/10] drm/amdgpu: set FW parameters in v11_struct Shashank Sharma
2023-04-25 12:32 ` Christian König
2023-04-25 13:27 ` Shashank Sharma
2023-05-19 21:22 ` Alex Deucher
2023-05-22 9:06 ` Shashank Sharma
2023-04-24 17:38 ` [PATCH v4 07/10] drm/amdgpu: map usermode queue into MES Shashank Sharma
2023-04-25 12:34 ` Christian König
2023-04-25 13:31 ` Shashank Sharma
2023-04-25 15:33 ` Christian König
2023-04-25 16:56 ` Shashank Sharma
2023-05-19 21:22 ` Alex Deucher
2023-05-22 9:06 ` Shashank Sharma
2023-04-24 17:38 ` [PATCH v4 08/10] drm/amdgpu: map wptr BO into GART Shashank Sharma
2023-04-25 12:36 ` Christian König
2023-04-25 13:33 ` Shashank Sharma
2023-04-24 17:38 ` [PATCH v4 09/10] drm/amdgpu: generate doorbell index for userqueue Shashank Sharma
2023-04-25 12:38 ` Christian König
2023-04-25 13:34 ` Shashank Sharma
2023-04-24 17:38 ` [PATCH v4 10/10] drm/amdgpu: cleanup leftover queues Shashank Sharma
2023-04-25 12:40 ` Christian König
2023-04-25 13:34 ` Shashank Sharma
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