From: "Sharma, Shashank" <shashank.sharma@amd.com>
To: "Christian König" <christian.koenig@amd.com>,
"Satyajit Sahu" <satyajit.sahu@amd.com>,
amd-gfx@lists.freedesktop.org
Cc: leo.liu@amd.com, Alexander.Deucher@amd.com, nirmoy.das@amd.com
Subject: Re: [PATCH 1/5] drm/sched:add new priority level
Date: Tue, 24 Aug 2021 14:02:47 +0530 [thread overview]
Message-ID: <53fb0d0b-e9c3-3a79-9b17-87e4297737bb@amd.com> (raw)
In-Reply-To: <66607af7-5310-629f-1851-df4b74cebf7d@amd.com>
Hi Christian,
I am a bit curious here.
I thought it would be a good idea to add a new SW priority level, so
that any other driver can also utilize this SW infrastructure.
So it could be like, if you have a HW which matches with SW priority
levels, directly map your HW queue to the SW priority level, like:
DRM_SCHED_PRIORITY_VERY_HIGH: mapped to a queue in HW reserved for real
time or very high priority tasks, which can't be missed
DRM_SCHED_PRIORITY_HIGH : mapped to a queue of High priority tasks, for
better experience, like encode/decode operations.
DRM_SCHED_PRIORITY_NORMAL: default, mapped to a queue of tasks without a
priority context specified
DRM_SCHED_PRIORITY_MIN: queue for specifically mentioned low priority tasks
Depending on the HW we are running on, we can map these SW queues to
corresponding HW queues, isn't it ?
Regards
Shashank
On 8/24/2021 11:40 AM, Christian König wrote:
> I haven't followed the previous discussion, but that looks like this
> change is based on a misunderstanding.
>
> Those here are the software priorities used in the scheduler, but what
> you are working on are the hardware priorities.
>
> That are two completely different things which we shouldn't mix up.
>
> Regards,
> Christian.
>
> Am 24.08.21 um 07:55 schrieb Satyajit Sahu:
>> Adding a new priority level DRM_SCHED_PRIORITY_VERY_HIGH
>>
>> Signed-off-by: Satyajit Sahu <satyajit.sahu@amd.com>
>> ---
>> include/drm/gpu_scheduler.h | 1 +
>> 1 file changed, 1 insertion(+)
>>
>> diff --git a/include/drm/gpu_scheduler.h b/include/drm/gpu_scheduler.h
>> index d18af49fd009..d0e5e234da5f 100644
>> --- a/include/drm/gpu_scheduler.h
>> +++ b/include/drm/gpu_scheduler.h
>> @@ -40,6 +40,7 @@ enum drm_sched_priority {
>> DRM_SCHED_PRIORITY_MIN,
>> DRM_SCHED_PRIORITY_NORMAL,
>> DRM_SCHED_PRIORITY_HIGH,
>> + DRM_SCHED_PRIORITY_VERY_HIGH,
>> DRM_SCHED_PRIORITY_KERNEL,
>> DRM_SCHED_PRIORITY_COUNT,
>
next prev parent reply other threads:[~2021-08-24 8:48 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-08-24 5:55 [PATCH 1/5] drm/sched:add new priority level Satyajit Sahu
2021-08-24 5:55 ` [PATCH 2/5] drm/amdgpu: map user set priority to drm sched priority Satyajit Sahu
2021-08-24 5:55 ` [PATCH 3/5] drm/amdgpu/vce:set vce ring priority level Satyajit Sahu
2021-08-24 6:09 ` Christian König
2021-08-24 5:55 ` [PATCH 4/5] drm/amdgpu/vcn:set vcn encode " Satyajit Sahu
2021-08-24 5:55 ` [PATCH 5/5] drm/amdgpu/vcn/vce:schedule encode job based on priorrity Satyajit Sahu
2021-08-24 6:14 ` Christian König
2021-08-24 6:10 ` [PATCH 1/5] drm/sched:add new priority level Christian König
2021-08-24 8:32 ` Sharma, Shashank [this message]
2021-08-24 8:55 ` Christian König
2021-08-24 9:45 ` Sharma, Shashank
2021-08-24 11:56 ` Christian König
2021-08-24 11:57 ` Das, Nirmoy
2021-08-24 12:07 ` Christian König
2021-08-24 12:39 ` Das, Nirmoy
2021-08-24 13:18 ` Christian König
2021-08-24 13:23 ` Das, Nirmoy
-- strict thread matches above, loose matches on Subject: below --
2021-08-24 5:52 Satyajit Sahu
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