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From: "Christian König" <christian.koenig@amd.com>
To: Satyajit Sahu <satyajit.sahu@amd.com>, amd-gfx@lists.freedesktop.org
Cc: leo.liu@amd.com, Alexander.Deucher@amd.com,
	shashank.sharma@amd.com, nirmoy.das@amd.com
Subject: Re: [PATCH 3/5] drm/amdgpu/vce:set vce ring priority level
Date: Tue, 24 Aug 2021 08:09:53 +0200	[thread overview]
Message-ID: <d011b9a8-d5bb-a349-dfc7-22941999c2d0@amd.com> (raw)
In-Reply-To: <20210824055510.1189185-3-satyajit.sahu@amd.com>



Am 24.08.21 um 07:55 schrieb Satyajit Sahu:
> There are multiple rings available in VCE. Map each ring
> to different priority.
>
> Signed-off-by: Satyajit Sahu <satyajit.sahu@amd.com>
> ---
>   drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c | 14 ++++++++++++++
>   drivers/gpu/drm/amd/amdgpu/amdgpu_vce.h | 15 +++++++++++++++
>   2 files changed, 29 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c
> index 1ae7f824adc7..379f27f14b39 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c
> @@ -1168,3 +1168,17 @@ int amdgpu_vce_ring_test_ib(struct amdgpu_ring *ring, long timeout)
>   	amdgpu_bo_free_kernel(&bo, NULL, NULL);
>   	return r;
>   }
> +
> +enum vce_enc_ring_priority get_vce_ring_prio(int index)

Please name the function amdgpu_vce_...

Same for VCN as well.

Regards,
Christian.

> +{
> +	switch(index) {
> +	case AMDGPU_VCE_GENERAL_PURPOSE:
> +		return AMDGPU_VCE_ENC_PRIO_NORMAL;
> +	case AMDGPU_VCE_LOW_LATENCY:
> +		return AMDGPU_VCE_ENC_PRIO_HIGH;
> +	case AMDGPU_VCE_REALTIME:
> +		return AMDGPU_VCE_ENC_PRIO_VERY_HIGH;
> +	default:
> +		return AMDGPU_VCE_ENC_PRIO_NORMAL;
> +	}
> +}
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.h
> index d6d83a3ec803..3cb34ee3e4b6 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.h
> @@ -32,6 +32,19 @@
>   
>   #define AMDGPU_VCE_FW_53_45	((53 << 24) | (45 << 16))
>   
> +enum vce_enc_ring_priority {
> +	AMDGPU_VCE_ENC_PRIO_NORMAL = 1,
> +	AMDGPU_VCE_ENC_PRIO_HIGH,
> +	AMDGPU_VCE_ENC_PRIO_VERY_HIGH,
> +	AMDGPU_VCE_ENC_PRIO_MAX
> +};
> +
> +enum vce_enc_ring_type {
> +	AMDGPU_VCE_GENERAL_PURPOSE,
> +	AMDGPU_VCE_LOW_LATENCY,
> +	AMDGPU_VCE_REALTIME
> +};
> +
>   struct amdgpu_vce {
>   	struct amdgpu_bo	*vcpu_bo;
>   	uint64_t		gpu_addr;
> @@ -72,4 +85,6 @@ void amdgpu_vce_ring_end_use(struct amdgpu_ring *ring);
>   unsigned amdgpu_vce_ring_get_emit_ib_size(struct amdgpu_ring *ring);
>   unsigned amdgpu_vce_ring_get_dma_frame_size(struct amdgpu_ring *ring);
>   
> +enum vce_enc_ring_priority get_vce_ring_prio(int index);
> +
>   #endif


  reply	other threads:[~2021-08-24  6:10 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-08-24  5:55 [PATCH 1/5] drm/sched:add new priority level Satyajit Sahu
2021-08-24  5:55 ` [PATCH 2/5] drm/amdgpu: map user set priority to drm sched priority Satyajit Sahu
2021-08-24  5:55 ` [PATCH 3/5] drm/amdgpu/vce:set vce ring priority level Satyajit Sahu
2021-08-24  6:09   ` Christian König [this message]
2021-08-24  5:55 ` [PATCH 4/5] drm/amdgpu/vcn:set vcn encode " Satyajit Sahu
2021-08-24  5:55 ` [PATCH 5/5] drm/amdgpu/vcn/vce:schedule encode job based on priorrity Satyajit Sahu
2021-08-24  6:14   ` Christian König
2021-08-24  6:10 ` [PATCH 1/5] drm/sched:add new priority level Christian König
2021-08-24  8:32   ` Sharma, Shashank
2021-08-24  8:55     ` Christian König
2021-08-24  9:45       ` Sharma, Shashank
2021-08-24 11:56         ` Christian König
2021-08-24 11:57   ` Das, Nirmoy
2021-08-24 12:07     ` Christian König
2021-08-24 12:39       ` Das, Nirmoy
2021-08-24 13:18         ` Christian König
2021-08-24 13:23           ` Das, Nirmoy

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