From: Darren Salt <devspam@moreofthesa.me.uk>
To: christian.koenig@amd.com
Cc: amd-gfx@lists.freedesktop.org
Subject: Re: [PATCH] amdgpu: resize BAR0 to the maximum available size, even if it doesn't cover VRAM
Date: Thu, 10 Dec 2020 13:59:25 +0000 [thread overview]
Message-ID: <58E21FF244%devspam@moreofthesa.me.uk> (raw)
In-Reply-To: <621ae252-ab39-383e-61a9-746fb47c6e01@gmail.com>
[-- Attachment #1: Type: text/plain, Size: 1420 bytes --]
I demand that Christian König may or may not have written...
> Am 10.12.20 um 01:57 schrieb Darren Salt:
>> This allows BAR0 resizing to be done for cards which don't advertise
>> support for a size large enough to cover the VRAM but which do advertise
>> at least one size larger than the default. For example, my RX 5600 XT,
>> which advertises 256MB, 512MB and 1GB.
> I've never seen such a configuration except for engineering samples. Can
> you send me a dump of the relevant PCI configuration space?
“lspci -nn -v -xxxx” output is attached. (Sapphire RX 5600 XT Pulse; not an
early one.)
My current kernel has another patch, applied on top of this patch, which
allows ignoring the size list. As such, that BAR is currently 8GB instead of
the 1GB which it should be. I've not noticed any significant problems as yet.
If the card should be advertising larger sizes too then its VBIOS needs
fixing; but as a lot of these already out there won't get that fix, some sort
of override (quirk, I expect, with a module option for cards not covered)
would, I think, be warranted.
> In general we could do this, but instead of just blindly trying
> different values we should just pick a supported one in the first place.
By using pci_rebar_get_possible_sizes() etc.? That looks reasonable to me.
It'll also require some patching in the PCI subsystem to expose relevant
functions.
[-- Attachment #2: gpu-lspci-dump.txt --]
[-- Type: text/plain, Size: 15122 bytes --]
28:00.0 VGA compatible controller [0300]: Advanced Micro Devices, Inc. [AMD/ATI] Device [1002:731f] (rev ca) (prog-if 00 [VGA controller])
Subsystem: Sapphire Technology Limited Device [1da2:e416]
Flags: bus master, fast devsel, latency 0, IRQ 41
Memory at 600000000 (64-bit, prefetchable) [size=8G]
Memory at 500000000 (64-bit, prefetchable) [size=256M]
I/O ports at e000 [size=256]
Memory at fcb00000 (32-bit, non-prefetchable) [size=512K]
Expansion ROM at fcb80000 [disabled] [size=128K]
Capabilities: [48] Vendor Specific Information: Len=08 <?>
Capabilities: [50] Power Management version 3
Capabilities: [64] Express Legacy Endpoint, MSI 00
Capabilities: [a0] MSI: Enable+ Count=1/1 Maskable- 64bit+
Capabilities: [100] Vendor Specific Information: ID=0001 Rev=1 Len=010 <?>
Capabilities: [150] Advanced Error Reporting
Capabilities: [200] #15
Capabilities: [240] Power Budgeting <?>
Capabilities: [270] #19
Capabilities: [2a0] Access Control Services
Capabilities: [2b0] Address Translation Service (ATS)
Capabilities: [2c0] Page Request Interface (PRI)
Capabilities: [2d0] Process Address Space ID (PASID)
Capabilities: [320] Latency Tolerance Reporting
Capabilities: [400] #25
Capabilities: [410] #26
Capabilities: [440] #27
Kernel driver in use: amdgpu
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[-- Attachment #3: Type: text/plain, Size: 154 bytes --]
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next prev parent reply other threads:[~2020-12-10 15:02 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-12-10 0:57 [PATCH] amdgpu: resize BAR0 to the maximum available size, even if it doesn't cover VRAM Darren Salt
2020-12-10 10:17 ` Christian König
2020-12-10 13:59 ` Darren Salt [this message]
2020-12-10 20:41 ` Christian König
2020-12-11 1:42 ` Darren Salt
2020-12-11 16:46 ` Christian König
2020-12-11 19:48 ` Darren Salt
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