[PATCH] drm/amd/pm set pp_dpm_*clk as read only for SRIOV one VF mode

[PATCH] drm/amd/pm set pp_dpm_*clk as read only for SRIOV one VF mode

[Lin.Cao]

pp_dpm_*clk should be set as read only for SRIOV one VF mode, remove
S_IWUGO flag and _store function of these debugfs in one VF mode.

Signed-off-by: Lin.Cao <lincao12@amd.com>
---
 drivers/gpu/drm/amd/pm/amdgpu_pm.c | 10 +++++++++-
 1 file changed, 9 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/pm/amdgpu_pm.c b/drivers/gpu/drm/amd/pm/amdgpu_pm.c
index efc631bddf4a..2883a1d873ab 100644
--- a/drivers/gpu/drm/amd/pm/amdgpu_pm.c
+++ b/drivers/gpu/drm/amd/pm/amdgpu_pm.c
@@ -2367,7 +2367,15 @@ static int default_attr_update(struct amdgpu_device *adev, struct amdgpu_device_
 	}
 
 	/* setting should not be allowed from VF if not in one VF mode */
-	if (amdgpu_sriov_vf(adev) && !amdgpu_sriov_is_pp_one_vf(adev)) {
+	if (amdgpu_sriov_vf(adev) && (!amdgpu_sriov_is_pp_one_vf(adev) ||
+		DEVICE_ATTR_IS(pp_dpm_sclk) ||
+		DEVICE_ATTR_IS(pp_dpm_mclk) ||
+		DEVICE_ATTR_IS(pp_dpm_socclk) ||
+		DEVICE_ATTR_IS(pp_dpm_fclk) ||
+		DEVICE_ATTR_IS(pp_dpm_vclk) ||
+		DEVICE_ATTR_IS(pp_dpm_vclk1) ||
+		DEVICE_ATTR_IS(pp_dpm_dclk) ||
+		DEVICE_ATTR_IS(pp_dpm_dclk1))) {
 		dev_attr->attr.mode &= ~S_IWUGO;
 		dev_attr->store = NULL;
 	}
-- 
2.25.1

Re: [PATCH] drm/amd/pm set pp_dpm_*clk as read only for SRIOV one VF mode

[JingWen Chen]

Acked-by: Jingwen Chen <Jingwen.Chen2@amd.com>

On 2024/3/15 14:31, Lin.Cao wrote:
> pp_dpm_*clk should be set as read only for SRIOV one VF mode, remove
> S_IWUGO flag and _store function of these debugfs in one VF mode.
>
> Signed-off-by: Lin.Cao <lincao12@amd.com>
> ---
>  drivers/gpu/drm/amd/pm/amdgpu_pm.c | 10 +++++++++-
>  1 file changed, 9 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/amd/pm/amdgpu_pm.c b/drivers/gpu/drm/amd/pm/amdgpu_pm.c
> index efc631bddf4a..2883a1d873ab 100644
> --- a/drivers/gpu/drm/amd/pm/amdgpu_pm.c
> +++ b/drivers/gpu/drm/amd/pm/amdgpu_pm.c
> @@ -2367,7 +2367,15 @@ static int default_attr_update(struct amdgpu_device *adev, struct amdgpu_device_
>  	}
>  
>  	/* setting should not be allowed from VF if not in one VF mode */
> -	if (amdgpu_sriov_vf(adev) && !amdgpu_sriov_is_pp_one_vf(adev)) {
> +	if (amdgpu_sriov_vf(adev) && (!amdgpu_sriov_is_pp_one_vf(adev) ||
> +		DEVICE_ATTR_IS(pp_dpm_sclk) ||
> +		DEVICE_ATTR_IS(pp_dpm_mclk) ||
> +		DEVICE_ATTR_IS(pp_dpm_socclk) ||
> +		DEVICE_ATTR_IS(pp_dpm_fclk) ||
> +		DEVICE_ATTR_IS(pp_dpm_vclk) ||
> +		DEVICE_ATTR_IS(pp_dpm_vclk1) ||
> +		DEVICE_ATTR_IS(pp_dpm_dclk) ||
> +		DEVICE_ATTR_IS(pp_dpm_dclk1))) {
>  		dev_attr->attr.mode &= ~S_IWUGO;
>  		dev_attr->store = NULL;
>  	}

-- 
Best Regards,
JingWen Chen