Re: [PATCH v3 2/5] Documentation/gpu: Add new glossary entries from UMR

["Christian König" <christian.koenig@amd.com>]

On 10/20/25 21:38, Rodrigo Siqueira wrote:
> When using UMR, a dashboard is available that displays the CPC, CPF,
> CPG, TCP, and UTCL utilization. This commit introduces the meanings of
> those acronyms (and others) to the glossary to improve the comprehension
> of the UMR dashboard.
> 
> Cc: Alex Deucher <alexander.deucher@amd.com>
> Cc: Christian König <christian.koenig@amd.com>
> Cc: Timur Kristóf <timur.kristof@gmail.com>
> Signed-off-by: Rodrigo Siqueira <siqueira@igalia.com>
> ---
>  Documentation/gpu/amdgpu/amdgpu-glossary.rst | 21 ++++++++++++++++++++
>  1 file changed, 21 insertions(+)
> 
> diff --git a/Documentation/gpu/amdgpu/amdgpu-glossary.rst b/Documentation/gpu/amdgpu/amdgpu-glossary.rst
> index 30812d9d53c6..eb72e6f6d4f1 100644
> --- a/Documentation/gpu/amdgpu/amdgpu-glossary.rst
> +++ b/Documentation/gpu/amdgpu/amdgpu-glossary.rst
> @@ -30,6 +30,15 @@ we have a dedicated glossary for Display Core at
>      CP
>        Command Processor
>  
> +    CPC
> +      Command Processor Compute
> +
> +    CPF
> +      Command Processor Fetch
> +
> +    CPG
> +      Command Processor Graphics
> +
>      CPLIB
>        Content Protection Library
>  
> @@ -78,6 +87,9 @@ we have a dedicated glossary for Display Core at
>      GMC
>        Graphic Memory Controller
>  
> +    GPR
> +      General Purpose Register
> +
>      GPUVM
>        GPU Virtual Memory.  This is the GPU's MMU.  The GPU supports multiple
>        virtual address spaces that can be in flight at any given time.  These
> @@ -92,6 +104,9 @@ we have a dedicated glossary for Display Core at
>        table for use by the kernel driver or into per process GPUVM page tables
>        for application usage.
>  
> +    GWS
> +      Global Wave Syncs
> +
>      IH
>        Interrupt Handler
>  

BTW we are missing an entry for "IV Interrupt Vector (the bytes written by the GPU into IH ring buffer)".

> @@ -206,12 +221,18 @@ we have a dedicated glossary for Display Core at
>      TC
>        Texture Cache
>  
> +    TCP (AMDGPU)
> +      Texture Cache Processing
> +
>      TOC
>        Table of Contents
>  
>      UMSCH
>        User Mode Scheduler
>  
> +    UTCL
> +      Universal Texture Cache Line
> +

Mhm, UTCL0 UTCL1 and UTCL2 are usually Universal Translation Cache Layer 0-2.

That is not even remotely related to texturing (well UTC requests also go through the TC on some HW generations, but that's basically it).

Regards,
Christian.

>      UVD
>        Unified Video Decoder
>