From: Andrii Nakryiko <andrii@kernel.org>
To: <bpf@vger.kernel.org>, <ast@kernel.org>, <daniel@iogearbox.net>,
<martin.lau@kernel.org>
Cc: <andrii@kernel.org>, <kernel-team@meta.com>,
Eduard Zingerman <eddyz87@gmail.com>
Subject: [PATCH v6 bpf-next 15/17] bpf: unify 32-bit and 64-bit is_branch_taken logic
Date: Wed, 1 Nov 2023 20:37:57 -0700 [thread overview]
Message-ID: <20231102033759.2541186-16-andrii@kernel.org> (raw)
In-Reply-To: <20231102033759.2541186-1-andrii@kernel.org>
Combine 32-bit and 64-bit is_branch_taken logic for SCALAR_VALUE
registers. It makes it easier to see parallels between two domains
(32-bit and 64-bit), and makes subsequent refactoring more
straightforward.
No functional changes.
Acked-by: Eduard Zingerman <eddyz87@gmail.com>
Signed-off-by: Andrii Nakryiko <andrii@kernel.org>
---
kernel/bpf/verifier.c | 200 +++++++++++++-----------------------------
1 file changed, 59 insertions(+), 141 deletions(-)
diff --git a/kernel/bpf/verifier.c b/kernel/bpf/verifier.c
index d5213cef5389..b077dd99b159 100644
--- a/kernel/bpf/verifier.c
+++ b/kernel/bpf/verifier.c
@@ -14183,166 +14183,86 @@ static u64 reg_const_value(struct bpf_reg_state *reg, bool subreg32)
/*
* <reg1> <op> <reg2>, currently assuming reg2 is a constant
*/
-static int is_branch32_taken(struct bpf_reg_state *reg1, struct bpf_reg_state *reg2, u8 opcode)
+static int is_scalar_branch_taken(struct bpf_reg_state *reg1, struct bpf_reg_state *reg2,
+ u8 opcode, bool is_jmp32)
{
- struct tnum subreg = tnum_subreg(reg1->var_off);
- u32 val = (u32)tnum_subreg(reg2->var_off).value;
- s32 sval = (s32)val;
+ struct tnum t1 = is_jmp32 ? tnum_subreg(reg1->var_off) : reg1->var_off;
+ u64 umin1 = is_jmp32 ? (u64)reg1->u32_min_value : reg1->umin_value;
+ u64 umax1 = is_jmp32 ? (u64)reg1->u32_max_value : reg1->umax_value;
+ s64 smin1 = is_jmp32 ? (s64)reg1->s32_min_value : reg1->smin_value;
+ s64 smax1 = is_jmp32 ? (s64)reg1->s32_max_value : reg1->smax_value;
+ u64 uval = is_jmp32 ? (u32)tnum_subreg(reg2->var_off).value : reg2->var_off.value;
+ s64 sval = is_jmp32 ? (s32)uval : (s64)uval;
switch (opcode) {
case BPF_JEQ:
- if (tnum_is_const(subreg))
- return !!tnum_equals_const(subreg, val);
- else if (val < reg1->u32_min_value || val > reg1->u32_max_value)
+ if (tnum_is_const(t1))
+ return !!tnum_equals_const(t1, uval);
+ else if (uval < umin1 || uval > umax1)
return 0;
- else if (sval < reg1->s32_min_value || sval > reg1->s32_max_value)
+ else if (sval < smin1 || sval > smax1)
return 0;
break;
case BPF_JNE:
- if (tnum_is_const(subreg))
- return !tnum_equals_const(subreg, val);
- else if (val < reg1->u32_min_value || val > reg1->u32_max_value)
+ if (tnum_is_const(t1))
+ return !tnum_equals_const(t1, uval);
+ else if (uval < umin1 || uval > umax1)
return 1;
- else if (sval < reg1->s32_min_value || sval > reg1->s32_max_value)
+ else if (sval < smin1 || sval > smax1)
return 1;
break;
case BPF_JSET:
- if ((~subreg.mask & subreg.value) & val)
+ if ((~t1.mask & t1.value) & uval)
return 1;
- if (!((subreg.mask | subreg.value) & val))
+ if (!((t1.mask | t1.value) & uval))
return 0;
break;
case BPF_JGT:
- if (reg1->u32_min_value > val)
+ if (umin1 > uval )
return 1;
- else if (reg1->u32_max_value <= val)
+ else if (umax1 <= uval)
return 0;
break;
case BPF_JSGT:
- if (reg1->s32_min_value > sval)
+ if (smin1 > sval)
return 1;
- else if (reg1->s32_max_value <= sval)
+ else if (smax1 <= sval)
return 0;
break;
case BPF_JLT:
- if (reg1->u32_max_value < val)
+ if (umax1 < uval)
return 1;
- else if (reg1->u32_min_value >= val)
+ else if (umin1 >= uval)
return 0;
break;
case BPF_JSLT:
- if (reg1->s32_max_value < sval)
+ if (smax1 < sval)
return 1;
- else if (reg1->s32_min_value >= sval)
+ else if (smin1 >= sval)
return 0;
break;
case BPF_JGE:
- if (reg1->u32_min_value >= val)
+ if (umin1 >= uval)
return 1;
- else if (reg1->u32_max_value < val)
+ else if (umax1 < uval)
return 0;
break;
case BPF_JSGE:
- if (reg1->s32_min_value >= sval)
+ if (smin1 >= sval)
return 1;
- else if (reg1->s32_max_value < sval)
+ else if (smax1 < sval)
return 0;
break;
case BPF_JLE:
- if (reg1->u32_max_value <= val)
+ if (umax1 <= uval)
return 1;
- else if (reg1->u32_min_value > val)
+ else if (umin1 > uval)
return 0;
break;
case BPF_JSLE:
- if (reg1->s32_max_value <= sval)
+ if (smax1 <= sval)
return 1;
- else if (reg1->s32_min_value > sval)
- return 0;
- break;
- }
-
- return -1;
-}
-
-
-/*
- * <reg1> <op> <reg2>, currently assuming reg2 is a constant
- */
-static int is_branch64_taken(struct bpf_reg_state *reg1, struct bpf_reg_state *reg2, u8 opcode)
-{
- u64 val = reg2->var_off.value;
- s64 sval = (s64)val;
-
- switch (opcode) {
- case BPF_JEQ:
- if (tnum_is_const(reg1->var_off))
- return !!tnum_equals_const(reg1->var_off, val);
- else if (val < reg1->umin_value || val > reg1->umax_value)
- return 0;
- else if (sval < reg1->smin_value || sval > reg1->smax_value)
- return 0;
- break;
- case BPF_JNE:
- if (tnum_is_const(reg1->var_off))
- return !tnum_equals_const(reg1->var_off, val);
- else if (val < reg1->umin_value || val > reg1->umax_value)
- return 1;
- else if (sval < reg1->smin_value || sval > reg1->smax_value)
- return 1;
- break;
- case BPF_JSET:
- if ((~reg1->var_off.mask & reg1->var_off.value) & val)
- return 1;
- if (!((reg1->var_off.mask | reg1->var_off.value) & val))
- return 0;
- break;
- case BPF_JGT:
- if (reg1->umin_value > val)
- return 1;
- else if (reg1->umax_value <= val)
- return 0;
- break;
- case BPF_JSGT:
- if (reg1->smin_value > sval)
- return 1;
- else if (reg1->smax_value <= sval)
- return 0;
- break;
- case BPF_JLT:
- if (reg1->umax_value < val)
- return 1;
- else if (reg1->umin_value >= val)
- return 0;
- break;
- case BPF_JSLT:
- if (reg1->smax_value < sval)
- return 1;
- else if (reg1->smin_value >= sval)
- return 0;
- break;
- case BPF_JGE:
- if (reg1->umin_value >= val)
- return 1;
- else if (reg1->umax_value < val)
- return 0;
- break;
- case BPF_JSGE:
- if (reg1->smin_value >= sval)
- return 1;
- else if (reg1->smax_value < sval)
- return 0;
- break;
- case BPF_JLE:
- if (reg1->umax_value <= val)
- return 1;
- else if (reg1->umin_value > val)
- return 0;
- break;
- case BPF_JSLE:
- if (reg1->smax_value <= sval)
- return 1;
- else if (reg1->smin_value > sval)
+ else if (smin1 > sval)
return 0;
break;
}
@@ -14456,9 +14376,7 @@ static int is_branch_taken(struct bpf_reg_state *reg1, struct bpf_reg_state *reg
}
}
- if (is_jmp32)
- return is_branch32_taken(reg1, reg2, opcode);
- return is_branch64_taken(reg1, reg2, opcode);
+ return is_scalar_branch_taken(reg1, reg2, opcode, is_jmp32);
}
/* Adjusts the register min/max values in the case that the dst_reg is the
@@ -14468,15 +14386,15 @@ static int is_branch_taken(struct bpf_reg_state *reg1, struct bpf_reg_state *reg
*/
static void reg_set_min_max(struct bpf_reg_state *true_reg,
struct bpf_reg_state *false_reg,
- u64 val, u32 val32,
+ u64 uval, u32 uval32,
u8 opcode, bool is_jmp32)
{
struct tnum false_32off = tnum_subreg(false_reg->var_off);
struct tnum false_64off = false_reg->var_off;
struct tnum true_32off = tnum_subreg(true_reg->var_off);
struct tnum true_64off = true_reg->var_off;
- s64 sval = (s64)val;
- s32 sval32 = (s32)val32;
+ s64 sval = (s64)uval;
+ s32 sval32 = (s32)uval32;
/* If the dst_reg is a pointer, we can't learn anything about its
* variable offset from the compare (unless src_reg were a pointer into
@@ -14499,49 +14417,49 @@ static void reg_set_min_max(struct bpf_reg_state *true_reg,
*/
case BPF_JEQ:
if (is_jmp32) {
- __mark_reg32_known(true_reg, val32);
+ __mark_reg32_known(true_reg, uval32);
true_32off = tnum_subreg(true_reg->var_off);
} else {
- ___mark_reg_known(true_reg, val);
+ ___mark_reg_known(true_reg, uval);
true_64off = true_reg->var_off;
}
break;
case BPF_JNE:
if (is_jmp32) {
- __mark_reg32_known(false_reg, val32);
+ __mark_reg32_known(false_reg, uval32);
false_32off = tnum_subreg(false_reg->var_off);
} else {
- ___mark_reg_known(false_reg, val);
+ ___mark_reg_known(false_reg, uval);
false_64off = false_reg->var_off;
}
break;
case BPF_JSET:
if (is_jmp32) {
- false_32off = tnum_and(false_32off, tnum_const(~val32));
- if (is_power_of_2(val32))
+ false_32off = tnum_and(false_32off, tnum_const(~uval32));
+ if (is_power_of_2(uval32))
true_32off = tnum_or(true_32off,
- tnum_const(val32));
+ tnum_const(uval32));
} else {
- false_64off = tnum_and(false_64off, tnum_const(~val));
- if (is_power_of_2(val))
+ false_64off = tnum_and(false_64off, tnum_const(~uval));
+ if (is_power_of_2(uval))
true_64off = tnum_or(true_64off,
- tnum_const(val));
+ tnum_const(uval));
}
break;
case BPF_JGE:
case BPF_JGT:
{
if (is_jmp32) {
- u32 false_umax = opcode == BPF_JGT ? val32 : val32 - 1;
- u32 true_umin = opcode == BPF_JGT ? val32 + 1 : val32;
+ u32 false_umax = opcode == BPF_JGT ? uval32 : uval32 - 1;
+ u32 true_umin = opcode == BPF_JGT ? uval32 + 1 : uval32;
false_reg->u32_max_value = min(false_reg->u32_max_value,
false_umax);
true_reg->u32_min_value = max(true_reg->u32_min_value,
true_umin);
} else {
- u64 false_umax = opcode == BPF_JGT ? val : val - 1;
- u64 true_umin = opcode == BPF_JGT ? val + 1 : val;
+ u64 false_umax = opcode == BPF_JGT ? uval : uval - 1;
+ u64 true_umin = opcode == BPF_JGT ? uval + 1 : uval;
false_reg->umax_value = min(false_reg->umax_value, false_umax);
true_reg->umin_value = max(true_reg->umin_value, true_umin);
@@ -14570,16 +14488,16 @@ static void reg_set_min_max(struct bpf_reg_state *true_reg,
case BPF_JLT:
{
if (is_jmp32) {
- u32 false_umin = opcode == BPF_JLT ? val32 : val32 + 1;
- u32 true_umax = opcode == BPF_JLT ? val32 - 1 : val32;
+ u32 false_umin = opcode == BPF_JLT ? uval32 : uval32 + 1;
+ u32 true_umax = opcode == BPF_JLT ? uval32 - 1 : uval32;
false_reg->u32_min_value = max(false_reg->u32_min_value,
false_umin);
true_reg->u32_max_value = min(true_reg->u32_max_value,
true_umax);
} else {
- u64 false_umin = opcode == BPF_JLT ? val : val + 1;
- u64 true_umax = opcode == BPF_JLT ? val - 1 : val;
+ u64 false_umin = opcode == BPF_JLT ? uval : uval + 1;
+ u64 true_umax = opcode == BPF_JLT ? uval - 1 : uval;
false_reg->umin_value = max(false_reg->umin_value, false_umin);
true_reg->umax_value = min(true_reg->umax_value, true_umax);
@@ -14628,7 +14546,7 @@ static void reg_set_min_max(struct bpf_reg_state *true_reg,
*/
static void reg_set_min_max_inv(struct bpf_reg_state *true_reg,
struct bpf_reg_state *false_reg,
- u64 val, u32 val32,
+ u64 uval, u32 uval32,
u8 opcode, bool is_jmp32)
{
opcode = flip_opcode(opcode);
@@ -14636,7 +14554,7 @@ static void reg_set_min_max_inv(struct bpf_reg_state *true_reg,
* BPF_JA, can't get here.
*/
if (opcode)
- reg_set_min_max(true_reg, false_reg, val, val32, opcode, is_jmp32);
+ reg_set_min_max(true_reg, false_reg, uval, uval32, opcode, is_jmp32);
}
/* Regs are known to be equal, so intersect their min/max/var_off */
--
2.34.1
next prev parent reply other threads:[~2023-11-02 3:38 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-11-02 3:37 [PATCH v6 bpf-next 00/17] BPF register bounds logic and testing improvements Andrii Nakryiko
2023-11-02 3:37 ` [PATCH v6 bpf-next 01/17] selftests/bpf: fix RELEASE=1 build for tc_opts Andrii Nakryiko
2023-11-02 3:37 ` [PATCH v6 bpf-next 02/17] selftests/bpf: satisfy compiler by having explicit return in btf test Andrii Nakryiko
2023-11-02 3:37 ` [PATCH v6 bpf-next 03/17] bpf: derive smin/smax from umin/max bounds Andrii Nakryiko
2023-11-02 3:37 ` [PATCH v6 bpf-next 04/17] bpf: derive smin32/smax32 from umin32/umax32 bounds Andrii Nakryiko
2023-11-02 3:37 ` [PATCH v6 bpf-next 05/17] bpf: derive subreg bounds from full bounds when upper 32 bits are constant Andrii Nakryiko
2023-11-02 3:37 ` [PATCH v6 bpf-next 06/17] bpf: add special smin32/smax32 derivation from 64-bit bounds Andrii Nakryiko
2023-11-02 3:37 ` [PATCH v6 bpf-next 07/17] bpf: improve deduction of 64-bit bounds from 32-bit bounds Andrii Nakryiko
2023-11-02 14:39 ` Shung-Hsi Yu
2023-11-02 16:17 ` Andrii Nakryiko
2023-11-03 3:43 ` Shung-Hsi Yu
2023-11-02 3:37 ` [PATCH v6 bpf-next 08/17] bpf: try harder to deduce register bounds from different numeric domains Andrii Nakryiko
2023-11-02 3:37 ` [PATCH v6 bpf-next 09/17] bpf: drop knowledge-losing __reg_combine_{32,64}_into_{64,32} logic Andrii Nakryiko
2023-11-02 15:14 ` Shung-Hsi Yu
2023-11-02 3:37 ` [PATCH v6 bpf-next 10/17] selftests/bpf: BPF register range bounds tester Andrii Nakryiko
2023-11-02 3:37 ` [PATCH v6 bpf-next 11/17] bpf: rename is_branch_taken reg arguments to prepare for the second one Andrii Nakryiko
2023-11-02 15:15 ` Shung-Hsi Yu
2023-11-02 3:37 ` [PATCH v6 bpf-next 12/17] bpf: generalize is_branch_taken() to work with two registers Andrii Nakryiko
2023-11-02 15:19 ` Shung-Hsi Yu
2023-11-02 3:37 ` [PATCH v6 bpf-next 13/17] bpf: move is_branch_taken() down Andrii Nakryiko
2023-11-02 3:37 ` [PATCH v6 bpf-next 14/17] bpf: generalize is_branch_taken to handle all conditional jumps in one place Andrii Nakryiko
2023-11-02 3:37 ` Andrii Nakryiko [this message]
2023-11-02 3:37 ` [PATCH v6 bpf-next 16/17] bpf: prepare reg_set_min_max for second set of registers Andrii Nakryiko
2023-11-02 3:37 ` [PATCH v6 bpf-next 17/17] bpf: generalize reg_set_min_max() to handle two sets of two registers Andrii Nakryiko
2023-11-02 16:10 ` [PATCH v6 bpf-next 00/17] BPF register bounds logic and testing improvements patchwork-bot+netdevbpf
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