* [PATCH bpf-next] bpf, docs: Fix typos in instruction-set.rst
@ 2024-02-21 17:35 Dave Thaler
2024-02-21 17:35 ` [Bpf] " Dave Thaler
` (2 more replies)
0 siblings, 3 replies; 7+ messages in thread
From: Dave Thaler @ 2024-02-21 17:35 UTC (permalink / raw)
To: bpf; +Cc: bpf, Dave Thaler
* "BPF ADD" should be "BPF_ADD".
* "src" should be "src_reg" in several places. The latter is the field name
in the instruction. The former refers to the value of the register, or the
immediate.
* Add '' around field names in one sentence, for consistency with the rest
of the document.
Signed-off-by: Dave Thaler <dthaler1968@gmail.com>
---
.../bpf/standardization/instruction-set.rst | 72 +++++++++----------
1 file changed, 36 insertions(+), 36 deletions(-)
diff --git a/Documentation/bpf/standardization/instruction-set.rst b/Documentation/bpf/standardization/instruction-set.rst
index 868d9f617..56b5e7dad 100644
--- a/Documentation/bpf/standardization/instruction-set.rst
+++ b/Documentation/bpf/standardization/instruction-set.rst
@@ -178,7 +178,7 @@ Unused fields shall be cleared to zero.
As discussed below in `64-bit immediate instructions`_, a 64-bit immediate
instruction uses two 32-bit immediate values that are constructed as follows.
The 64 bits following the basic instruction contain a pseudo instruction
-using the same format but with opcode, dst_reg, src_reg, and offset all set to zero,
+using the same format but with 'opcode', 'dst_reg', 'src_reg', and 'offset' all set to zero,
and imm containing the high 32 bits of the immediate value.
This is depicted in the following figure::
@@ -392,27 +392,27 @@ otherwise identical operations, and indicates the base64 conformance
group unless otherwise specified.
The 'code' field encodes the operation as below:
-======== ===== === =============================== =============================================
-code value src description notes
-======== ===== === =============================== =============================================
-BPF_JA 0x0 0x0 PC += offset BPF_JMP | BPF_K only
-BPF_JA 0x0 0x0 PC += imm BPF_JMP32 | BPF_K only
-BPF_JEQ 0x1 any PC += offset if dst == src
-BPF_JGT 0x2 any PC += offset if dst > src unsigned
-BPF_JGE 0x3 any PC += offset if dst >= src unsigned
-BPF_JSET 0x4 any PC += offset if dst & src
-BPF_JNE 0x5 any PC += offset if dst != src
-BPF_JSGT 0x6 any PC += offset if dst > src signed
-BPF_JSGE 0x7 any PC += offset if dst >= src signed
-BPF_CALL 0x8 0x0 call helper function by address BPF_JMP | BPF_K only, see `Helper functions`_
-BPF_CALL 0x8 0x1 call PC += imm BPF_JMP | BPF_K only, see `Program-local functions`_
-BPF_CALL 0x8 0x2 call helper function by BTF ID BPF_JMP | BPF_K only, see `Helper functions`_
-BPF_EXIT 0x9 0x0 return BPF_JMP | BPF_K only
-BPF_JLT 0xa any PC += offset if dst < src unsigned
-BPF_JLE 0xb any PC += offset if dst <= src unsigned
-BPF_JSLT 0xc any PC += offset if dst < src signed
-BPF_JSLE 0xd any PC += offset if dst <= src signed
-======== ===== === =============================== =============================================
+======== ===== ======= =============================== =============================================
+code value src_reg description notes
+======== ===== ======= =============================== =============================================
+BPF_JA 0x0 0x0 PC += offset BPF_JMP | BPF_K only
+BPF_JA 0x0 0x0 PC += imm BPF_JMP32 | BPF_K only
+BPF_JEQ 0x1 any PC += offset if dst == src
+BPF_JGT 0x2 any PC += offset if dst > src unsigned
+BPF_JGE 0x3 any PC += offset if dst >= src unsigned
+BPF_JSET 0x4 any PC += offset if dst & src
+BPF_JNE 0x5 any PC += offset if dst != src
+BPF_JSGT 0x6 any PC += offset if dst > src signed
+BPF_JSGE 0x7 any PC += offset if dst >= src signed
+BPF_CALL 0x8 0x0 call helper function by address BPF_JMP | BPF_K only, see `Helper functions`_
+BPF_CALL 0x8 0x1 call PC += imm BPF_JMP | BPF_K only, see `Program-local functions`_
+BPF_CALL 0x8 0x2 call helper function by BTF ID BPF_JMP | BPF_K only, see `Helper functions`_
+BPF_EXIT 0x9 0x0 return BPF_JMP | BPF_K only
+BPF_JLT 0xa any PC += offset if dst < src unsigned
+BPF_JLE 0xb any PC += offset if dst <= src unsigned
+BPF_JSLT 0xc any PC += offset if dst < src signed
+BPF_JSLE 0xd any PC += offset if dst <= src signed
+======== ===== ======= =============================== =============================================
The BPF program needs to store the return value into register R0 before doing a
``BPF_EXIT``.
@@ -568,7 +568,7 @@ BPF_XOR 0xa0 atomic xor
*(u32 *)(dst + offset) += src
-``BPF_ATOMIC | BPF_DW | BPF_STX`` with 'imm' = BPF ADD means::
+``BPF_ATOMIC | BPF_DW | BPF_STX`` with 'imm' = BPF_ADD means::
*(u64 *)(dst + offset) += src
@@ -601,24 +601,24 @@ and loaded back to ``R0``.
-----------------------------
Instructions with the ``BPF_IMM`` 'mode' modifier use the wide instruction
-encoding defined in `Instruction encoding`_, and use the 'src' field of the
+encoding defined in `Instruction encoding`_, and use the 'src_reg' field of the
basic instruction to hold an opcode subtype.
The following table defines a set of ``BPF_IMM | BPF_DW | BPF_LD`` instructions
-with opcode subtypes in the 'src' field, using new terms such as "map"
+with opcode subtypes in the 'src_reg' field, using new terms such as "map"
defined further below:
-========================= ====== === ========================================= =========== ==============
-opcode construction opcode src pseudocode imm type dst type
-========================= ====== === ========================================= =========== ==============
-BPF_IMM | BPF_DW | BPF_LD 0x18 0x0 dst = (next_imm << 32) | imm integer integer
-BPF_IMM | BPF_DW | BPF_LD 0x18 0x1 dst = map_by_fd(imm) map fd map
-BPF_IMM | BPF_DW | BPF_LD 0x18 0x2 dst = map_val(map_by_fd(imm)) + next_imm map fd data pointer
-BPF_IMM | BPF_DW | BPF_LD 0x18 0x3 dst = var_addr(imm) variable id data pointer
-BPF_IMM | BPF_DW | BPF_LD 0x18 0x4 dst = code_addr(imm) integer code pointer
-BPF_IMM | BPF_DW | BPF_LD 0x18 0x5 dst = map_by_idx(imm) map index map
-BPF_IMM | BPF_DW | BPF_LD 0x18 0x6 dst = map_val(map_by_idx(imm)) + next_imm map index data pointer
-========================= ====== === ========================================= =========== ==============
+========================= ====== ======= ========================================= =========== ==============
+opcode construction opcode src_reg pseudocode imm type dst type
+========================= ====== ======= ========================================= =========== ==============
+BPF_IMM | BPF_DW | BPF_LD 0x18 0x0 dst = (next_imm << 32) | imm integer integer
+BPF_IMM | BPF_DW | BPF_LD 0x18 0x1 dst = map_by_fd(imm) map fd map
+BPF_IMM | BPF_DW | BPF_LD 0x18 0x2 dst = map_val(map_by_fd(imm)) + next_imm map fd data pointer
+BPF_IMM | BPF_DW | BPF_LD 0x18 0x3 dst = var_addr(imm) variable id data pointer
+BPF_IMM | BPF_DW | BPF_LD 0x18 0x4 dst = code_addr(imm) integer code pointer
+BPF_IMM | BPF_DW | BPF_LD 0x18 0x5 dst = map_by_idx(imm) map index map
+BPF_IMM | BPF_DW | BPF_LD 0x18 0x6 dst = map_val(map_by_idx(imm)) + next_imm map index data pointer
+========================= ====== ======= ========================================= =========== ==============
where
--
2.40.1
^ permalink raw reply related [flat|nested] 7+ messages in thread* [Bpf] [PATCH bpf-next] bpf, docs: Fix typos in instruction-set.rst
2024-02-21 17:35 [PATCH bpf-next] bpf, docs: Fix typos in instruction-set.rst Dave Thaler
@ 2024-02-21 17:35 ` Dave Thaler
2024-02-21 18:04 ` David Vernet
2024-02-22 17:10 ` patchwork-bot+netdevbpf
2 siblings, 0 replies; 7+ messages in thread
From: Dave Thaler @ 2024-02-21 17:35 UTC (permalink / raw)
To: bpf; +Cc: bpf, Dave Thaler
* "BPF ADD" should be "BPF_ADD".
* "src" should be "src_reg" in several places. The latter is the field name
in the instruction. The former refers to the value of the register, or the
immediate.
* Add '' around field names in one sentence, for consistency with the rest
of the document.
Signed-off-by: Dave Thaler <dthaler1968@gmail.com>
---
.../bpf/standardization/instruction-set.rst | 72 +++++++++----------
1 file changed, 36 insertions(+), 36 deletions(-)
diff --git a/Documentation/bpf/standardization/instruction-set.rst b/Documentation/bpf/standardization/instruction-set.rst
index 868d9f617..56b5e7dad 100644
--- a/Documentation/bpf/standardization/instruction-set.rst
+++ b/Documentation/bpf/standardization/instruction-set.rst
@@ -178,7 +178,7 @@ Unused fields shall be cleared to zero.
As discussed below in `64-bit immediate instructions`_, a 64-bit immediate
instruction uses two 32-bit immediate values that are constructed as follows.
The 64 bits following the basic instruction contain a pseudo instruction
-using the same format but with opcode, dst_reg, src_reg, and offset all set to zero,
+using the same format but with 'opcode', 'dst_reg', 'src_reg', and 'offset' all set to zero,
and imm containing the high 32 bits of the immediate value.
This is depicted in the following figure::
@@ -392,27 +392,27 @@ otherwise identical operations, and indicates the base64 conformance
group unless otherwise specified.
The 'code' field encodes the operation as below:
-======== ===== === =============================== =============================================
-code value src description notes
-======== ===== === =============================== =============================================
-BPF_JA 0x0 0x0 PC += offset BPF_JMP | BPF_K only
-BPF_JA 0x0 0x0 PC += imm BPF_JMP32 | BPF_K only
-BPF_JEQ 0x1 any PC += offset if dst == src
-BPF_JGT 0x2 any PC += offset if dst > src unsigned
-BPF_JGE 0x3 any PC += offset if dst >= src unsigned
-BPF_JSET 0x4 any PC += offset if dst & src
-BPF_JNE 0x5 any PC += offset if dst != src
-BPF_JSGT 0x6 any PC += offset if dst > src signed
-BPF_JSGE 0x7 any PC += offset if dst >= src signed
-BPF_CALL 0x8 0x0 call helper function by address BPF_JMP | BPF_K only, see `Helper functions`_
-BPF_CALL 0x8 0x1 call PC += imm BPF_JMP | BPF_K only, see `Program-local functions`_
-BPF_CALL 0x8 0x2 call helper function by BTF ID BPF_JMP | BPF_K only, see `Helper functions`_
-BPF_EXIT 0x9 0x0 return BPF_JMP | BPF_K only
-BPF_JLT 0xa any PC += offset if dst < src unsigned
-BPF_JLE 0xb any PC += offset if dst <= src unsigned
-BPF_JSLT 0xc any PC += offset if dst < src signed
-BPF_JSLE 0xd any PC += offset if dst <= src signed
-======== ===== === =============================== =============================================
+======== ===== ======= =============================== =============================================
+code value src_reg description notes
+======== ===== ======= =============================== =============================================
+BPF_JA 0x0 0x0 PC += offset BPF_JMP | BPF_K only
+BPF_JA 0x0 0x0 PC += imm BPF_JMP32 | BPF_K only
+BPF_JEQ 0x1 any PC += offset if dst == src
+BPF_JGT 0x2 any PC += offset if dst > src unsigned
+BPF_JGE 0x3 any PC += offset if dst >= src unsigned
+BPF_JSET 0x4 any PC += offset if dst & src
+BPF_JNE 0x5 any PC += offset if dst != src
+BPF_JSGT 0x6 any PC += offset if dst > src signed
+BPF_JSGE 0x7 any PC += offset if dst >= src signed
+BPF_CALL 0x8 0x0 call helper function by address BPF_JMP | BPF_K only, see `Helper functions`_
+BPF_CALL 0x8 0x1 call PC += imm BPF_JMP | BPF_K only, see `Program-local functions`_
+BPF_CALL 0x8 0x2 call helper function by BTF ID BPF_JMP | BPF_K only, see `Helper functions`_
+BPF_EXIT 0x9 0x0 return BPF_JMP | BPF_K only
+BPF_JLT 0xa any PC += offset if dst < src unsigned
+BPF_JLE 0xb any PC += offset if dst <= src unsigned
+BPF_JSLT 0xc any PC += offset if dst < src signed
+BPF_JSLE 0xd any PC += offset if dst <= src signed
+======== ===== ======= =============================== =============================================
The BPF program needs to store the return value into register R0 before doing a
``BPF_EXIT``.
@@ -568,7 +568,7 @@ BPF_XOR 0xa0 atomic xor
*(u32 *)(dst + offset) += src
-``BPF_ATOMIC | BPF_DW | BPF_STX`` with 'imm' = BPF ADD means::
+``BPF_ATOMIC | BPF_DW | BPF_STX`` with 'imm' = BPF_ADD means::
*(u64 *)(dst + offset) += src
@@ -601,24 +601,24 @@ and loaded back to ``R0``.
-----------------------------
Instructions with the ``BPF_IMM`` 'mode' modifier use the wide instruction
-encoding defined in `Instruction encoding`_, and use the 'src' field of the
+encoding defined in `Instruction encoding`_, and use the 'src_reg' field of the
basic instruction to hold an opcode subtype.
The following table defines a set of ``BPF_IMM | BPF_DW | BPF_LD`` instructions
-with opcode subtypes in the 'src' field, using new terms such as "map"
+with opcode subtypes in the 'src_reg' field, using new terms such as "map"
defined further below:
-========================= ====== === ========================================= =========== ==============
-opcode construction opcode src pseudocode imm type dst type
-========================= ====== === ========================================= =========== ==============
-BPF_IMM | BPF_DW | BPF_LD 0x18 0x0 dst = (next_imm << 32) | imm integer integer
-BPF_IMM | BPF_DW | BPF_LD 0x18 0x1 dst = map_by_fd(imm) map fd map
-BPF_IMM | BPF_DW | BPF_LD 0x18 0x2 dst = map_val(map_by_fd(imm)) + next_imm map fd data pointer
-BPF_IMM | BPF_DW | BPF_LD 0x18 0x3 dst = var_addr(imm) variable id data pointer
-BPF_IMM | BPF_DW | BPF_LD 0x18 0x4 dst = code_addr(imm) integer code pointer
-BPF_IMM | BPF_DW | BPF_LD 0x18 0x5 dst = map_by_idx(imm) map index map
-BPF_IMM | BPF_DW | BPF_LD 0x18 0x6 dst = map_val(map_by_idx(imm)) + next_imm map index data pointer
-========================= ====== === ========================================= =========== ==============
+========================= ====== ======= ========================================= =========== ==============
+opcode construction opcode src_reg pseudocode imm type dst type
+========================= ====== ======= ========================================= =========== ==============
+BPF_IMM | BPF_DW | BPF_LD 0x18 0x0 dst = (next_imm << 32) | imm integer integer
+BPF_IMM | BPF_DW | BPF_LD 0x18 0x1 dst = map_by_fd(imm) map fd map
+BPF_IMM | BPF_DW | BPF_LD 0x18 0x2 dst = map_val(map_by_fd(imm)) + next_imm map fd data pointer
+BPF_IMM | BPF_DW | BPF_LD 0x18 0x3 dst = var_addr(imm) variable id data pointer
+BPF_IMM | BPF_DW | BPF_LD 0x18 0x4 dst = code_addr(imm) integer code pointer
+BPF_IMM | BPF_DW | BPF_LD 0x18 0x5 dst = map_by_idx(imm) map index map
+BPF_IMM | BPF_DW | BPF_LD 0x18 0x6 dst = map_val(map_by_idx(imm)) + next_imm map index data pointer
+========================= ====== ======= ========================================= =========== ==============
where
--
2.40.1
--
Bpf mailing list
Bpf@ietf.org
https://www.ietf.org/mailman/listinfo/bpf
^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: [Bpf] [PATCH bpf-next] bpf, docs: Fix typos in instruction-set.rst
2024-02-21 17:35 [PATCH bpf-next] bpf, docs: Fix typos in instruction-set.rst Dave Thaler
2024-02-21 17:35 ` [Bpf] " Dave Thaler
@ 2024-02-21 18:04 ` David Vernet
2024-02-21 18:04 ` David Vernet
2024-02-22 17:09 ` Alexei Starovoitov
2024-02-22 17:10 ` patchwork-bot+netdevbpf
2 siblings, 2 replies; 7+ messages in thread
From: David Vernet @ 2024-02-21 18:04 UTC (permalink / raw)
To: Dave Thaler; +Cc: bpf, bpf, Dave Thaler
[-- Attachment #1: Type: text/plain, Size: 1625 bytes --]
On Wed, Feb 21, 2024 at 09:35:35AM -0800, Dave Thaler wrote:
> * "BPF ADD" should be "BPF_ADD".
> * "src" should be "src_reg" in several places. The latter is the field name
> in the instruction. The former refers to the value of the register, or the
> immediate.
> * Add '' around field names in one sentence, for consistency with the rest
> of the document.
>
> Signed-off-by: Dave Thaler <dthaler1968@gmail.com>
Thanks for the cleanup.
Acked-by: David Vernet <void@manifault.com>
> ---
> .../bpf/standardization/instruction-set.rst | 72 +++++++++----------
> 1 file changed, 36 insertions(+), 36 deletions(-)
>
> diff --git a/Documentation/bpf/standardization/instruction-set.rst b/Documentation/bpf/standardization/instruction-set.rst
> index 868d9f617..56b5e7dad 100644
> --- a/Documentation/bpf/standardization/instruction-set.rst
> +++ b/Documentation/bpf/standardization/instruction-set.rst
> @@ -178,7 +178,7 @@ Unused fields shall be cleared to zero.
> As discussed below in `64-bit immediate instructions`_, a 64-bit immediate
> instruction uses two 32-bit immediate values that are constructed as follows.
> The 64 bits following the basic instruction contain a pseudo instruction
> -using the same format but with opcode, dst_reg, src_reg, and offset all set to zero,
> +using the same format but with 'opcode', 'dst_reg', 'src_reg', and 'offset' all set to zero,
> and imm containing the high 32 bits of the immediate value.
nit: Can we make sure these columns are all wrapped to 80 characters?
This can be done in a follow-up for the whole document later.
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 228 bytes --]
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [Bpf] [PATCH bpf-next] bpf, docs: Fix typos in instruction-set.rst
2024-02-21 18:04 ` David Vernet
@ 2024-02-21 18:04 ` David Vernet
2024-02-22 17:09 ` Alexei Starovoitov
1 sibling, 0 replies; 7+ messages in thread
From: David Vernet @ 2024-02-21 18:04 UTC (permalink / raw)
To: Dave Thaler; +Cc: bpf, bpf, Dave Thaler
[-- Attachment #1.1: Type: text/plain, Size: 1625 bytes --]
On Wed, Feb 21, 2024 at 09:35:35AM -0800, Dave Thaler wrote:
> * "BPF ADD" should be "BPF_ADD".
> * "src" should be "src_reg" in several places. The latter is the field name
> in the instruction. The former refers to the value of the register, or the
> immediate.
> * Add '' around field names in one sentence, for consistency with the rest
> of the document.
>
> Signed-off-by: Dave Thaler <dthaler1968@gmail.com>
Thanks for the cleanup.
Acked-by: David Vernet <void@manifault.com>
> ---
> .../bpf/standardization/instruction-set.rst | 72 +++++++++----------
> 1 file changed, 36 insertions(+), 36 deletions(-)
>
> diff --git a/Documentation/bpf/standardization/instruction-set.rst b/Documentation/bpf/standardization/instruction-set.rst
> index 868d9f617..56b5e7dad 100644
> --- a/Documentation/bpf/standardization/instruction-set.rst
> +++ b/Documentation/bpf/standardization/instruction-set.rst
> @@ -178,7 +178,7 @@ Unused fields shall be cleared to zero.
> As discussed below in `64-bit immediate instructions`_, a 64-bit immediate
> instruction uses two 32-bit immediate values that are constructed as follows.
> The 64 bits following the basic instruction contain a pseudo instruction
> -using the same format but with opcode, dst_reg, src_reg, and offset all set to zero,
> +using the same format but with 'opcode', 'dst_reg', 'src_reg', and 'offset' all set to zero,
> and imm containing the high 32 bits of the immediate value.
nit: Can we make sure these columns are all wrapped to 80 characters?
This can be done in a follow-up for the whole document later.
[-- Attachment #1.2: signature.asc --]
[-- Type: application/pgp-signature, Size: 228 bytes --]
[-- Attachment #2: Type: text/plain, Size: 76 bytes --]
--
Bpf mailing list
Bpf@ietf.org
https://www.ietf.org/mailman/listinfo/bpf
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [Bpf] [PATCH bpf-next] bpf, docs: Fix typos in instruction-set.rst
2024-02-21 18:04 ` David Vernet
2024-02-21 18:04 ` David Vernet
@ 2024-02-22 17:09 ` Alexei Starovoitov
2024-02-22 17:09 ` Alexei Starovoitov
1 sibling, 1 reply; 7+ messages in thread
From: Alexei Starovoitov @ 2024-02-22 17:09 UTC (permalink / raw)
To: David Vernet; +Cc: Dave Thaler, bpf, bpf, Dave Thaler
On Wed, Feb 21, 2024 at 10:05 AM David Vernet <void@manifault.com> wrote:
>
> On Wed, Feb 21, 2024 at 09:35:35AM -0800, Dave Thaler wrote:
> > * "BPF ADD" should be "BPF_ADD".
> > * "src" should be "src_reg" in several places. The latter is the field name
> > in the instruction. The former refers to the value of the register, or the
> > immediate.
> > * Add '' around field names in one sentence, for consistency with the rest
> > of the document.
> >
> > Signed-off-by: Dave Thaler <dthaler1968@gmail.com>
>
> Thanks for the cleanup.
>
> Acked-by: David Vernet <void@manifault.com>
>
> > ---
> > .../bpf/standardization/instruction-set.rst | 72 +++++++++----------
> > 1 file changed, 36 insertions(+), 36 deletions(-)
> >
> > diff --git a/Documentation/bpf/standardization/instruction-set.rst b/Documentation/bpf/standardization/instruction-set.rst
> > index 868d9f617..56b5e7dad 100644
> > --- a/Documentation/bpf/standardization/instruction-set.rst
> > +++ b/Documentation/bpf/standardization/instruction-set.rst
> > @@ -178,7 +178,7 @@ Unused fields shall be cleared to zero.
> > As discussed below in `64-bit immediate instructions`_, a 64-bit immediate
> > instruction uses two 32-bit immediate values that are constructed as follows.
> > The 64 bits following the basic instruction contain a pseudo instruction
> > -using the same format but with opcode, dst_reg, src_reg, and offset all set to zero,
> > +using the same format but with 'opcode', 'dst_reg', 'src_reg', and 'offset' all set to zero,
> > and imm containing the high 32 bits of the immediate value.
>
> nit: Can we make sure these columns are all wrapped to 80 characters?
> This can be done in a follow-up for the whole document later.
Fixed up while applying,
but let's not reformat the whole doc.
Many tables are 100+ chars and it's fine.
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [Bpf] [PATCH bpf-next] bpf, docs: Fix typos in instruction-set.rst
2024-02-22 17:09 ` Alexei Starovoitov
@ 2024-02-22 17:09 ` Alexei Starovoitov
0 siblings, 0 replies; 7+ messages in thread
From: Alexei Starovoitov @ 2024-02-22 17:09 UTC (permalink / raw)
To: David Vernet; +Cc: Dave Thaler, bpf, bpf, Dave Thaler
On Wed, Feb 21, 2024 at 10:05 AM David Vernet <void@manifault.com> wrote:
>
> On Wed, Feb 21, 2024 at 09:35:35AM -0800, Dave Thaler wrote:
> > * "BPF ADD" should be "BPF_ADD".
> > * "src" should be "src_reg" in several places. The latter is the field name
> > in the instruction. The former refers to the value of the register, or the
> > immediate.
> > * Add '' around field names in one sentence, for consistency with the rest
> > of the document.
> >
> > Signed-off-by: Dave Thaler <dthaler1968@gmail.com>
>
> Thanks for the cleanup.
>
> Acked-by: David Vernet <void@manifault.com>
>
> > ---
> > .../bpf/standardization/instruction-set.rst | 72 +++++++++----------
> > 1 file changed, 36 insertions(+), 36 deletions(-)
> >
> > diff --git a/Documentation/bpf/standardization/instruction-set.rst b/Documentation/bpf/standardization/instruction-set.rst
> > index 868d9f617..56b5e7dad 100644
> > --- a/Documentation/bpf/standardization/instruction-set.rst
> > +++ b/Documentation/bpf/standardization/instruction-set.rst
> > @@ -178,7 +178,7 @@ Unused fields shall be cleared to zero.
> > As discussed below in `64-bit immediate instructions`_, a 64-bit immediate
> > instruction uses two 32-bit immediate values that are constructed as follows.
> > The 64 bits following the basic instruction contain a pseudo instruction
> > -using the same format but with opcode, dst_reg, src_reg, and offset all set to zero,
> > +using the same format but with 'opcode', 'dst_reg', 'src_reg', and 'offset' all set to zero,
> > and imm containing the high 32 bits of the immediate value.
>
> nit: Can we make sure these columns are all wrapped to 80 characters?
> This can be done in a follow-up for the whole document later.
Fixed up while applying,
but let's not reformat the whole doc.
Many tables are 100+ chars and it's fine.
--
Bpf mailing list
Bpf@ietf.org
https://www.ietf.org/mailman/listinfo/bpf
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH bpf-next] bpf, docs: Fix typos in instruction-set.rst
2024-02-21 17:35 [PATCH bpf-next] bpf, docs: Fix typos in instruction-set.rst Dave Thaler
2024-02-21 17:35 ` [Bpf] " Dave Thaler
2024-02-21 18:04 ` David Vernet
@ 2024-02-22 17:10 ` patchwork-bot+netdevbpf
2 siblings, 0 replies; 7+ messages in thread
From: patchwork-bot+netdevbpf @ 2024-02-22 17:10 UTC (permalink / raw)
To: Dave Thaler; +Cc: bpf, bpf, dthaler1968
Hello:
This patch was applied to bpf/bpf-next.git (master)
by Alexei Starovoitov <ast@kernel.org>:
On Wed, 21 Feb 2024 09:35:35 -0800 you wrote:
> * "BPF ADD" should be "BPF_ADD".
> * "src" should be "src_reg" in several places. The latter is the field name
> in the instruction. The former refers to the value of the register, or the
> immediate.
> * Add '' around field names in one sentence, for consistency with the rest
> of the document.
>
> [...]
Here is the summary with links:
- [bpf-next] bpf, docs: Fix typos in instruction-set.rst
https://git.kernel.org/bpf/bpf-next/c/c1bb68f6b2f6
You are awesome, thank you!
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Thread overview: 7+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2024-02-21 17:35 [PATCH bpf-next] bpf, docs: Fix typos in instruction-set.rst Dave Thaler
2024-02-21 17:35 ` [Bpf] " Dave Thaler
2024-02-21 18:04 ` David Vernet
2024-02-21 18:04 ` David Vernet
2024-02-22 17:09 ` Alexei Starovoitov
2024-02-22 17:09 ` Alexei Starovoitov
2024-02-22 17:10 ` patchwork-bot+netdevbpf
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