[Buildroot] [PATCH 0/3] package/qemu: fix x86 CPU variant exclusions

[Buildroot] [PATCH 0/3] package/qemu: fix x86 CPU variant exclusions

[Yegor Yefremov via buildroot]

From: Yegor Yefremov <yegorslists@googlemail.com>

This series is a follow-up to the discussion on

  package/qemu: host-qemu does not support AVX512 CPUs
  https://patchwork.buildroot.org/project/buildroot/patch/20260914092612.1283030-1-yegorslists@gmail.com/

where Thomas rightfully questioned whether the BR2_x86_core_avx2
exclusion in BR2_PACKAGE_HOST_QEMU_ARCH_SUPPORTS still makes sense, and
pointed out that excluding BR2_x86_core_avx2 but not the equivalent
BR2_x86_haswell is inconsistent.

Thomas ACKed this approach in
https://lore.kernel.org/buildroot/aqrl-vOwcHy1wpBs@windsurf/

Short answer: the core-avx2 exclusion does not make sense anymore, and
the neighbouring BR2_x86_steamroller exclusion, while still needed, is
incomplete.

Both exclusions come from commit 1f7efaf89f03 ("package/qemu: do not
support x86_steamroller or x86_core_avx2"), from the Qemu 4.2 era:

 - core-avx2: the TCG engine had no AVX support at all back then. Since
   Qemu 7.2 it implements AVX, AVX2, F16C, FMA3 and VAES, so the
   exclusion is obsolete. It was also inconsistent, as gcc's core-avx2
   is a deprecated alias for haswell (same feature bits, same
   BR2_X86_CPU_HAS_* selects), and haswell, broadwell, skylake, zen*,
   x86-64-v3, ... were never excluded. Patch 1 drops it.

 - steamroller: the real blocker is not AVX, but the Bulldozer-specific
   XOP/FMA4/TBM/LWP extensions, which TCG still does not implement.
   And the whole Bulldozer family is affected: bulldozer (bdver1),
   piledriver (bdver2) and excavator (bdver4) were never excluded,
   although they are just as broken. Patches 2 and 3 introduce a
   BR2_X86_CPU_HAS_XOP capability symbol and use it, mirroring what is
   already done for BR2_X86_CPU_HAS_AVX512.

I verified the TCG feature masks in target/i386/cpu.c of both Qemu
11.0.0 (the version we currently package) and 11.1.1; they are
identical, so bumping Qemu will not change the picture:

  TCG_EXT_FEATURES     has CPUID_EXT_AVX, CPUID_EXT_F16C, CPUID_EXT_FMA
  TCG_7_0_EBX_FEATURES has CPUID_7_0_EBX_AVX2, BMI1, BMI2
  TCG_EXT3_FEATURES    has no XOP, FMA4, TBM or LWP
  no TCG mask          references any AVX512 bit

Tested with olddefconfig on all affected CPU variants;
BR2_PACKAGE_HOST_QEMU_ARCH_SUPPORTS is now:

  haswell, core-avx2, broadwell, skylake, zen, x86-64  ->  y
  bulldozer, piledriver, steamroller, excavator        ->  n
  skylake-avx512                                       ->  n (unchanged)

Note: while looking at this, I noticed that bulldozer, piledriver and
steamroller do not select BR2_X86_CPU_HAS_AVX in arch/Config.in.x86,
although gcc enables AVX for bdver1 to bdver3. That looks like a
separate pre-existing bug, so I left it out of this series.

Yegor Yefremov (3):
  package/qemu: drop x86_core_avx2 exclusion
  arch/Config.in.x86: add BR2_X86_CPU_HAS_XOP
  package/qemu: host-qemu does not support XOP capable CPUs

 arch/Config.in.x86          | 12 ++++++++++++
 package/qemu/Config.in.host |  9 +++++----
 2 files changed, 17 insertions(+), 4 deletions(-)

-- 
2.34.1

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[Buildroot] [PATCH 1/3] package/qemu: drop x86_core_avx2 exclusion

[Yegor Yefremov via buildroot]

From: Yegor Yefremov <yegorslists@googlemail.com>

Commit 1f7efaf89f03 ("package/qemu: do not support x86_steamroller or
x86_core_avx2") excluded BR2_x86_core_avx2 from
BR2_PACKAGE_HOST_QEMU_ARCH_SUPPORTS because binaries built for that CPU
variant crashed under qemu-user. This was done at the time of Qemu 4.2,
whose TCG engine did not implement AVX at all.

Since Qemu 7.2, the TCG engine implements AVX, AVX2, F16C, FMA3 and
VAES. In Qemu 11.0.0 (the version we currently package) and 11.1.1,
target/i386/cpu.c has:

  #define TCG_EXT_FEATURES (... | CPUID_EXT_AVX | CPUID_EXT_F16C | \
            CPUID_EXT_FMA | ...)
  #define TCG_7_0_EBX_FEATURES (... | CPUID_7_0_EBX_BMI1 | \
            CPUID_7_0_EBX_BMI2 | CPUID_7_0_EBX_AVX2 | ...)

which covers everything gcc generates for -march=core-avx2.

In addition, the exclusion was inconsistent: gcc's core-avx2 is a
deprecated alias for haswell, both variants select exactly the same
BR2_X86_CPU_HAS_* symbols in arch/Config.in.x86, and haswell was never
excluded. The same goes for broadwell, skylake, zen*, x86-64-v3, ...,
which all enable AVX2 and build fine on the autobuilders.

So drop the BR2_x86_core_avx2 exclusion.

Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com>
Assisted-by: Claude:claude-opus-5
---
 package/qemu/Config.in.host | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/package/qemu/Config.in.host b/package/qemu/Config.in.host
index e5379e7224..48979fd7ce 100644
--- a/package/qemu/Config.in.host
+++ b/package/qemu/Config.in.host
@@ -22,7 +22,7 @@ config BR2_PACKAGE_HOST_QEMU_ARCH_SUPPORTS
 	default y if BR2_sparc64
 	default y if BR2_xtensa
 	default y if BR2_x86_64
-	depends on !BR2_x86_steamroller && !BR2_x86_core_avx2
+	depends on !BR2_x86_steamroller
 	# The Qemu TCG engine does not implement the AVX512
 	# instruction set, so binaries built for such CPUs cannot be
 	# emulated.
-- 
2.34.1

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Re: [Buildroot] [PATCH 1/3] package/qemu: drop x86_core_avx2 exclusion

[Raphaël Mélotte via buildroot]

In reply of:
> Commit 1f7efaf89f03 ("package/qemu: do not support x86_steamroller or
> x86_core_avx2") excluded BR2_x86_core_avx2 from
> BR2_PACKAGE_HOST_QEMU_ARCH_SUPPORTS because binaries built for that CPU
> variant crashed under qemu-user. This was done at the time of Qemu 4.2,
> whose TCG engine did not implement AVX at all.
> 
> Since Qemu 7.2, the TCG engine implements AVX, AVX2, F16C, FMA3 and
> VAES. In Qemu 11.0.0 (the version we currently package) and 11.1.1,
> target/i386/cpu.c has:
> 
>   #define TCG_EXT_FEATURES (... | CPUID_EXT_AVX | CPUID_EXT_F16C | \
>             CPUID_EXT_FMA | ...)
>   #define TCG_7_0_EBX_FEATURES (... | CPUID_7_0_EBX_BMI1 | \
>             CPUID_7_0_EBX_BMI2 | CPUID_7_0_EBX_AVX2 | ...)
> 
> which covers everything gcc generates for -march=core-avx2.
> 
> In addition, the exclusion was inconsistent: gcc's core-avx2 is a
> deprecated alias for haswell, both variants select exactly the same
> BR2_X86_CPU_HAS_* symbols in arch/Config.in.x86, and haswell was never
> excluded. The same goes for broadwell, skylake, zen*, x86-64-v3, ...,
> which all enable AVX2 and build fine on the autobuilders.
> 
> So drop the BR2_x86_core_avx2 exclusion.
> 
> Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com>
> Assisted-by: Claude:claude-opus-5

Applied to 2025.02.x, 2026.08.x. Thanks

> ---
>  package/qemu/Config.in.host | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/package/qemu/Config.in.host b/package/qemu/Config.in.host
> index e5379e7224..48979fd7ce 100644
> --- a/package/qemu/Config.in.host
> +++ b/package/qemu/Config.in.host
> @@ -22,7 +22,7 @@ config BR2_PACKAGE_HOST_QEMU_ARCH_SUPPORTS
>  	default y if BR2_sparc64
>  	default y if BR2_xtensa
>  	default y if BR2_x86_64
> -	depends on !BR2_x86_steamroller && !BR2_x86_core_avx2
> +	depends on !BR2_x86_steamroller
>  	# The Qemu TCG engine does not implement the AVX512
>  	# instruction set, so binaries built for such CPUs cannot be
>  	# emulated.
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[Buildroot] [PATCH 2/3] arch/Config.in.x86: add BR2_X86_CPU_HAS_XOP

[Yegor Yefremov via buildroot]

From: Yegor Yefremov <yegorslists@googlemail.com>

The AMD Bulldozer family (bdver1 to bdver4, i.e. bulldozer, piledriver,
steamroller and excavator) is the only x86 family implementing the XOP
instruction set, together with the equally Bulldozer-specific FMA4 and
LWP extensions, and TBM starting with bdver2. All of them were dropped
again with Zen.

This can be verified with:

  $ gcc -march=bdver1 -Q --help=target | grep -E '\-m(xop|fma4|tbm|lwp)'
    -mfma4      [enabled]
    -mlwp       [enabled]
    -mtbm       [disabled]
    -mxop       [enabled]

  $ gcc -march=bdver2 -Q --help=target | grep -E '\-m(xop|fma4|tbm|lwp)'
    -mfma4      [enabled]
    -mlwp       [enabled]
    -mtbm       [enabled]
    -mxop       [enabled]

with bdver3 and bdver4 behaving like bdver2.

Add a hidden BR2_X86_CPU_HAS_XOP capability symbol and select it from
those four CPU variants, so that packages which cannot cope with this
instruction set can depend on it, instead of listing the CPU variants
one by one. The first user is host-qemu, whose TCG engine does not
implement XOP.

Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com>
Assisted-by: Claude:claude-opus-5
---
 arch/Config.in.x86 | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/arch/Config.in.x86 b/arch/Config.in.x86
index 3c4a725360..51b157409f 100644
--- a/arch/Config.in.x86
+++ b/arch/Config.in.x86
@@ -20,6 +20,14 @@ config BR2_X86_CPU_HAS_AVX
 config BR2_X86_CPU_HAS_AVX2
 	bool
 
+# BR2_X86_CPU_HAS_XOP is selected by the AMD Bulldozer family (bdver1
+# to bdver4), which is the only family implementing XOP. On those CPUs,
+# gcc also enables the equally Bulldozer-specific FMA4 and LWP
+# extensions (and TBM starting with bdver2). Those extensions were
+# dropped again with Zen.
+config BR2_X86_CPU_HAS_XOP
+	bool
+
 # BR2_X86_CPU_HAS_AVX512 implies the following AVX512 extensions:
 #   AVX512F, AVX512BW, AVX512CD, AVX512DQ, AVX512VL
 # This subset is common to Intel Xeon (excl Xeon Phi), AMD Zen 4, and
@@ -604,6 +612,7 @@ config BR2_x86_bulldozer
 	select BR2_X86_CPU_HAS_SSSE3
 	select BR2_X86_CPU_HAS_SSE4
 	select BR2_X86_CPU_HAS_SSE42
+	select BR2_X86_CPU_HAS_XOP
 config BR2_x86_piledriver
 	bool "piledriver"
 	select BR2_X86_CPU_HAS_MMX
@@ -613,6 +622,7 @@ config BR2_x86_piledriver
 	select BR2_X86_CPU_HAS_SSSE3
 	select BR2_X86_CPU_HAS_SSE4
 	select BR2_X86_CPU_HAS_SSE42
+	select BR2_X86_CPU_HAS_XOP
 config BR2_x86_steamroller
 	bool "steamroller"
 	select BR2_X86_CPU_HAS_MMX
@@ -622,6 +632,7 @@ config BR2_x86_steamroller
 	select BR2_X86_CPU_HAS_SSSE3
 	select BR2_X86_CPU_HAS_SSE4
 	select BR2_X86_CPU_HAS_SSE42
+	select BR2_X86_CPU_HAS_XOP
 	select BR2_ARCH_NEEDS_GCC_AT_LEAST_4_8
 config BR2_x86_excavator
 	bool "excavator"
@@ -634,6 +645,7 @@ config BR2_x86_excavator
 	select BR2_X86_CPU_HAS_SSE42
 	select BR2_X86_CPU_HAS_AVX
 	select BR2_X86_CPU_HAS_AVX2
+	select BR2_X86_CPU_HAS_XOP
 	select BR2_ARCH_NEEDS_GCC_AT_LEAST_4_9
 config BR2_x86_zen
 	bool "zen"
-- 
2.34.1

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Re: [Buildroot] [PATCH 2/3] arch/Config.in.x86: add BR2_X86_CPU_HAS_XOP

[Raphaël Mélotte via buildroot]

In reply of:
> The AMD Bulldozer family (bdver1 to bdver4, i.e. bulldozer, piledriver,
> steamroller and excavator) is the only x86 family implementing the XOP
> instruction set, together with the equally Bulldozer-specific FMA4 and
> LWP extensions, and TBM starting with bdver2. All of them were dropped
> again with Zen.
> 
> This can be verified with:
> 
>   $ gcc -march=bdver1 -Q --help=target | grep -E '\-m(xop|fma4|tbm|lwp)'
>     -mfma4      [enabled]
>     -mlwp       [enabled]
>     -mtbm       [disabled]
>     -mxop       [enabled]
> 
>   $ gcc -march=bdver2 -Q --help=target | grep -E '\-m(xop|fma4|tbm|lwp)'
>     -mfma4      [enabled]
>     -mlwp       [enabled]
>     -mtbm       [enabled]
>     -mxop       [enabled]
> 
> with bdver3 and bdver4 behaving like bdver2.
> 
> Add a hidden BR2_X86_CPU_HAS_XOP capability symbol and select it from
> those four CPU variants, so that packages which cannot cope with this
> instruction set can depend on it, instead of listing the CPU variants
> one by one. The first user is host-qemu, whose TCG engine does not
> implement XOP.
> 
> Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com>
> Assisted-by: Claude:claude-opus-5

Applied to 2025.02.x, 2026.08.x. Thanks

> ---
>  arch/Config.in.x86 | 12 ++++++++++++
>  1 file changed, 12 insertions(+)
> 
> diff --git a/arch/Config.in.x86 b/arch/Config.in.x86
> index 3c4a725360..51b157409f 100644
> --- a/arch/Config.in.x86
> +++ b/arch/Config.in.x86
> @@ -20,6 +20,14 @@ config BR2_X86_CPU_HAS_AVX
>  config BR2_X86_CPU_HAS_AVX2
>  	bool
>  
> +# BR2_X86_CPU_HAS_XOP is selected by the AMD Bulldozer family (bdver1
> +# to bdver4), which is the only family implementing XOP. On those CPUs,
> +# gcc also enables the equally Bulldozer-specific FMA4 and LWP
> +# extensions (and TBM starting with bdver2). Those extensions were
> +# dropped again with Zen.
> +config BR2_X86_CPU_HAS_XOP
> +	bool
> +
>  # BR2_X86_CPU_HAS_AVX512 implies the following AVX512 extensions:
>  #   AVX512F, AVX512BW, AVX512CD, AVX512DQ, AVX512VL
>  # This subset is common to Intel Xeon (excl Xeon Phi), AMD Zen 4, and
> @@ -604,6 +612,7 @@ config BR2_x86_bulldozer
>  	select BR2_X86_CPU_HAS_SSSE3
>  	select BR2_X86_CPU_HAS_SSE4
>  	select BR2_X86_CPU_HAS_SSE42
> +	select BR2_X86_CPU_HAS_XOP
>  config BR2_x86_piledriver
>  	bool "piledriver"
>  	select BR2_X86_CPU_HAS_MMX
> @@ -613,6 +622,7 @@ config BR2_x86_piledriver
>  	select BR2_X86_CPU_HAS_SSSE3
>  	select BR2_X86_CPU_HAS_SSE4
>  	select BR2_X86_CPU_HAS_SSE42
> +	select BR2_X86_CPU_HAS_XOP
>  config BR2_x86_steamroller
>  	bool "steamroller"
>  	select BR2_X86_CPU_HAS_MMX
> @@ -622,6 +632,7 @@ config BR2_x86_steamroller
>  	select BR2_X86_CPU_HAS_SSSE3
>  	select BR2_X86_CPU_HAS_SSE4
>  	select BR2_X86_CPU_HAS_SSE42
> +	select BR2_X86_CPU_HAS_XOP
>  	select BR2_ARCH_NEEDS_GCC_AT_LEAST_4_8
>  config BR2_x86_excavator
>  	bool "excavator"
> @@ -634,6 +645,7 @@ config BR2_x86_excavator
>  	select BR2_X86_CPU_HAS_SSE42
>  	select BR2_X86_CPU_HAS_AVX
>  	select BR2_X86_CPU_HAS_AVX2
> +	select BR2_X86_CPU_HAS_XOP
>  	select BR2_ARCH_NEEDS_GCC_AT_LEAST_4_9
>  config BR2_x86_zen
>  	bool "zen"
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[Buildroot] [PATCH 3/3] package/qemu: host-qemu does not support XOP capable CPUs

[Yegor Yefremov via buildroot]

From: Yegor Yefremov <yegorslists@googlemail.com>

Commit 1f7efaf89f03 ("package/qemu: do not support x86_steamroller or
x86_core_avx2") excluded BR2_x86_steamroller from
BR2_PACKAGE_HOST_QEMU_ARCH_SUPPORTS. This is still needed, but for a
different reason than AVX, and the exclusion is incomplete.

steamroller is bdver3, and what the Qemu TCG engine cannot emulate
there is not AVX, but the Bulldozer-specific XOP, FMA4, TBM and LWP
extensions. In Qemu 11.0.0 (the version we currently package) and
11.1.1, target/i386/cpu.c has:

  #define TCG_EXT3_FEATURES (CPUID_EXT3_LAHF_LM | CPUID_EXT3_SVM | \
            CPUID_EXT3_CR8LEG | CPUID_EXT3_ABM | CPUID_EXT3_SSE4A | \
            CPUID_EXT3_3DNOWPREFETCH | CPUID_EXT3_KERNEL_FEATURES | \
            CPUID_EXT3_CMP_LEG)

CPUID_EXT3_XOP, CPUID_EXT3_FMA4, CPUID_EXT3_TBM and CPUID_EXT3_LWP are
defined in target/i386/cpu.h, but are not part of that mask, i.e. TCG
does not implement them. Binaries using those instructions therefore
die with:

  qemu: uncaught target signal 4 (Illegal instruction) - core dumped

This affects the whole Bulldozer family, not only steamroller:
bulldozer (bdver1), piledriver (bdver2) and excavator (bdver4) are
equally unsupported, but were never excluded.

Use the newly introduced BR2_X86_CPU_HAS_XOP symbol, which covers all
four variants, instead of listing BR2_x86_steamroller alone. As for
AVX512, this disables gobject-introspection and nodejs, which are the
two packages needing host-qemu in user mode.

Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com>
Assisted-by: Claude:claude-opus-5
---
 package/qemu/Config.in.host | 9 +++++----
 1 file changed, 5 insertions(+), 4 deletions(-)

diff --git a/package/qemu/Config.in.host b/package/qemu/Config.in.host
index 48979fd7ce..fbc989b003 100644
--- a/package/qemu/Config.in.host
+++ b/package/qemu/Config.in.host
@@ -22,10 +22,11 @@ config BR2_PACKAGE_HOST_QEMU_ARCH_SUPPORTS
 	default y if BR2_sparc64
 	default y if BR2_xtensa
 	default y if BR2_x86_64
-	depends on !BR2_x86_steamroller
-	# The Qemu TCG engine does not implement the AVX512
-	# instruction set, so binaries built for such CPUs cannot be
-	# emulated.
+	# The Qemu TCG engine implements neither the XOP instruction set
+	# nor the other Bulldozer-specific extensions (FMA4, TBM, LWP),
+	# and it does not implement the AVX512 instruction set either,
+	# so binaries built for such CPUs cannot be emulated.
+	depends on !BR2_X86_CPU_HAS_XOP
 	depends on !BR2_X86_CPU_HAS_AVX512
 	depends on !BR2_powerpc_620 && !BR2_powerpc_630
 
-- 
2.34.1

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Re: [Buildroot] [PATCH 3/3] package/qemu: host-qemu does not support XOP capable CPUs

[Raphaël Mélotte via buildroot]

In reply of:
> Commit 1f7efaf89f03 ("package/qemu: do not support x86_steamroller or
> x86_core_avx2") excluded BR2_x86_steamroller from
> BR2_PACKAGE_HOST_QEMU_ARCH_SUPPORTS. This is still needed, but for a
> different reason than AVX, and the exclusion is incomplete.
> 
> steamroller is bdver3, and what the Qemu TCG engine cannot emulate
> there is not AVX, but the Bulldozer-specific XOP, FMA4, TBM and LWP
> extensions. In Qemu 11.0.0 (the version we currently package) and
> 11.1.1, target/i386/cpu.c has:
> 
>   #define TCG_EXT3_FEATURES (CPUID_EXT3_LAHF_LM | CPUID_EXT3_SVM | \
>             CPUID_EXT3_CR8LEG | CPUID_EXT3_ABM | CPUID_EXT3_SSE4A | \
>             CPUID_EXT3_3DNOWPREFETCH | CPUID_EXT3_KERNEL_FEATURES | \
>             CPUID_EXT3_CMP_LEG)
> 
> CPUID_EXT3_XOP, CPUID_EXT3_FMA4, CPUID_EXT3_TBM and CPUID_EXT3_LWP are
> defined in target/i386/cpu.h, but are not part of that mask, i.e. TCG
> does not implement them. Binaries using those instructions therefore
> die with:
> 
>   qemu: uncaught target signal 4 (Illegal instruction) - core dumped
> 
> This affects the whole Bulldozer family, not only steamroller:
> bulldozer (bdver1), piledriver (bdver2) and excavator (bdver4) are
> equally unsupported, but were never excluded.
> 
> Use the newly introduced BR2_X86_CPU_HAS_XOP symbol, which covers all
> four variants, instead of listing BR2_x86_steamroller alone. As for
> AVX512, this disables gobject-introspection and nodejs, which are the
> two packages needing host-qemu in user mode.
> 
> Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com>
> Assisted-by: Claude:claude-opus-5

Applied to 2025.02.x, 2026.08.x. Thanks

> ---
>  package/qemu/Config.in.host | 9 +++++----
>  1 file changed, 5 insertions(+), 4 deletions(-)
> 
> diff --git a/package/qemu/Config.in.host b/package/qemu/Config.in.host
> index 48979fd7ce..fbc989b003 100644
> --- a/package/qemu/Config.in.host
> +++ b/package/qemu/Config.in.host
> @@ -22,10 +22,11 @@ config BR2_PACKAGE_HOST_QEMU_ARCH_SUPPORTS
>  	default y if BR2_sparc64
>  	default y if BR2_xtensa
>  	default y if BR2_x86_64
> -	depends on !BR2_x86_steamroller
> -	# The Qemu TCG engine does not implement the AVX512
> -	# instruction set, so binaries built for such CPUs cannot be
> -	# emulated.
> +	# The Qemu TCG engine implements neither the XOP instruction set
> +	# nor the other Bulldozer-specific extensions (FMA4, TBM, LWP),
> +	# and it does not implement the AVX512 instruction set either,
> +	# so binaries built for such CPUs cannot be emulated.
> +	depends on !BR2_X86_CPU_HAS_XOP
>  	depends on !BR2_X86_CPU_HAS_AVX512
>  	depends on !BR2_powerpc_620 && !BR2_powerpc_630
>  
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Re: [Buildroot] [PATCH 0/3] package/qemu: fix x86 CPU variant exclusions

[Thomas Petazzoni via buildroot]

On Thu, Sep 17, 2026 at 09:53:23AM +0200, Yegor Yefremov via buildroot wrote:
> Yegor Yefremov (3):
>   package/qemu: drop x86_core_avx2 exclusion
>   arch/Config.in.x86: add BR2_X86_CPU_HAS_XOP
>   package/qemu: host-qemu does not support XOP capable CPUs

Series applied, thanks!

Thomas
-- 
Thomas Petazzoni, co-owner and CEO, Bootlin
Embedded Linux and Kernel engineering and training
https://bootlin.com
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