From: Pavel Machek <pavel@nabladev.com>
To: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Cc: cip-dev@lists.cip-project.org,
Nobuhiro Iwamatsu <nobuhiro.iwamatsu.x90@mail.toshiba>,
Pavel Machek <pavel@nabladev.com>,
Biju Das <biju.das.jz@bp.renesas.com>
Subject: Re: [PATCH 6.12.y-cip 8/8] arm64: dts: renesas: rzt2h-n2h-evk: Enable xSPI nodes
Date: Thu, 16 Jul 2026 12:50:48 +0200 [thread overview]
Message-ID: <ali3iLuUt9176IX6@duo.ucw.cz> (raw)
In-Reply-To: <20260706182328.5237-9-prabhakar.mahadev-lad.rj@bp.renesas.com>
[-- Attachment #1: Type: text/plain, Size: 478 bytes --]
Hi!
> Configure the xSPI0 controller interface to 1-bit (x1) mode, even though
> the connected MX25LW51245 octal flash device supports octal mode. Add a
> corresponding inline hardware comment detailing this restriction;
Thanks for the explanation and good comment.
I guess even better solution would be to reset the flash when the
board is reset -- connecting flash reset line to rest of the system?
But that's something for the hardware team.
Best regards,
Pavel
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 195 bytes --]
next prev parent reply other threads:[~2026-07-16 10:51 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-06 18:23 [PATCH 6.12.y-cip 0/8] Add xSPI support to RZ/T2H and RZ/N2H SoCs Lad Prabhakar
2026-07-06 18:23 ` [PATCH 6.12.y-cip 1/8] mtd: spi-nor: add support for Macronix Octal flash Lad Prabhakar
2026-07-06 18:23 ` [PATCH 6.12.y-cip 2/8] clk: renesas: r9a09g077: Add xSPI core and module clocks Lad Prabhakar
2026-07-16 10:48 ` Pavel Machek
2026-07-06 18:23 ` [PATCH 6.12.y-cip 3/8] dt-bindings: memory: renesas,rzg3e-xspi: Add RZ/T2H and RZ/N2H support Lad Prabhakar
2026-07-06 18:23 ` [PATCH 6.12.y-cip 4/8] memory: renesas-rpc-if: Fix duplicate device name on multi-instance platforms Lad Prabhakar
2026-07-06 18:23 ` [PATCH 6.12.y-cip 5/8] memory: renesas-rpc-if: Add suspend/resume support Lad Prabhakar
2026-07-16 10:49 ` Pavel Machek
2026-07-06 18:23 ` [PATCH 6.12.y-cip 6/8] arm64: dts: renesas: r9a09g077: Add xSPI nodes Lad Prabhakar
2026-07-06 18:23 ` [PATCH 6.12.y-cip 7/8] arm64: dts: renesas: r9a09g087: " Lad Prabhakar
2026-07-06 18:23 ` [PATCH 6.12.y-cip 8/8] arm64: dts: renesas: rzt2h-n2h-evk: Enable " Lad Prabhakar
2026-07-16 10:50 ` Pavel Machek [this message]
2026-07-16 7:30 ` [PATCH 6.12.y-cip 0/8] Add xSPI support to RZ/T2H and RZ/N2H SoCs nobuhiro.iwamatsu.x90
2026-07-16 10:51 ` [cip-dev] " Pavel Machek
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=ali3iLuUt9176IX6@duo.ucw.cz \
--to=pavel@nabladev.com \
--cc=biju.das.jz@bp.renesas.com \
--cc=cip-dev@lists.cip-project.org \
--cc=nobuhiro.iwamatsu.x90@mail.toshiba \
--cc=prabhakar.mahadev-lad.rj@bp.renesas.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox