Re: speedstep capability checks

[Bruno Ducrot <ducrot@poupinou.org>]

On Thu, Mar 18, 2004 at 08:57:20PM +0100, aeriksson@fastmail.fm wrote:
> 
> 
> davej@redhat.com said:
> >> A few SpeedStep-capable systems don't perform according to
> >> specification: the CPUID and/or some MSRs don't tell us the 
> >> CPU is SpeedStep capable even though it definitely is.
> 
> > Is there nothing in the errata documents about this ? 
> 
> <snip>
> 
> > I'd merge this really as a last resort, and it's beginning to sound
> > like we don't really have any options (other than not support those
> > broken boxes). Ugh. 
> 
> 
> ...and ducrot@poupinou.org replied:
> > There is nothing in any data sheets for the check anyway, other than
> > it's not possible to distinguish a PIII (coppermine) with Speedstep
> > technology from one without Speedstep technology.  There is nothing
> > in any spec update I'm aware. 
> 
> 
> So, is the patch ok to merge?

To be more precise: if you look only datasheets and spec update,
there is no check given, but there is an application note, and there
is no errata for that AN.
I still don't understand why for example it hasn't been included
in any spec update?

-- 
Bruno Ducrot

--  Which is worse:  ignorance or apathy?
--  Don't know.  Don't care.