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* [PATCH 0/3] Add descriptor definitions for a few new DSA operations
@ 2022-11-08  0:39 Fenghua Yu
  2022-11-08  0:39 ` [PATCH 1/3] dmaengine: idxd: Add descriptor definitions for 16 bytes of pattern in memory fill operation Fenghua Yu
                   ` (2 more replies)
  0 siblings, 3 replies; 5+ messages in thread
From: Fenghua Yu @ 2022-11-08  0:39 UTC (permalink / raw)
  To: Vinod Koul, Dave Jiang; +Cc: dmaengine, linux-kernel, Fenghua Yu

A few new DSA operations are introduced [1]:
1. Memory fill with 16 bytes of pattern.
2. Translation fetch.
3. Data Integrity Extension (DIX) generate.

This series adds descriptor definitions for the new DSA operations.
With the definitions, user can issue the DSA operations to optimize
corresponding transactions.

Reference:
1. DSA 2.0 spec: https://software.intel.com/content/www/us/en/develop/articles/intel-data-streaming-accelerator-architecture-specification.html

Fenghua Yu (3):
  dmaengine: idxd: Add descriptor definitions for 16 bytes of pattern in
    memory fill operation
  dmaengine: idxd: Add descriptor definitions for DIX generate operation
  dmaengine: idxd: Add descriptor definitions for translation fetch
    operation

 include/uapi/linux/idxd.h | 35 +++++++++++++++++++++++++++++++++++
 1 file changed, 35 insertions(+)

-- 
2.32.0


^ permalink raw reply	[flat|nested] 5+ messages in thread

* [PATCH 1/3] dmaengine: idxd: Add descriptor definitions for 16 bytes of pattern in memory fill operation
  2022-11-08  0:39 [PATCH 0/3] Add descriptor definitions for a few new DSA operations Fenghua Yu
@ 2022-11-08  0:39 ` Fenghua Yu
  2022-11-08 16:13   ` Dave Jiang
  2022-11-08  0:39 ` [PATCH 2/3] dmaengine: idxd: Add descriptor definitions for DIX generate operation Fenghua Yu
  2022-11-08  0:39 ` [PATCH 3/3] dmaengine: idxd: Add descriptor definitions for translation fetch operation Fenghua Yu
  2 siblings, 1 reply; 5+ messages in thread
From: Fenghua Yu @ 2022-11-08  0:39 UTC (permalink / raw)
  To: Vinod Koul, Dave Jiang; +Cc: dmaengine, linux-kernel, Fenghua Yu

The memory fill operation (0x04) can fill in memory with either 8 bytes
or 16 bytes of pattern. To fill in memory with 16 bytes of pattern, the
first 8 bytes are provided in pattern lower in bytes 16-23 and the next
8 bytes are in pattern upper in bytes 40-47 in the descriptor. Currently
only 8 bytes of pattern is enabled.

Add descriptor definitions for pattern lower and pattern upper so that
user can use 16 bytes of pattern to fill memory.

Signed-off-by: Fenghua Yu <fenghua.yu@intel.com>
Reviewed-by: Dave Jiang <dave.jiang@intel.com>
---
 include/uapi/linux/idxd.h | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/include/uapi/linux/idxd.h b/include/uapi/linux/idxd.h
index 095299c75828..04a2f6411820 100644
--- a/include/uapi/linux/idxd.h
+++ b/include/uapi/linux/idxd.h
@@ -179,6 +179,7 @@ struct dsa_hw_desc {
 		uint64_t	rdback_addr;
 		uint64_t	pattern;
 		uint64_t	desc_list_addr;
+		uint64_t	pattern_lower;
 	};
 	union {
 		uint64_t	dst_addr;
@@ -243,6 +244,11 @@ struct dsa_hw_desc {
 			uint16_t	dest_app_tag_seed;
 		};
 
+		/* Fill */
+		struct {
+			uint64_t	pattern_upper;
+		};
+
 		uint8_t		op_specific[24];
 	};
 } __attribute__((packed));
-- 
2.32.0


^ permalink raw reply related	[flat|nested] 5+ messages in thread

* [PATCH 2/3] dmaengine: idxd: Add descriptor definitions for DIX generate operation
  2022-11-08  0:39 [PATCH 0/3] Add descriptor definitions for a few new DSA operations Fenghua Yu
  2022-11-08  0:39 ` [PATCH 1/3] dmaengine: idxd: Add descriptor definitions for 16 bytes of pattern in memory fill operation Fenghua Yu
@ 2022-11-08  0:39 ` Fenghua Yu
  2022-11-08  0:39 ` [PATCH 3/3] dmaengine: idxd: Add descriptor definitions for translation fetch operation Fenghua Yu
  2 siblings, 0 replies; 5+ messages in thread
From: Fenghua Yu @ 2022-11-08  0:39 UTC (permalink / raw)
  To: Vinod Koul, Dave Jiang; +Cc: dmaengine, linux-kernel, Fenghua Yu

The Data Integrity Extension (DIX) generate operation (0x17) computes
the Data Integrity Field (DIF) on the source data and writes only the
computed DIF for each source block to the PI destination address.

Add descriptor definitions for this operation so that user can use
DSA to accelerate DIX generate operation.

Signed-off-by: Fenghua Yu <fenghua.yu@intel.com>
Reviewed-by: Dave Jiang <dave.jiang@intel.com>
---
 include/uapi/linux/idxd.h | 20 ++++++++++++++++++++
 1 file changed, 20 insertions(+)

diff --git a/include/uapi/linux/idxd.h b/include/uapi/linux/idxd.h
index 04a2f6411820..34294d99c1cb 100644
--- a/include/uapi/linux/idxd.h
+++ b/include/uapi/linux/idxd.h
@@ -77,6 +77,7 @@ enum dsa_opcode {
 	DSA_OPCODE_DIF_INS,
 	DSA_OPCODE_DIF_STRP,
 	DSA_OPCODE_DIF_UPDT,
+	DSA_OPCODE_DIX_GEN = 0x17,
 	DSA_OPCODE_CFLUSH = 0x20,
 };
 
@@ -249,6 +250,17 @@ struct dsa_hw_desc {
 			uint64_t	pattern_upper;
 		};
 
+		/* DIX generate */
+		struct {
+			uint8_t		dix_gen_res;
+			uint8_t		dest_dif_flags;
+			uint8_t		dif_flags;
+			uint8_t		dix_gen_res2[13];
+			uint32_t	ref_tag_seed;
+			uint16_t	app_tag_mask;
+			uint16_t	app_tag_seed;
+		};
+
 		uint8_t		op_specific[24];
 	};
 } __attribute__((packed));
@@ -327,6 +339,14 @@ struct dsa_completion_record {
 			uint16_t	dif_upd_dest_app_tag;
 		};
 
+		/* DIX generate */
+		struct {
+			uint64_t	dix_gen_res;
+			uint32_t	dix_ref_tag;
+			uint16_t	dix_app_tag_mask;
+			uint16_t	dix_app_tag;
+		};
+
 		uint8_t		op_specific[16];
 	};
 } __attribute__((packed));
-- 
2.32.0


^ permalink raw reply related	[flat|nested] 5+ messages in thread

* [PATCH 3/3] dmaengine: idxd: Add descriptor definitions for translation fetch operation
  2022-11-08  0:39 [PATCH 0/3] Add descriptor definitions for a few new DSA operations Fenghua Yu
  2022-11-08  0:39 ` [PATCH 1/3] dmaengine: idxd: Add descriptor definitions for 16 bytes of pattern in memory fill operation Fenghua Yu
  2022-11-08  0:39 ` [PATCH 2/3] dmaengine: idxd: Add descriptor definitions for DIX generate operation Fenghua Yu
@ 2022-11-08  0:39 ` Fenghua Yu
  2 siblings, 0 replies; 5+ messages in thread
From: Fenghua Yu @ 2022-11-08  0:39 UTC (permalink / raw)
  To: Vinod Koul, Dave Jiang; +Cc: dmaengine, linux-kernel, Fenghua Yu

The translation fetch operation (0x0A) fetches address translations for the
address range specified in the decriptor by issuing address translation
(ATS) requests to the IOMMU.

Add descriptor definitions for the operation so that user can use DSA
to accelerate translation fetch.

Signed-off-by: Fenghua Yu <fenghua.yu@intel.com>
Reviewed-by: Dave Jiang <dave.jiang@intel.com>
---
 include/uapi/linux/idxd.h | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/include/uapi/linux/idxd.h b/include/uapi/linux/idxd.h
index 34294d99c1cb..9de48c561452 100644
--- a/include/uapi/linux/idxd.h
+++ b/include/uapi/linux/idxd.h
@@ -71,6 +71,7 @@ enum dsa_opcode {
 	DSA_OPCODE_CR_DELTA,
 	DSA_OPCODE_AP_DELTA,
 	DSA_OPCODE_DUALCAST,
+	DSA_OPCODE_TRANSL_FETCH,
 	DSA_OPCODE_CRCGEN = 0x10,
 	DSA_OPCODE_COPY_CRC,
 	DSA_OPCODE_DIF_CHECK,
@@ -181,6 +182,7 @@ struct dsa_hw_desc {
 		uint64_t	pattern;
 		uint64_t	desc_list_addr;
 		uint64_t	pattern_lower;
+		uint64_t	transl_fetch_addr;
 	};
 	union {
 		uint64_t	dst_addr;
@@ -191,6 +193,7 @@ struct dsa_hw_desc {
 	union {
 		uint32_t	xfer_size;
 		uint32_t	desc_count;
+		uint32_t	region_size;
 	};
 	uint16_t	int_handle;
 	uint16_t	rsvd1;
@@ -250,6 +253,12 @@ struct dsa_hw_desc {
 			uint64_t	pattern_upper;
 		};
 
+		/* Translation fetch */
+		struct {
+			uint64_t	transl_fetch_res;
+			uint32_t	region_stride;
+		};
+
 		/* DIX generate */
 		struct {
 			uint8_t		dix_gen_res;
-- 
2.32.0


^ permalink raw reply related	[flat|nested] 5+ messages in thread

* Re: [PATCH 1/3] dmaengine: idxd: Add descriptor definitions for 16 bytes of pattern in memory fill operation
  2022-11-08  0:39 ` [PATCH 1/3] dmaengine: idxd: Add descriptor definitions for 16 bytes of pattern in memory fill operation Fenghua Yu
@ 2022-11-08 16:13   ` Dave Jiang
  0 siblings, 0 replies; 5+ messages in thread
From: Dave Jiang @ 2022-11-08 16:13 UTC (permalink / raw)
  To: Fenghua Yu, Vinod Koul; +Cc: dmaengine, linux-kernel



On 11/7/2022 4:39 PM, Fenghua Yu wrote:
> The memory fill operation (0x04) can fill in memory with either 8 bytes
> or 16 bytes of pattern. To fill in memory with 16 bytes of pattern, the
> first 8 bytes are provided in pattern lower in bytes 16-23 and the next
> 8 bytes are in pattern upper in bytes 40-47 in the descriptor. Currently
> only 8 bytes of pattern is enabled.
> 
> Add descriptor definitions for pattern lower and pattern upper so that
> user can use 16 bytes of pattern to fill memory.
> 
> Signed-off-by: Fenghua Yu <fenghua.yu@intel.com>
> Reviewed-by: Dave Jiang <dave.jiang@intel.com>
> ---
>   include/uapi/linux/idxd.h | 6 ++++++
>   1 file changed, 6 insertions(+)
> 
> diff --git a/include/uapi/linux/idxd.h b/include/uapi/linux/idxd.h
> index 095299c75828..04a2f6411820 100644
> --- a/include/uapi/linux/idxd.h
> +++ b/include/uapi/linux/idxd.h
> @@ -179,6 +179,7 @@ struct dsa_hw_desc {
>   		uint64_t	rdback_addr;
>   		uint64_t	pattern;
>   		uint64_t	desc_list_addr;
> +		uint64_t	pattern_lower;
>   	};
>   	union {
>   		uint64_t	dst_addr;
> @@ -243,6 +244,11 @@ struct dsa_hw_desc {
>   			uint16_t	dest_app_tag_seed;
>   		};
>   
> +		/* Fill */
> +		struct {

I don't think the anon struct is needed here. If there are others, that 
can be added later with the next patch that needs it.

> +			uint64_t	pattern_upper;
> +		};
> +
>   		uint8_t		op_specific[24];
>   	};
>   } __attribute__((packed));

^ permalink raw reply	[flat|nested] 5+ messages in thread

end of thread, other threads:[~2022-11-08 16:14 UTC | newest]

Thread overview: 5+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2022-11-08  0:39 [PATCH 0/3] Add descriptor definitions for a few new DSA operations Fenghua Yu
2022-11-08  0:39 ` [PATCH 1/3] dmaengine: idxd: Add descriptor definitions for 16 bytes of pattern in memory fill operation Fenghua Yu
2022-11-08 16:13   ` Dave Jiang
2022-11-08  0:39 ` [PATCH 2/3] dmaengine: idxd: Add descriptor definitions for DIX generate operation Fenghua Yu
2022-11-08  0:39 ` [PATCH 3/3] dmaengine: idxd: Add descriptor definitions for translation fetch operation Fenghua Yu

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