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From: Miquel Raynal <miquel.raynal@bootlin.com>
To: Lizhi Hou <lizhi.hou@amd.com>, Brian Xu <brian.xu@amd.com>,
	Raj Kumar Rampelli <raj.kumar.rampelli@amd.com>,
	Vinod Koul <vkoul@kernel.org>
Cc: Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
	Michal Simek <monstr@monstr.eu>,
	dmaengine@vger.kernel.org,
	Miquel Raynal <miquel.raynal@bootlin.com>
Subject: [PATCH v2 0/4] dmaengine: xilinx: Misc (cyclic) transfers fixes
Date: Thu, 30 Nov 2023 12:13:11 +0100	[thread overview]
Message-ID: <20231130111315.729430-1-miquel.raynal@bootlin.com> (raw)

Hello,

So far all my testing was performed by looping the playback output to
the recording input and comparing the files using FFTs. Unfortunately,
when the DMA engine suffers from the same issue on both sides, some
issues may appear un-noticed. I now have proper hardware to really
listen to the actual sound, so here are a couple of fixes and
improvements.

Cheers,
Miquèl

Changes in v2:
* Added a patch to clarify the logic in the interrupt handler between
  cyclic and sg transfers.
* Fixed the count of elapsed periods without breaking SG.

Miquel Raynal (4):
  dmaengine: xilinx: xdma: Fix the count of elapsed periods in cyclic
    mode
  dmaengine: xilinx: xdma: Clarify the logic between cyclic/sg modes
  dmaengine: xilinx: xdma: Better handling of the busy variable
  dmaengine: xilinx: xdma: Add terminate_all/synchronize callbacks

 drivers/dma/xilinx/xdma.c | 103 +++++++++++++++++++++++++++++++-------
 1 file changed, 85 insertions(+), 18 deletions(-)

-- 
2.34.1


             reply	other threads:[~2023-11-30 11:13 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-11-30 11:13 Miquel Raynal [this message]
2023-11-30 11:13 ` [PATCH v2 1/4] dmaengine: xilinx: xdma: Fix the count of elapsed periods in cyclic mode Miquel Raynal
2023-11-30 11:13 ` [PATCH v2 2/4] dmaengine: xilinx: xdma: Clarify the logic between cyclic/sg modes Miquel Raynal
2023-11-30 11:13 ` [PATCH v2 3/4] dmaengine: xilinx: xdma: Better handling of the busy variable Miquel Raynal
2023-11-30 11:13 ` [PATCH v2 4/4] dmaengine: xilinx: xdma: Add terminate_all/synchronize callbacks Miquel Raynal
2023-11-30 17:28   ` Lizhi Hou
2023-11-30 19:06     ` Jan Kuliga
2023-11-30 19:23       ` Miquel Raynal
2023-12-04  9:34         ` Jan Kuliga
2023-12-04 11:02           ` Miquel Raynal
2023-12-04 13:13             ` Jan Kuliga
2023-12-04 14:36               ` Miquel Raynal
2023-12-04 16:41                 ` Lizhi Hou
2023-12-08 14:27                   ` Jan Kuliga
2023-12-21 16:30 ` [PATCH v2 0/4] dmaengine: xilinx: Misc (cyclic) transfers fixes Vinod Koul

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